Hi Jean-Francois,
On Tue, Dec 08, 2015 at 07:42:26AM +0100, Jean-Francois Moine wrote:
> On Mon, 7 Dec 2015 08:31:02 -0600
> Rob Herring wrote:
>
> > On Sun, Dec 06, 2015 at 10:04:12AM +0100, Jean-Francois Moine wrote:
> > > The H3 has a clock gate definition similar to the other Allwinner SoCs,
On Tue, Dec 08, 2015 at 06:05:51AM +, Kuninori Morimoto wrote:
>
> Hi Simon
>
> > Add fallback compatibility string.
> > This is in keeping with the fallback scheme being adopted wherever
> > appropriate for drivers for Renesas SoCs.
> >
> > Signed-off-by: Simon Horman
> > ---
> (snip)
> >
On 12/08/2015 02:19 AM, Tony Lindgren wrote:
> * Peter Ujfalusi [151204 02:46]:
>> +
>> +ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
>> + <&edma_tptc2 0>;
>> +
>> +ti,edma-memcpy-channels = /bits/ 16 <20 21>;
>
> Is this safe
On 12/04/2015 11:51 PM, Tony Lindgren wrote:
> * Arnd Bergmann [151204 13:38]:
>> On Friday 04 December 2015 10:47:07 Tony Lindgren wrote:
Peter Ujfalusi writes:
> @@ -174,12 +182,44 @@
> };
>
> edma: edma@4900 {
> - compati
>
> I'll admit I'm a little fuzzy on the differences between dual and quad modes
> on
> various flash manufacturers. Can you help clear it up for me?
For SPI NOR, currently, don't have an official standard to define an uniform
Quad
I/O mode protocol. So we can see that there are some difference
On Mon, 7 Dec 2015 08:31:02 -0600
Rob Herring wrote:
> On Sun, Dec 06, 2015 at 10:04:12AM +0100, Jean-Francois Moine wrote:
> > The H3 has a clock gate definition similar to the other Allwinner SoCs,
> > but with a different parent clock for each single gate.
> >
> > Adding the names of the pare
some memory manufacturers such as Spansion, Micron and
> > Macronix. There are many comments in the source code to explain the
> > implementation choices based on the datasheets from memory
> manufacturers.
> >
> >
> > This series was based and tested on linux-nex
On Tue, Dec 08, 2015 at 09:37:48AM +0800, Peter Chen wrote:
> Current USB HUB driver lacks of platform interfaces to configure
> external signal on HUB chip, eg, the PHY input clock and gpio reset
> pin for HUB, these kinds of HUBs are usually soldered at the board,
> and they are not hot-plug USB
Hi Simon
> Add fallback compatibility string.
> This is in keeping with the fallback scheme being adopted wherever
> appropriate for drivers for Renesas SoCs.
>
> Signed-off-by: Simon Horman
> ---
(snip)
> + {
> + .compatible = "renesas,usbhs",
> + .data = (void *)US
Hi Morimoto-san,
Sorry for late information in v3.
There's a small mistake in example in DT binding documentation.
Anyway, let's wait for more comments from other developers before fixing it.
On 12/8/2015 12:28 PM, Kuninori Morimoto wrote:
From: Kuninori Morimoto
This patch enables to use t
Hi,
this short series adds generic, and soc-specific r8a7792 and r8a7793 compat
strings to the Renesas USBHS driver. The intention is to provide a complete
set of compat strings for known R-Car SoCs.
Simon Horman (2):
usb: renesas_usbhs: add fallback compatibility string
usb: renesas_usbhs: a
Simply document new compatibility string.
As a previous patch adds a generic R-Car Gen2 compatibility string
there appears to be no need for a driver updates.
Also add names for SoCs.
Signed-off-by: Simon Horman
---
Documentation/devicetree/bindings/usb/renesas_usbhs.txt | 10 ++
1 file
Add fallback compatibility string.
This is in keeping with the fallback scheme being adopted wherever
appropriate for drivers for Renesas SoCs.
Signed-off-by: Simon Horman
---
Documentation/devicetree/bindings/usb/renesas_usbhs.txt | 4 ++--
drivers/usb/renesas_usbhs/common.c
Add fallback compatibility string.
This is in keeping with the fallback scheme being adopted wherever
appropriate for drivers for Renesas SoCs.
Signed-off-by: Simon Horman
---
Documentation/devicetree/bindings/media/renesas,jpu.txt | 13 +++--
drivers/media/platform/rcar_jpu.c
From: Kuninori Morimoto
This patch enables to use thermal-zone on DT if it was call as
"renesas,rcar-gen2-thermal".
Previous style is still supported by "renesas,rcar-thermal".
Signed-off-by: Kuninori Morimoto
---
v3 -> v4
- no change
.../devicetree/bindings/thermal/rcar-thermal.txt | 37
From: Kuninori Morimoto
of_thermal_set_trip_temp() updates trip temperature. It should call
thermal_zone_device_update() immediately.
Signed-off-by: Kuninori Morimoto
---
v3 -> v4
- no change
drivers/thermal/of-thermal.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/thermal/
From: Kuninori Morimoto
This patch enables to use thermal-zone on r8a7791.
This thermal sensor can measure temperature from -4 to 125000,
but over 117000 can be critical on this chip.
Thus, default critical temperature is now set as 115000 (this driver
is using 5000 steps) (Current critical
From: Kuninori Morimoto
This patch enables to use thermal-zone on r8a7790.
This thermal sensor can measure temperature from -4 to 125000,
but over 117000 can be critical on this chip.
Thus, default critical temperature is now set as 115000 (this driver
is using 5000 steps) (Current critical
From: Kuninori Morimoto
Current rcar_thermal_get_temp() returns latest temperature, but it might
not be updated if some HW issue happened. This means user might get
wrong temperature. This patch solved this issue.
Signed-off-by: Kuninori Morimoto
---
v3 -> v4
- "happend" -> "happened"
drive
From: Kuninori Morimoto
Signed-off-by: Kuninori Morimoto
---
v3 -> v4
- add 1line between int <-> return
drivers/thermal/rcar_thermal.c | 18 ++
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/drivers/thermal/rcar_thermal.c b/drivers/thermal/rcar_thermal.c
inde
From: Kuninori Morimoto
Current rcar thermal driver sometimes checks irq possibility when it
calls rcar_thermal_irq_enable/disable(), but sometimes not.
This patch checks it inside rcar_thermal_irq_enable/disable().
Signed-off-by: Kuninori Morimoto
---
v3 -> v4
- no change
drivers/thermal/r
From: Kuninori Morimoto
This patch is prepare for of-thermal support.
Signed-off-by: Kuninori Morimoto
---
v3 -> v4
- no change
drivers/thermal/rcar_thermal.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/thermal/rcar_thermal.c b/drivers/thermal/r
Hi
These are v4 of thermal-zone support for r8a7790/r8a7791.
Mainly, it cares return value of get_temp()
I think 8) is needed on of-thermal (?)
Kuninori Morimoto (8):
1) thermal: rcar: move rcar_thermal_dt_ids to upside
2) thermal: rcar: check every rcar_thermal_update_temp() return
stmmac_config_sub_second_increment set the sub second increment to 20ns.
Driver is configured to use the fine adjustment method where the sub second
register is incremented when the acculumator incremented by the addend
register wraps overflows. This accumulator is update on every ptp clk
cycle. If
devm_get_clk looks in clock-name property for matching clock.
the ptp_ref_clk property is ignored.
Acked-by: Rob Herring
Signed-off-by: Phil Reid
---
Documentation/devicetree/bindings/net/stmmac.txt | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/Documentat
Provide ability to specify a fixed phy in the device tree and
retain the mdio bus if no phy is found. This is needed where
a dsa is connected via a fixed phy and uses the mdio bus for config.
Fixed ptp ref clock calculatins for the stmmac when ptp ref clock
is running at <= 50Mhz. Also add device
The DSA driver needs to be passed a reference to an mdio bus. Typically
the mac is configured to use a fixed link but the mdio bus still needs
to be registered so that it con configure the switch.
This patch follows the same process as the altera tse ethernet driver for
creation of the mdio bus.
A
Provides an options to use the ptp clock routed from the Altera FPGA
fabric. Instead of the defalt eosc1 clock connected to the ARM HPS core.
This setting affects all emacs in the core as the ptp clock is common.
Signed-off-by: Phil Reid
---
Documentation/devicetree/bindings/net/socfpga-dwmac.tx
Hi Khiem
> Hi Morimoto-san,
>
> Thanks for your patch.
> I have same comments as patch 0006.
Thanks, will fix in v4
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On Thu, Nov 19, 2015 at 6:46 PM, Andrew-CT Chen
wrote:
> Add Mediatek EFUSE driver to access hardware data like
> thermal sensor calibration or HDMI impedance.
>
> Signed-off-by: Andrew-CT Chen
> ---
> drivers/nvmem/Kconfig | 11 ++
> drivers/nvmem/Makefile| 2 ++
> drivers/nvmem/mt
On 2015/12/7 14:37, xuejiancheng wrote:
>
> On 2015/12/4 18:49, Arnd Bergmann wrote:
>> On Friday 04 December 2015 10:27:58 xuejiancheng wrote:
> +sysctrl: system-controller@1202 {
> +compatible = "hisilicon,sysctrl";
> +re
On 12/07/2015 02:37 PM, xuejiancheng wrote:
As this seems to be a standard part, we can also think about making a
high-level driver for in in drivers/soc rather than relying on the syscon
driver which we tend to use more for one-off devices with random register
layouts.
Sorry. I didn't u
Hi Peter,
[auto build test ERROR on usb/usb-testing]
[also build test ERROR on v4.4-rc4 next-20151207]
url:
https://github.com/0day-ci/linux/commits/Peter-Chen/USB-add-generic-onboard-USB-HUB-driver/20151208-094428
base: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git
usb
Hi Morimoto-san,
Thanks for your patch.
I have same comments as patch 0006.
On 12/7/2015 2:44 PM, Kuninori Morimoto wrote:
From: Kuninori Morimoto
This patch enables to use thermal-zone on r8a7791.
This thermal sensor can measure temperature from -4 to 125000,
but over 117000 can be crit
Hi Morimoto-san,
Thanks for your patch.
On 12/7/2015 2:44 PM, Kuninori Morimoto wrote:
From: Kuninori Morimoto
This patch enables to use thermal-zone on r8a7790.
This thermal sensor can measure temperature from -4 to 125000,
but over 117000 can be critical on this chip.
Thus, default cri
Hi,
Peter Chen writes:
> diff --git a/drivers/usb/misc/Makefile b/drivers/usb/misc/Makefile
> index 45fd4ac..da52e9a 100644
> --- a/drivers/usb/misc/Makefile
> +++ b/drivers/usb/misc/Makefile
> @@ -29,3 +29,4 @@ obj-$(CONFIG_USB_CHAOSKEY) += chaoskey.o
>
> obj-$(CONFIG_USB_SISUSBVGA)
On Mon, Dec 7, 2015 at 11:37 PM, Peter Chen wrote:
> Add dt-binding documentation for generic onboard USB HUB.
>
> Signed-off-by: Peter Chen
> ---
> .../bindings/usb/generic-onboard-hub.txt | 28
> ++
> 1 file changed, 28 insertions(+)
> create mode 100644
> Docu
2015년 12월 08일 10:47에 Krzysztof Kozlowski 이(가) 쓴 글:
> On 08.12.2015 10:33, Javier Martinez Canillas wrote:
>> Hello Krzysztof,
>>
>> On 12/07/2015 09:45 PM, Krzysztof Kozlowski wrote:
>>> On 07.12.2015 21:52, Inki Dae wrote:
From: Javier Martinez Canillas
The DT binding for the Exy
2015년 12월 08일 09:48에 Krzysztof Kozlowski 이(가) 쓴 글:
> On 08.12.2015 00:36, Inki Dae wrote:
>> Hi Javier,
>>
>> 2015-12-07 22:41 GMT+09:00 Javier Martinez Canillas :
>>> Hello Inki,
>>>
>>> On 12/07/2015 09:52 AM, Inki Dae wrote:
From: Javier Martinez Canillas
>>>
>>> Thanks a lot for po
On Tue, Dec 08, 2015 at 01:30:12AM +, Kuninori Morimoto wrote:
>
> Hi Simon
>
> > > From: Kuninori Morimoto
> > >
> > > Renesas sound driver needs #sound-dai-cells settings, but, this usage
> > > is a little bit confusable. It came from ALSA SoC historical reasons.
> > > The sound DAI namin
On 08.12.2015 10:33, Javier Martinez Canillas wrote:
> Hello Krzysztof,
>
> On 12/07/2015 09:45 PM, Krzysztof Kozlowski wrote:
>> On 07.12.2015 21:52, Inki Dae wrote:
>>> From: Javier Martinez Canillas
>>>
>>> The DT binding for the Exynos DRM Display Port (DP) driver isn't consistent
>>> since i
On 2015/12/7 21:48, Bintian wrote:
> On 2015/12/7 21:16, Rob Herring wrote:
>> On Sat, Dec 05, 2015 at 03:54:48PM +0800, yankejian wrote:
>>> This patch adds documentation for the devicetree bindings used by the
>>> DT files of Hisilicon Hip05-D02 development board.
>>>
>>> Signed-off-by: yankeji
Hello Krzysztof,
On 12/07/2015 09:48 PM, Krzysztof Kozlowski wrote:
> On 08.12.2015 00:36, Inki Dae wrote:
>> Hi Javier,
>>
>> 2015-12-07 22:41 GMT+09:00 Javier Martinez Canillas :
>>> Hello Inki,
>>>
>>> On 12/07/2015 09:52 AM, Inki Dae wrote:
From: Javier Martinez Canillas
>>>
>>> Tha
Add dt-binding documentation for generic onboard USB HUB.
Signed-off-by: Peter Chen
---
.../bindings/usb/generic-onboard-hub.txt | 28 ++
1 file changed, 28 insertions(+)
create mode 100644
Documentation/devicetree/bindings/usb/generic-onboard-hub.txt
diff --git
The current dts describes USB HUB's property at USB controller's
entry, it is improper. Fix it by using a generic USB HUB entry.
Signed-off-by: Peter Chen
---
arch/arm/boot/dts/imx6qdl-udoo.dtsi | 25 ++---
1 file changed, 6 insertions(+), 19 deletions(-)
diff --git a/arch/a
Current USB HUB driver lacks of platform interfaces to configure
external signal on HUB chip, eg, the PHY input clock and gpio reset
pin for HUB, these kinds of HUBs are usually soldered at the board,
and they are not hot-plug USB devices.
With this patch, the user can configure the HUB's pins at
Hi all,
There is a known issue that the USB code can't handle USB HUB's
external pins well, in that case, it may cause some onboard
USB HUBs can't work since their PHY's clock or reset pin needs to
operate.
The user reported this issue at below:
http://www.spinics.net/lists/linux-usb/msg131502.ht
On 2015/12/7 17:36, Arnd Bergmann wrote:
> On Monday 07 December 2015 16:01:03 xuejiancheng wrote:
>> On 2015/12/4 18:56, Arnd Bergmann wrote:
>>> On Friday 04 December 2015 11:21:28 xuejiancheng wrote:
Hi Arnd,
On 2015/12/3 17:44, Arnd Bergmann wrote:
> On Thursday 03 December
Hello Krzysztof,
On 12/07/2015 09:45 PM, Krzysztof Kozlowski wrote:
> On 07.12.2015 21:52, Inki Dae wrote:
>> From: Javier Martinez Canillas
>>
>> The DT binding for the Exynos DRM Display Port (DP) driver isn't consistent
>> since it uses a phandle to describe the connection between the DP port
Hi Simon
> > From: Kuninori Morimoto
> >
> > Renesas sound driver needs #sound-dai-cells settings, but, this usage
> > is a little bit confusable. It came from ALSA SoC historical reasons.
> > The sound DAI naming method is different between Single/Multi DAI in
> > the ALSA framework, and it is
Kevin Hilman writes:
> Eric Anholt writes:
>
>> From: Alexander Aring
>>
>> This patch adds support for several power domains on Raspberry Pi,
>> including USB (so it can be enabled even if the bootloader didn't do
>> it), and graphics.
>>
>> This patch is the combined work of Eric Anholt (who
On 08.12.2015 00:36, Inki Dae wrote:
> Hi Javier,
>
> 2015-12-07 22:41 GMT+09:00 Javier Martinez Canillas :
>> Hello Inki,
>>
>> On 12/07/2015 09:52 AM, Inki Dae wrote:
>>> From: Javier Martinez Canillas
>>>
>>
>> Thanks a lot for posting this patch.
>>
>>> The DT binding for the Exynos DRM Displ
On Mon, Dec 07, 2015 at 09:38:33AM -0600, Bjorn Helgaas wrote:
> On Sat, Dec 05, 2015 at 11:38:37AM +0100, Geert Uytterhoeven wrote:
> > Hi Bjorn,
> >
> > On Fri, Dec 4, 2015 at 10:26 PM, Bjorn Helgaas wrote:
> > > On Tue, Dec 01, 2015 at 04:24:30PM +0900, Simon Horman wrote:
> > >> Simply docume
On 07.12.2015 21:52, Inki Dae wrote:
> From: Javier Martinez Canillas
>
> The DT binding for the Exynos DRM Display Port (DP) driver isn't consistent
> since it uses a phandle to describe the connection between the DP port and
> the display panel but uses the OF graph ports and endpoints to descr
On Tue, Dec 08, 2015 at 12:10:59AM +, Kuninori Morimoto wrote:
>
> From: Kuninori Morimoto
>
> Renesas sound driver needs #sound-dai-cells settings, but, this usage
> is a little bit confusable. It came from ALSA SoC historical reasons.
> The sound DAI naming method is different between Sing
* Peter Ujfalusi [151204 02:46]:
> +
> + ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
> +<&edma_tptc2 0>;
> +
> + ti,edma-memcpy-channels = /bits/ 16 <20 21>;
Is this safe to change to just ti,edma-memcpy-channels = <20 21> a
* Enric Balletbo Serra [151204 06:40]:
> 2015-12-03 20:27 GMT+01:00 Tony Lindgren :
> > * Javier Martinez Canillas [151203 10:29]:
> >
> >> Since is working for the boards with the libertas chip, I preferred
> >> to remove the DTS hack but left the boards with wlcore chip since
> >> you said the
From: Kuninori Morimoto
Renesas sound driver needs #sound-dai-cells settings, but, this usage
is a little bit confusable. It came from ALSA SoC historical reasons.
The sound DAI naming method is different between Single/Multi DAI in
the ALSA framework, and it is used for sound card matching.
And
Hi
> The default value of #sound-dai-cells in r8a7778.dtsi is one, while
> the /sound/simple-audio-card,cpu device node in r8a7778-bockw.dts uses a
> phandle without any extra cells ("<&rcar_sound>"), causing:
>
> /sound/simple-audio-card,cpu: arguments longer than property
> asoc-simple
On 12/07/2015 02:43 PM, Bjorn Helgaas wrote:
Hi David,
On Tue, Sep 22, 2015 at 05:16:55PM -0700, David Daney wrote:
From: David Daney
The config space for external PCIe root complexes on some Cavium
ThunderX SoCs is very similar to CAM and ECAM, but differs in the
shift values that have to be
Eric Anholt writes:
> From: Alexander Aring
>
> This patch adds support for several power domains on Raspberry Pi,
> including USB (so it can be enabled even if the bootloader didn't do
> it), and graphics.
>
> This patch is the combined work of Eric Anholt (who wrote USB support
> inside of the
Hi David,
On Tue, Sep 22, 2015 at 05:16:55PM -0700, David Daney wrote:
> From: David Daney
>
> The config space for external PCIe root complexes on some Cavium
> ThunderX SoCs is very similar to CAM and ECAM, but differs in the
> shift values that have to be applied to the bus and devfn numbers
On 2015-12-07 13:54, Stephen Warren wrote:
> On 12/07/2015 02:51 PM, Stefan Agner wrote:
>> I collected the Acks I received so far and removed them from the list
>> below. Several Freescale addresses are no longer valid (the once
>> starting with --)... I would interprete the Ack from Yuan Yao as a
On 12/07/2015 02:51 PM, Stefan Agner wrote:
I collected the Acks I received so far and removed them from the list
below. Several Freescale addresses are no longer valid (the once
starting with --)... I would interprete the Ack from Yuan Yao as an
Ack from Freescale.
Matt, you introduced the vf61
GPLv2-only devicetrees make reuse difficult for software components
licensed under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary
uses, so relicense the vfxxx.dtsi, vf500.dtsi and vf610.dtsi files to
this combination.
CCs were acquired using (updated
GPLv2-only devicetrees make reuse difficult for software components
licensed under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary
uses, so relicense the vf610-twr.dts file to this combination.
CCs were acquired using (updated some email addresses):
gi
GPLv2-only devicetrees make reuse difficult for software components
licensed under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary
uses, so relicense the vf*colibri* files to this combination.
CCs were acquired using:
git shortlog -sne --no-merges arch
I collected the Acks I received so far and removed them from the list
below. Several Freescale addresses are no longer valid (the once
starting with --)... I would interprete the Ack from Yuan Yao as an
Ack from Freescale.
Matt, you introduced the vf610-cosmic.dts board, is it possible to
get an a
GPLv2-only devicetrees make reuse difficult for software components
licensed under a different license.
The consensus is that a GPL/X11 dual-license should allow all necessary
uses, so relicense the vf610-twr.dts file to this combination.
CCs were acquired using (updated some email addresses, com
On 07/12/15 17:37, Rob Herring wrote:
+Linus W
On Fri, Dec 04, 2015 at 05:31:13PM +, Martyn Welch wrote:
This patch adds documentation for the gpio-switch binding. This binding
provides a mechanism to bind named links to gpio, with the primary
purpose of enabling standardised access to sw
On Sun, Dec 06, 2015 at 08:52:16PM +0100, Markus Pargmann wrote:
> This is the touchscreen conversion queue binding documentation. It uses
> the shared imx25 ADC.
>
> Signed-off-by: Markus Pargmann
> ---
>
> Notes:
> Changes in v9:
> - Updated binding descriptions
>
> Changes i
Hi Mark,
On Mon, Dec 7, 2015 at 8:03 PM, Mark Rutland wrote:
> On Mon, Dec 07, 2015 at 06:49:43PM +, Sudeep Holla wrote:
>> On 07/12/15 18:24, Geert Uytterhoeven wrote:
>> >+L2_CA57: cache-controller@0 {
>> >+compatible = "cache";
>> >+arm,data-latency = <4 4 1>;
>
On 12/04/2015 06:02 AM, Mark Brown wrote:
On Tue, Nov 24, 2015 at 04:26:24PM +, Lee Jones wrote:
On Wed, 18 Nov 2015, Andrew F. Davis wrote:
Documentation/devicetree/bindings/mfd/tps65912.txt | 50 ++
drivers/gpio/Kconfig | 2 +-
drivers/gpio/gpio-tps6
On Mon, Dec 07, 2015 at 09:40:20AM +, Lee Jones wrote:
> On Mon, 30 Nov 2015, Damien Riegel wrote:
>
> > Currently syscon has a fixed configuration of 32 bits for register and
> > values widths. In some cases, it would be desirable to be able to
> > customize the value width.
> >
> > For exam
in the source code to explain the
> implementation choices based on the datasheets from memory manufacturers.
>
>
> This series was based and tested on linux-next-20151207
>
> 1 - Atmel QSPI + Micron n25q128a13 (atmel-quadspi.c driver)
>
> SPI 1-1-1: This mod
On Mon, Dec 07, 2015 at 11:58:33AM +0100, Neil Armstrong wrote:
> On some platforms, the macb integration does not use the USRIO
> register to configure the (R)MII port and clocks.
> When the register is not implemented and the MACB error signal
> is connected to the bus error, reading or writing t
On 05/12/15 14:16, Chen-Yu Tsai wrote:
> The video engine has its own special module clock, consisting of a clock
> gate, configurable dividers, and a reset control.
>
Hi,
I've tested these patches on A20, everything works so far.
I only read some bits from a random bitstream, so nothing fancy y
From: Neil Armstrong
Date: Mon, 7 Dec 2015 11:58:33 +0100
> - regs_buff[12] = macb_or_gem_readl(bp, USRIO);
> + if (!of_property_read_bool(bp->pdev->dev.of_node, "no-usrio")) {
> + regs_buff[12] = macb_or_gem_readl(bp, USRIO);
> + }
Single statement basic blocks shall no
On Mon, Dec 07, 2015 at 06:49:43PM +, Sudeep Holla wrote:
>
> On 07/12/15 18:24, Geert Uytterhoeven wrote:
> >+L2_CA57: cache-controller@0 {
> >+compatible = "cache";
> >+arm,data-latency = <4 4 1>;
> >+arm,tag-latency = <3 3 3>;
>
> Interesting, only P
On Mon, Dec 7, 2015 at 12:13 PM, Brian Norris
wrote:
> On Sun, Dec 06, 2015 at 08:45:40PM -0600, Rob Herring wrote:
>> On Fri, Dec 4, 2015 at 11:19 PM, Brian Norris
>> wrote:
>> > drivers/of/of_mtd.c| 33 +
>>
>> BTW, this file should be moved to driver
On 07/12/15 18:24, Geert Uytterhoeven wrote:
Add device nodes for the L2 caches, and link the CPU node to its L2
cache node.
The L2 cache for the Cortex-A57 CPU cores is 2 MiB large (organized as
128 KiB x 16 ways), and requires the following settings:
- Tag RAM latency: 3 cycles,
- Data
On 07/12/15 09:12, Jean-Francois Moine wrote:
> On Fri, 4 Dec 2015 22:24:42 +0100
> Jens Kuske wrote:
>
>> The Allwinner H3 is a home entertainment system oriented SoC with
>> four Cortex-A7 cores and a Mali-400MP2 GPU.
>>
>> Signed-off-by: Jens Kuske
>> ---
>> arch/arm/boot/dts/sun8i-h3.dtsi
Add a device node for the L2 cache, and link the CPU nodes to it.
The L2 cache for the Cortex-A7 CPU cores is 512 KiB large (organized as
64 KiB x 8 ways).
Signed-off-by: Geert Uytterhoeven
---
What are the DT bindings for a Cortex-A7 L2 cache controller?
v2:
- Drop (incorrect) optional cache
Add a device node for the L2 cache, and link the CPU nodes to it.
The L2 cache for the Cortex-A15 CPU cores is 1 MiB large (organized as
64 KiB x 16 ways), and requires the following settings:
- Tag RAM latency: 3 cycles,
- Data RAM latency: 4 cycles,
- Data RAM setup: 0 cycles.
Signed-off-
Add device nodes for the L2 caches, and link the CPU node to its L2
cache node.
The L2 cache for the Cortex-A57 CPU cores is 2 MiB large (organized as
128 KiB x 16 ways), and requires the following settings:
- Tag RAM latency: 3 cycles,
- Data RAM latency: 4 cycles,
- Data RAM setup: 1 cycle
Add device nodes for the L2 caches, and link the CPU node to its L2
cache node.
The L2 cache for the Cortex-A15 CPU cores is 1 MiB large (organized as
64 KiB x 16 ways), and located in PM domain A3SM. It requires the
following settings:
- Tag RAM latency: 3 cycles,
- Data RAM latency: 4 cycles
Add a device node for the L2 cache, and link the CPU node to it.
The L2 cache for the Cortex-A15 CPU cores is 1 MiB large (organized as
64 KiB x 16 ways), and requires the following settings:
- Tag RAM latency: 3 cycles,
- Data RAM latency: 4 cycles,
- Data RAM setup: 0 cycles.
Signed-off-b
Hi Simon, Magnus,
This patch series adds the missing L2 cache-controller nodes to the
DTSes for various Renesas ARM-based SoCs, and links the CPU nodes to
them.
For R-Mobile APE6 (r8a73a4), the L2 cache-controllers are also linked to
the respective (already existing) SYSC Power Domains. F
Add device nodes for the L2 caches, and link the CPU nodes to them.
The L2 cache for the Cortex-A15 CPU cores is 2 MiB large (organized as
128 KiB x 16 ways), and requires the following settings:
- Tag RAM latency: 3 cycles,
- Data RAM latency: 4 cycles,
- Data RAM setup: 1 cycle.
The L2 ca
On Mon, Dec 7, 2015 at 5:30 PM, Sudip Mukherjee
wrote:
>> > --- a/include/linux/of_address.h
>> > +++ b/include/linux/of_address.h
>> > @@ -112,8 +112,6 @@ static inline bool of_dma_is_coherent(struct
>> > device_node *np)
>> > extern int of_address_to_resource(struct device_node *dev, int index
On Sun, Dec 06, 2015 at 08:45:40PM -0600, Rob Herring wrote:
> On Fri, Dec 4, 2015 at 11:19 PM, Brian Norris
> wrote:
> > drivers/of/of_mtd.c| 33 +
>
> BTW, this file should be moved to drivers/mtd/ at some point.
How about s/at some point/now/ ? I ca
On Sat, Dec 05, 2015 at 12:45:36PM +0100, Jonas Gorski wrote:
> On Fri, Dec 4, 2015 at 3:02 AM, Brian Norris
> wrote:
> > // proposed
> > partitions {
> > compatible = "partitions";
>
> "partitions" sounds mode like a device_type thing than a compatible
> name, may
Hi Russell,
On lun., déc. 07 2015, Russell King wrote:
> Add the required DT binding documentation for the Marvell PMU driver.
>
> Acked-by: Rob Herring
> Signed-off-by: Russell King
Applied on mvebu/dt
Thanks,
Gregory
> ---
> Who takes these patches? This never got merged when the PMU
On Sun, Dec 06, 2015 at 08:52:15PM +0100, Markus Pargmann wrote:
> The documentation describes the bindings for the imx25 GCQ unit which is
> essentially a generic conversion queue using the imx25 ADC.
>
> Signed-off-by: Markus Pargmann
Acked-by: Rob Herring
> ---
>
> Notes:
> Changes in
Hi Russell,
On lun., déc. 07 2015, Russell King wrote:
> Add the Dove divider clocks to the Dove dtsi file.
>
> Acked-by: Andrew Lunn
> Signed-off-by: Russell King
Applied on mvebu/dt
Thanks,
Gregory
> ---
> arch/arm/boot/dts/dove.dtsi | 6 ++
> 1 file changed, 6 insertions(+)
>
> d
Hi Russell,
On lun., déc. 07 2015, Russell King wrote:
> Add documentation for the Marvell clock divider driver, which is used
> to source clocks for the AXI bus, video decoder, GPU and LCD blocks.
>
> Acked-by: Andrew Lunn
> Acked-by: Sebastian Hesselbarth
> Acked-by: Rob Herring
> Signed-
+Linus W
On Fri, Dec 04, 2015 at 05:31:13PM +, Martyn Welch wrote:
> This patch adds documentation for the gpio-switch binding. This binding
> provides a mechanism to bind named links to gpio, with the primary
> purpose of enabling standardised access to switches that might be standard
> acros
On 03/12/15 13:35, Stanimir Varbanov wrote:
Hi,
Here is v4, comments from Bjorn and Rob have been addressed.
The previous version can be found at [1].
regards,
Stan
[1] https://lkml.org/lkml/2015/11/23/114
Stanimir Varbanov (5):
PCI: designware: add memory barrier after enabling region
On 12/05/2015 12:21 PM, Jonathan Cameron wrote:
On 02/12/15 19:57, Andrew F. Davis wrote:
Add driver for the TI AFE4404 heart rate monitor and pulse oximeter.
This device detects reflected LED light fluctuations and presents an ADC
value to the user space for further signal processing.
Datashee
On 29/11/15 12:03, Bharat Kumar Gogada wrote:
> Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP.
>
> Signed-off-by: Bharat Kumar Gogada
> Signed-off-by: Ravi Kiran Gummaluri
> Acked-by: Rob Herring
I don't have much to add to this, so FWIW:
Reviewed-by: Marc Zyngier
M.
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