On Fri, Nov 13, 2015 at 8:32 AM, Thierry Reding
wrote:
> On Wed, Nov 04, 2015 at 01:59:51PM -0700, Stephen Warren wrote:
>> On 11/04/2015 10:11 AM, Thierry Reding wrote:
>> >From: Thierry Reding
>> >
>> >Extend the binding to cover the set of feature found in Tegra210.
>>
>> >diff --git
>> >a/Do
On Thu, Nov 5, 2015 at 1:55 AM, Jon Hunter wrote:
>> +UTMI ports:
>> +---
>> +
>> +Required properties:
>> +- status: Defines the operation status of the port. Valid values are:
>> + - "disabled": the port is disabled
>> + - "okay": the port is enabled
>> +- mode: A string that determine
Hi Fabio,
On Sun, Nov 1, 2015 at 5:55 AM, Fabio Estevam wrote:
> Hi Andrew,
>
> On Mon, Mar 30, 2015 at 1:56 AM, Andrew Bresticker
> wrote:
>
>>> I'd rather we have it defined explicitly in the binding, i.e. make it a
>>> required property?
>>
>&
On Wed, Jun 3, 2015 at 8:44 AM, Andrew Bresticker wrote:
> On Tue, Jun 2, 2015 at 11:07 PM, Kishon Vijay Abraham I wrote:
>>
>>
>> On Monday 11 May 2015 08:15 PM, Kishon Vijay Abraham I wrote:
>>>
>>>
>>>
>>> On Tuesday 05 May
On Tue, Jun 2, 2015 at 11:07 PM, Kishon Vijay Abraham I wrote:
>
>
> On Monday 11 May 2015 08:15 PM, Kishon Vijay Abraham I wrote:
>>
>>
>>
>> On Tuesday 05 May 2015 11:43 PM, Ezequiel Garcia wrote:
>>>
>>> Hi Kishon,
>>>
This series adds support for the USB2.0 PHY present on the IMG Pis
Hi Jassi,
On Mon, May 11, 2015 at 8:56 PM, Jassi Brar wrote:
> Applied patches 2, 3, 6 & 7
Please drop patches 6 and 7. Lee Jones has NAK'ed the MFD driver, so
I'll have to re-spin this series without using an MFD.
Thanks,
andrew
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On Thu, May 21, 2015 at 3:25 PM, Ezequiel Garcia
wrote:
>
>
> On 05/21/2015 07:24 PM, Andrew Bresticker wrote:
>> On Thu, May 21, 2015 at 2:37 PM, Ezequiel Garcia
>> wrote:
>>> This is preparation work for the introduction of clockevent frequency
>>> upd
On Thu, May 21, 2015 at 2:43 PM, Ezequiel Garcia
wrote:
> This commit introduces a new config, so the user can choose to enable
> the General Purpose Timer based clocksource. This option is required
> to have CPUFreq support.
>
> Signed-off-by: Ezequiel Garcia
> ---
> arch/mips/Kconfig
On Thu, May 21, 2015 at 2:41 PM, Ezequiel Garcia
wrote:
> The Pistachio SoC provides four general purpose timers, and allow
> to implement a clocksource driver.
>
> This driver can be used as a replacement for the MIPS GIC and MIPS R4K
> clocksources and sched clocks, which are clocked from the CP
On Thu, May 21, 2015 at 2:41 PM, Ezequiel Garcia
wrote:
> Add a device-tree binding document for the clocksource driver provided
> by Pistachio SoC general purpose timers.
>
> Signed-off-by: Ezequiel Garcia
Reviewed-by: Andrew Bresticker
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On Thu, May 21, 2015 at 2:37 PM, Ezequiel Garcia
wrote:
> This commit introduces the clockevent frequency update, using
> a clock notifier. It will be used to support CPUFreq on platforms
> using MIPS GIC based clockevents.
>
> Signed-off-by: Ezequiel Garcia
> ---
> drivers/clocksource/mips-gic-
On Thu, May 21, 2015 at 2:37 PM, Ezequiel Garcia
wrote:
> This is preparation work for the introduction of clockevent frequency
> update with a clock notifier. This is only possible when the device
> is passed a clk struct, so let's split the legacy and devicetree
> initialization.
>
> Signed-off-
On Thu, May 21, 2015 at 2:37 PM, Ezequiel Garcia
wrote:
> This commit adds the required checks on the functions that return
> an error. Some of them are not critical, so only a warning is
> printed.
>
> Signed-off-by: Ezequiel Garcia
Reviewed-by: Andrew Bresticker
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_put.
>
> Signed-off-by: Ezequiel Garcia
Reviewed-by: Andrew Bresticker
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Add a device-tree binding document for the pin controller present
on the IMG Pistachio SoC.
Signed-off-by: Damien Horsley
Signed-off-by: Ezequiel Garcia
Signed-off-by: Andrew Bresticker
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
---
No changes from v2
Signed-off-by: Andrew Bresticker
---
Changes from v3:
- Addressed review comments from Ezequiel.
Changes from v2:
- Removed module stuff which would be compiled out.
Changes from v1:
- Addressed review comments from Linus.
- Changed compatible string to "img,pistachio-system-pinctrl"
odule stuff that ends up being compiled out.
Changes from v1:
- Documented pin + function generic binding.
- Changed compatible string to "img,pistachio-system-pinctrl".
- Addressed some review comments.
- A couple of bug fixes.
Cc: Ezequiel Garcia
Cc: James Hartley
Cc: James Hogan
An
On Tue, Apr 28, 2015 at 4:24 PM, Ezequiel Garcia
wrote:
> Andrew,
>
> On 04/07/2015 04:44 PM, Andrew Bresticker wrote:
> [..]
>> +static int pistachio_pinmux_enable(struct pinctrl_dev *pctldev,
>> +unsigned func, unsigned grou
On Tue, Apr 28, 2015 at 3:40 PM, Ezequiel Garcia
wrote:
> Just a silly comment.
>
> On 04/07/2015 04:44 PM, Andrew Bresticker wrote:
> [..]
>> +
>> +static const struct pinmux_ops pistachio_pinmux_ops = {
>> + .get_functions_count = pistac
Add device-tree bindings for the Tegra XUSB mailbox which will be used
for communication between the Tegra xHCI controller's firmware and the
host processor.
Signed-off-by: Andrew Bresticker
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Cc: Jassi
NULL so that the
error can be propagated back to the caller of mbox_request_channel().
Signed-off-by: Benson Leung
Signed-off-by: Andrew Bresticker
Cc: Jassi Brar
Cc: Suman Anna
---
Changes from v6:
- Update omap-mailbox's xlate() to return error codes.
No changes from v5.
New f
Add an MFD driver for the XUSB host complex found on NVIDIA Tegra124
and later SoCs.
Signed-off-by: Andrew Bresticker
Cc: Samuel Ortiz
Cc: Lee Jones
---
New for v7.
---
drivers/mfd/Kconfig | 7 ++
drivers/mfd/Makefile | 1 +
drivers/mfd/tegra-xusb.c | 167
bit out of the host-controller drivers and into xhci_gen_setup().
Signed-off-by: Andrew Bresticker
Reviewed-by: Felipe Balbi
Cc: Mathias Nyman
Cc: Greg Kroah-Hartman
---
No changes from v5/v6.
New for v5.
Peviously posted here: https://lkml.org/lkml/2014/10/30/726
---
drivers/usb/host/
oller driver. The requesting driver is assigned
one of two virtual channels when the single physical channel is
requested. All incoming messages are sent to both virtual channels.
Signed-off-by: Andrew Bresticker
Cc: Jassi Brar
---
Changes from v6:
- Access FPCI registers using parent MFD
Add a binding document for the XUSB host complex on NVIDIA Tegra124
and later SoCs. The XUSB host complex includes a mailbox for
communication with the XUSB micro-controller and an xHCI host-controller.
Signed-off-by: Andrew Bresticker
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian
The mailbox controller's channel ops ought to be read-only.
Signed-off-by: Andrew Bresticker
Cc: Jassi Brar
---
No changes from v5/v6.
New for v5.
---
include/linux/mailbox_controller.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/linux/mailbox_controller
Add device-tree binding documentation for the xHCI controller present
on Tegra124 and later SoCs.
Signed-off-by: Andrew Bresticker
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Cc: Mathias Nyman
Cc: Greg Kroah-Hartman
---
Changes from v6:
- Removed
x27;s firmware.
The controller also supports USB device mode as well as powergating
of the SuperSpeed and host-controller logic when not in use, but
support for these is not yet implemented.
Based on work by:
Ajay Gupta
Bharath Yadav
Signed-off-by: Andrew Bresticker
Cc: Mathias Nyman
Cc: Greg
ts.
Changes from v1:
- Converted mailbox driver to use the common mailbox framework.
- Fixed up host driver so that it can now be built and used as a module.
- Addressed Stephen's review comments.
- Misc. cleanups.
Andrew Bresticker (8):
xhci: Set shared HCD's hcd_priv in xhci_ge
Hi Kevin,
On Mon, Apr 20, 2015 at 8:12 AM, Kevin Cernekee wrote:
> On Mon, Apr 20, 2015 at 5:21 AM, Mark Brown wrote:
>> On Sat, Apr 18, 2015 at 01:07:07PM -0700, Kevin Cernekee wrote:
>>> On Sat, Apr 18, 2015 at 10:11 AM, Mark Brown wrote:
>>
>>> > Someone trying to use the atmel_wm8904 driver
Hi Ezequiel,
On Thu, Apr 16, 2015 at 10:27 PM, Ezequiel Garcia
wrote:
>
> Hi Andrew,
>
> On 04/07/2015 04:44 PM, Andrew Bresticker wrote:
> [..]
>> +static int pistachio_gpio_register(struct pistachio_pinctrl *pctl)
>> +{
>> + struct device_node *node = pc
Update pistachio_defconfig to enable Pistachio's USB PHY driver.
Signed-off-by: Andrew Bresticker
---
New for v2.
---
arch/mips/configs/pistachio_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/mips/configs/pistachio_defconfig
b/arch/mips/configs/pistachio_defconfig
d patch to enable PHY driver in pistachio_defconfig
- Fixed a couple of spelling errors
Andrew Bresticker (3):
phy: Add binding document for Pistachio USB2.0 PHY
phy: Add driver for Pistachio USB2.0 PHY
MIPS: pistachio: Enable USB PHY driver in defconfig
.../devicetree/bindings/phy/pis
Add a driver for the USB2.0 PHY found on the IMG Pistachio SoC.
Signed-off-by: Andrew Bresticker
---
Changes from v1:
- Fixed a couple of typos
---
drivers/phy/Kconfig | 7 ++
drivers/phy/Makefile| 1 +
drivers/phy/phy-pistachio-usb.c | 206
Add a binding document for the USB2.0 PHY found on the IMG Pistachio SoC.
Signed-off-by: Andrew Bresticker
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
---
No changes from v1.
---
.../devicetree/bindings/phy/pistachio-usb-phy.txt | 29
On Tue, Apr 7, 2015 at 10:16 AM, James Hartley wrote:
>
>
>> -Original Message-
>> From: abres...@google.com [mailto:abres...@google.com] On Behalf Of
>> Andrew Bresticker
>> Sent: 06 April 2015 23:28
>> To: Arnd Bergmann; James Hartley
>&g
The DWMAC block on certain SoCs (such as IMG Pistachio) have a second
clock which must be enabled in order to access the peripheral's
register interface, so add support for requesting and enabling an
optional "pclk".
Signed-off-by: Andrew Bresticker
Cc: James Hartley
Cc
Signed-off-by: Andrew Bresticker
Cc: Paul Bolle
---
Changes from v2:
- Removed module stuff which would be compiled out.
Changes from v1:
- Addressed review comments from Linus.
- Changed compatible string to "img,pistachio-system-pinctrl".
- Look for GPIO sub-nodes by name.
- A
Add a device-tree binding document for the pin controller present
on the IMG Pistachio SoC.
Signed-off-by: Damien Horsley
Signed-off-by: Ezequiel Garcia
Signed-off-by: Andrew Bresticker
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
---
No changes from v2
from v1:
- Documented pin + function generic binding.
- Changed compatible string to "img,pistachio-system-pinctrl".
- Addressed some review comments.
- A couple of bug fixes.
Cc: Ezequiel Garcia
Cc: James Hartley
Cc: James Hogan
Andrew Bresticker (2):
pinctrl: Add Pistachio
On Mon, Apr 6, 2015 at 3:10 PM, Arnd Bergmann wrote:
> On Monday 06 April 2015 14:42:38 Andrew Bresticker wrote:
>> At the moment, the only additional setup required for the DWMAC
>> on the IMG Pistachio SoC is to request and enable a separate gate
>> clock for t
At the moment, the only additional setup required for the DWMAC
on the IMG Pistachio SoC is to request and enable a separate gate
clock for the register interface.
Signed-off-by: Andrew Bresticker
Signed-off-by: Govindraj Raja
Cc: James Hartley
---
Changes from v1:
- Do not potentially assign
Add a binding document for the DWMAC ethernet controller found on the
IMG Pistachio SoC.
Signed-off-by: Andrew Bresticker
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Cc: James Hartley
---
No changes from v1.
---
.../devicetree/bindings/net/pistachio
At the moment, the only additional setup required for the DWMAC
on the IMG Pistachio SoC is to request and enable a separate gate
clock for the register interface.
Signed-off-by: Andrew Bresticker
Signed-off-by: Govindraj Raja
Cc: James Hartley
---
drivers/net/ethernet/stmicro/stmmac/Makefile
Add a binding document for the DWMAC ethernet controller found on the
IMG Pistachio SoC.
Signed-off-by: Andrew Bresticker
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Cc: James Hartley
---
.../devicetree/bindings/net/pistachio-dwmac.txt| 24
This series adds support for the USB2.0 PHY present on the IMG Pistachio SoC.
Based on mips-for-linux-next and tested on the IMG Pistachio BuB. If possible,
I'd like this to go through the MIPS tree with Kishon's ACK.
Cc: James Hartley
Cc: Damien Horsley
Andrew Bresticker (2):
Add a driver for the USB2.0 PHY found on the IMG Pistachio SoC.
Signed-off-by: Andrew Bresticker
---
drivers/phy/Kconfig | 7 ++
drivers/phy/Makefile| 1 +
drivers/phy/phy-pistachio-usb.c | 206
3 files changed, 214 insertions
Add a binding document for the USB2.0 PHY found on the IMG Pistachio SoC.
Signed-off-by: Andrew Bresticker
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
---
.../devicetree/bindings/phy/pistachio-usb-phy.txt | 29 ++
include/dt-bindings
Hi Paul,
On Tue, Mar 31, 2015 at 11:20 AM, Paul Bolle wrote:
> Hi Andrew,
>
> On Tue, 2015-03-31 at 09:56 -0700, Andrew Bresticker wrote:
>> On Tue, Mar 31, 2015 at 1:10 AM, Paul Bolle wrote:
>> > The patch adds a mismatch between the Kconfig symbol (a bool) and the
&
On Tue, Mar 31, 2015 at 7:00 AM, Ralf Baechle wrote:
> On Mon, Mar 30, 2015 at 04:16:53PM -0700, Andrew Bresticker wrote:
>
>> This series adds support for the system pin and GPIO controller on the IMG
>> Pistachio SoC. Pistachio's system pin controller manages 99 pins, 9
Hi Paul,
On Tue, Mar 31, 2015 at 1:10 AM, Paul Bolle wrote:
> The patch adds a mismatch between the Kconfig symbol (a bool) and the
> code (which suggests that a modular build is also possible).
Nearly all of the pinctrl drivers (with the exception of qcom and
intel) are like this. They use a b
Hi Mike,
On Mon, Mar 30, 2015 at 6:36 PM, Michael Turquette
wrote:
> Quoting Andrew Bresticker (2015-03-30 17:15:43)
>> On Mon, Mar 30, 2015 at 4:59 PM, Stephen Boyd wrote:
>> > On 02/24/15 19:56, Andrew Bresticker wrote:
>> >> +
>> >&g
On Mon, Mar 30, 2015 at 6:21 PM, Stephen Boyd wrote:
> On 03/30/15 17:15, Andrew Bresticker wrote:
>> On Mon, Mar 30, 2015 at 4:59 PM, Stephen Boyd wrote:
>>> On 02/24/15 19:56, Andrew Bresticker wrote:
>>>> +
>>>> +void pistachio_clk_for
Add a polled input driver for a keypad in which the buttons are connected
in resistor ladders to an ADC. The IIO framework is used to claim and
read the ADC channels.
Signed-off-by: Andrew Bresticker
Cc: Jonathan Cameron
---
Changes from v1:
- Made linux,input-type a required property
detected at once per ADC channel.
Signed-off-by: Andrew Bresticker
Cc: Jonathan Cameron
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
---
Changes from v1:
- Made linux,input-type a required property.
---
.../devicetree/bindings/input/adc-keys.txt
Add #defines for the event types (EV_KEY, EV_SW, etc.) to the input DT
bindings header so that they can be used in device-tree source files.
Signed-off-by: Andrew Bresticker
---
New for v2.
---
include/dt-bindings/input/input.h | 14 ++
1 file changed, 14 insertions(+)
diff --git a
On Mon, Mar 30, 2015 at 4:59 PM, Stephen Boyd wrote:
> On 02/24/15 19:56, Andrew Bresticker wrote:
>> +
>> +void pistachio_clk_force_enable(struct pistachio_clk_provider *p,
>> + unsigned int *clk_ids, unsigned int num)
>> +{
>> +
Signed-off-by: Andrew Bresticker
---
Changes from v1:
- Addressed review comments from Linus.
- Changed compatible string to "img,pistachio-system-pinctrl".
- Look for GPIO sub-nodes by name.
- A couple of bug fixes.
---
drivers/pinctrl/Kconfig |6 +
drivers/pinctr
Add a device-tree binding document for the pin controller present
on the IMG Pistachio SoC.
Signed-off-by: Damien Horsley
Signed-off-by: Ezequiel Garcia
Signed-off-by: Andrew Bresticker
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
---
Changes from v1
Currently the "function" + "groups" combination is the only documented
format for pinmux nodes, although many drivers use "function" + "pins".
Update the generic pinctrl binding to include the "function" + "pins"
combination as well.
org/lkml/2015/3/16/1130
[2] https://github.com/abrestic/linux/tree/pistachio-pinctrl-v2
Andrew Bresticker (3):
pinctrl: Document "function" + "pins" pinmux binding
pinctrl: Add Pistachio SoC pin control binding document
pinctrl: Add Pistachio SoC pin control driver
On Sat, Mar 28, 2015 at 7:02 AM, Jonathan Cameron wrote:
> On 28/03/15 00:43, Andrew Bresticker wrote:
>> Add a polled input driver for a keypad in which the buttons are connected
>> in resistor ladders to an ADC. The IIO framework is used to claim and
>> read the ADC chann
On Sat, Mar 28, 2015 at 9:00 PM, Dmitry Torokhov
wrote:
> On Fri, Mar 27, 2015 at 05:43:17PM -0700, Andrew Bresticker wrote:
>> Add a binding document for a generic ADC keypad. Buttons on an ADC
>> keypad are connected in a resistor ladder to an ADC. The binding
>> describ
On Sat, Mar 28, 2015 at 7:03 AM, Jonathan Cameron wrote:
> On 28/03/15 00:43, Andrew Bresticker wrote:
>> Add a binding document for a generic ADC keypad. Buttons on an ADC
>> keypad are connected in a resistor ladder to an ADC. The binding
>> describes the mapping of AD
Add a polled input driver for a keypad in which the buttons are connected
in resistor ladders to an ADC. The IIO framework is used to claim and
read the ADC channels.
Signed-off-by: Andrew Bresticker
---
drivers/input/keyboard/Kconfig| 13 ++
drivers/input/keyboard/Makefile | 1
Add a binding document for a generic ADC keypad. Buttons on an ADC
keypad are connected in a resistor ladder to an ADC. The binding
describes the mapping of ADC channel and voltage ranges to buttons.
Signed-off-by: Andrew Bresticker
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian
On Tue, Mar 17, 2015 at 5:16 AM, Linus Walleij wrote:
> On Fri, Mar 6, 2015 at 7:51 PM, Andrew Bresticker
> wrote:
>> On Fri, Mar 6, 2015 at 3:55 AM, Linus Walleij
>> wrote:
>
>>>> +static inline void gpio_writel(struct p
From: Govindraj Raja
Add a defconfig for Pistachio which enables drivers for all the
currently supported peripherals on the SoC.
Signed-off-by: Govindraj Raja
Signed-off-by: Andrew Bresticker
---
No changes from v1/v2.
---
arch/mips/configs/pistachio_defconfig | 336
The Pistachio SoC boots only with device-tree. Document the required
properties and nodes as well as the boot protocol between the bootlaoder
and the kernel.
Signed-off-by: Andrew Bresticker
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
---
No changes from
unset.
Signed-off-by: Andrew Bresticker
Cc: Lars-Peter Clausen
---
No changes from v1/v2.
---
arch/mips/boot/compressed/Makefile | 6 --
arch/mips/jz4740/Platform | 1 +
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/mips/boot/compressed/Makefile
b/arch/mips
Cernekee
Signed-off-by: Andrew Bresticker
Reviewed-by: James Hogan
---
No changes from v1/v2.
Changes from Kevin's v6:
- Left cavium-octeon's war.h in-tact
---
arch/mips/include/asm/mach-ar7/war.h | 24
arch/mips/include/asm/mach-ath25/war.
t [2].
Changes from v2:
- Addressed review comments from James
Changes from v1:
- Switched to MIPS UHI hand-off protocol
Cc: Ezequiel Garcia
Cc: James Hartley
Cc: James Hogan
[1] http://patchwork.linux-mips.org/patch/8837/
[2] https://github.com/abrestic/linux/tree/pistachio-platform-v3
Andre
Add initial support for boards based on the Imagination Pistachio SoC.
Pistachio is based on a dual-core MIPS interAptiv CPU and will boot
using device-tree.
Signed-off-by: James Hartley
Signed-off-by: Andrew Bresticker
---
Changes from v2:
- addressed reviewed feedback from James
Changes from
Cernekee
Signed-off-by: Andrew Bresticker
---
No changes from v1.
Changes from Kevin's v6:
- Left cavium-octeon's war.h in-tact
---
arch/mips/include/asm/mach-ar7/war.h | 24
arch/mips/include/asm/mach-ath25/war.h | 25 -
Add initial support for boards based on the Imagination Pistachio SoC.
Pistachio is based on a dual-core MIPS interAptiv CPU and will boot
using device-tree.
Signed-off-by: James Hartley
Signed-off-by: Andrew Bresticker
---
Changes from v1:
- switched to MIPS UHI hand-off protocol
---
arch
unset.
Signed-off-by: Andrew Bresticker
Cc: Lars-Peter Clausen
---
No changes from v1.
---
arch/mips/boot/compressed/Makefile | 6 --
arch/mips/jz4740/Platform | 1 +
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/mips/boot/compressed/Makefile
b/arch/mips/boot
t [2].
Changes from v1:
- Switched to MIPS UHI hand-off protocol
Cc: Ezequiel Garcia
Cc: James Hartley
Cc: James Hogan
[1] http://patchwork.linux-mips.org/patch/8837/
[2] https://github.com/abrestic/linux/tree/pistachio-platform-v2
Andrew Bresticker (3):
MIPS: Allow platforms to specify the de
The Pistachio SoC boots only with device-tree. Document the required
properties and nodes as well as the boot protocol between the bootlaoder
and the kernel.
Signed-off-by: Andrew Bresticker
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
---
Changes from v1
From: Govindraj Raja
Add a defconfig for Pistachio which enables drivers for all the
currently supported peripherals on the SoC.
Signed-off-by: Govindraj Raja
Signed-off-by: Andrew Bresticker
---
No changes from v1.
---
arch/mips/configs/pistachio_defconfig | 336
Hi James,
On Thu, Mar 12, 2015 at 4:17 PM, James Hartley wrote:
> This adds support for the Imagination Technologies hash accelerator which
> provides hardware acceleration for SHA1 SHA224 SHA256 and MD5 hashes.
>
> Signed-off-by: James Hartley
Looks good to me.
Reviewed-by: Andre
Hi James,
On Wed, Mar 11, 2015 at 7:06 PM, James Hartley wrote:
> This adds support for the Imagination Technologies hash accelerator which
> provides hardware acceleration for SHA1 SHA224 SHA256 and MD5 hashes.
>
> Signed-off-by: James Hartley
One comment below, otherwise this looks fine to me
achio SoC.
>
> Signed-off-by: James Hartley
Reviewed-by: Andrew Bresticker
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On Fri, Mar 6, 2015 at 3:55 AM, Linus Walleij wrote:
> On Tue, Feb 24, 2015 at 3:15 AM, Andrew Bresticker
> wrote:
>
>> Add a driver for the pin controller present on the IMG Pistachio SoC.
>> This driver provides pinmux and pinconfig operations as well as GPIO
>>
On Fri, Mar 6, 2015 at 3:37 AM, Linus Walleij wrote:
> On Tue, Feb 24, 2015 at 3:15 AM, Andrew Bresticker
> wrote:
>
>> Add a device-tree binding document for the pin controller present
>> on the IMG Pistachio SoC.
>>
>> Signed-off-by: Damien Horsley
&g
On Fri, Mar 6, 2015 at 3:29 AM, Linus Walleij wrote:
> On Tue, Feb 24, 2015 at 3:15 AM, Andrew Bresticker
> wrote:
>
>> I'd like this to go through the MIPS tree with
>> Linus'/Alex's ACKs if possible.
>
> Why? It will only help creating merge confli
On Wed, Feb 25, 2015 at 1:15 PM, Thierry Reding
wrote:
> On Wed, Feb 25, 2015 at 09:27:36AM -0800, Andrew Bresticker wrote:
>> Hi Thierry,
>>
>> > Sorry for taking so awfully long to look at this. I've spent some time
>> > looking at various pieces
Hi Thierry,
> Sorry for taking so awfully long to look at this. I've spent some time
> looking at various pieces of documentation and I concluded that
> representing the port assignment as muxing options doesn't seem right
> after all. Instead I've come up with an alternate proposal (attached).
>
Add a driver for the integer (GF40LP_LAINT) and fractional (GF40LP_FRAC)
PLLs present on Pistachio.
Signed-off-by: Andrew Bresticker
---
drivers/clk/pistachio/Makefile | 1 +
drivers/clk/pistachio/clk-pll.c | 401
drivers/clk/pistachio/clk.h | 50
Add a device-tree binding document describing the four clock
controllers present on the IMG Pistachio SoC.
Signed-off-by: Damien Horsley
Signed-off-by: Andrew Bresticker
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
---
.../devicetree/bindings/clock
Add helpers for registering clocks and clock providers on Pistachio.
Signed-off-by: Andrew Bresticker
---
drivers/clk/Makefile | 1 +
drivers/clk/pistachio/Makefile | 1 +
drivers/clk/pistachio/clk.c| 140 +
drivers/clk/pistachio/clk.h
Register the system interface gate clocks provided by the peripheral
general control block. These clocks gate register access for various
peripherals.
Signed-off-by: Damien Horsley
Signed-off-by: Andrew Bresticker
---
drivers/clk/pistachio/clk-pistachio.c | 42
Register the clocks generated by the peripheral clock controller.
This includes the clocks for several peripherals, including I2C,
PWM, watchdog, and timer.
Signed-off-by: Damien Horsley
Signed-off-by: Andrew Bresticker
---
drivers/clk/pistachio/clk-pistachio.c | 67
: Andrew Bresticker
---
drivers/clk/pistachio/Makefile| 1 +
drivers/clk/pistachio/clk-pistachio.c | 199 ++
2 files changed, 200 insertions(+)
create mode 100644 drivers/clk/pistachio/clk-pistachio.c
diff --git a/drivers/clk/pistachio/Makefile b/drivers/clk
Register the clock gates for the external audio and ethernet
reference clocks provided by the top-level general control block.
Signed-off-by: Damien Horsley
Signed-off-by: Andrew Bresticker
---
drivers/clk/pistachio/clk-pistachio.c | 21 +
1 file changed, 21 insertions
ke this to go through the MIPS tree with
Mike's or Stephen's ACK if possible.
Cc: Ezequiel Garcia
Cc: James Hartley
Cc: James Hogan
[1] https://lkml.org/lkml/2015/2/23/705
[2] https://lkml.org/lkml/2015/2/23/694
[3] https://github.com/abrestic/linux/tree/pistachio-clk-v1
Andrew Bresti
On Tue, Feb 24, 2015 at 12:15 AM, Arnd Bergmann wrote:
> On Monday 23 February 2015 17:31:44 Andrew Bresticker wrote:
>> Platforms which use raw zboot images may need to link the image at
>> a fixed address if there is no other way to communicate the load
>> address to the b
CPU clock.
Signed-off-by: Andrew Bresticker
Cc: James Hogan
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
---
.../devicetree/bindings/interrupt-controller/mips-gic.txt | 5 +
drivers/clocksource/mips-gic-timer.c | 10 +++
Add a device-tree binding document for the pin controller present
on the IMG Pistachio SoC.
Signed-off-by: Damien Horsley
Signed-off-by: Andrew Bresticker
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
---
.../bindings/pinctrl/img,pistachio-pinctrl.txt
Add a driver for the pin controller present on the IMG Pistachio SoC.
This driver provides pinmux and pinconfig operations as well as GPIO
and IRQ chips for the GPIO banks.
Signed-off-by: Damien Horsley
Signed-off-by: Govindraj Raja
Signed-off-by: Andrew Bresticker
---
drivers/pinctrl/Kconfig
tches
is available at [2]. I'd like this to go through the MIPS tree with
Linus'/Alex's ACKs if possible.
Cc: Ezequiel Garcia
Cc: James Hartley
Cc: James Hogan
[1] https://lkml.org/lkml/2015/2/23/694
[2] https://github.com/abrestic/linux/tree/pistachio-pinctrl-v1
Andrew Brest
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