Hi Srinivas,
On 16 November 2015 at 12:37, Srinivas Kandagatla
wrote:
>
>
> On 16/11/15 15:33, Ariel D'Alessandro wrote:
>> >>>cut<--
>> From 8cae10eff8ea8da9c5a8058ff75abeeddd8a8224 Mon Sep 17 00:00:00
>> 20
Hi Srinivas, Ariel,
On 30 October 2015 at 12:42, Ariel D'Alessandro
wrote:
> El 26/10/15 a las 11:23, Srinivas Kandagatla escribió:
>>
>>
>> On 19/10/15 18:32, Ariel D'Alessandro wrote:
>>> This commit adds support for NXP LPC18xx EEPROM memory found in NXP
>> s/commit/patch
>
> OK.
>
What's wro
(+ Ariel)
Hi Oliver,
Not sure why there's some many people in Cc for such a silly change.
I guess you are using get_maintainers.pl on the entire patchset and get
this rather long list.
IMO, the value of submitting patches as part of a larger series is to be able to
push patches that need to be a
+DT bindings maintainers
As per the documentation in
Documentation/devicetree/bindings/submitting-patches.txt
this binding should be patch 1/2.
On 16 October 2015 at 11:07, Ariel D'Alessandro
wrote:
> Add the devicetree binding document for NXP LPC18xx EEPROM memory.
>
> Signed-off-by: Ariel D'A
On 14 October 2015 at 03:55, Dmitry Torokhov wrote:
> On Fri, Oct 09, 2015 at 10:46:56AM -0300, Ezequiel Garcia wrote:
>> As per the recent devicetree binding changes, this commit adds the
>> support for the new 'steps-per-period' property.
>>
>> Legacy prop
On 9 October 2015 at 10:57, Rob Herring wrote:
> On Fri, Oct 9, 2015 at 8:46 AM, Ezequiel Garcia
> wrote:
>> This commit deprecates the 'half-period' property and introduces
>> a new property 'steps-per-period'. This property specifies the
>> num
is allows to support rotary-encoder devices with detents wich are capable
of producing a stable event on each step.
Signed-off-by: Guido Martínez
Signed-off-by: Ezequiel Garcia
---
drivers/input/misc/rotary_encoder.c | 87 +++--
include/linux/rotary_encoder.h
s of
rotary-encoders devices.
Signed-off-by: Ezequiel Garcia
---
Documentation/devicetree/bindings/input/rotary-encoder.txt | 9 +
Documentation/input/rotary-encoder.txt | 8 ++--
2 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/b
old behavior.
I'm also submitting Ben Gamari's cleanup, with the commit log
slightly ammended.
Feedback welcome!
[1] http://www.spinics.net/lists/linux-input/msg28701.html
[2] http://www.spinics.net/lists/linux-input/msg27644.html
Ben Gamari (1):
input: rotary-encoder: Use o
From: Ben Gamari
This commit makes uses of_property_read_bool() to read
boolean properties. This is just cosmetic cleanup.
Signed-off-by: Ben Gamari
---
drivers/input/misc/rotary_encoder.c | 9 +++--
1 file changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/input/misc/rotary_en
On 6 October 2015 at 13:27, Harvey Hunt wrote:
> From: Alex Smith
>
> Add device tree nodes for the NEMC and BCH to the JZ4780 device tree,
> and make use of them in the Ci20 device tree to add a node for the
> board's NAND.
>
> Note that since the pinctrl driver is not yet upstream, this include
On 8 September 2015 at 08:53, Jagan Teki wrote:
> On 8 September 2015 at 15:19, Bayi Cheng wrote:
>> Add Mediatek nor flash node
>>
>> Signed-off-by: Bayi Cheng
>> ---
>> arch/arm64/boot/dts/mediatek/mt8173.dtsi | 10 ++
>> 1 file changed, 10 insertions(+)
>>
>> diff --git a/arch/arm64/
On 27 July 2015 at 10:50, Alex Smith wrote:
> Add DT bindings for NAND devices connected to the NEMC on JZ4780 SoCs,
> as well as the hardware BCH controller, used by the jz4780_{nand,bch}
> drivers.
>
> Signed-off-by: Alex Smith
> Cc: Zubair Lutfullah Kakakhel
> Cc: David Woodhouse
> Cc: Brian
d}_poll_timeout_{atomic} here.
Ccing Ariel, maybe he can help with a test.
--
Ezequiel Garcia, VanguardiaSur
www.vanguardiasur.com.ar
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Brian,
Mind if I ping you on this one?
On 9 July 2015 at 17:19, Joachim Eastwood wrote:
> This patch set adds a SPI-NOR driver for the NXP SPI Flash (SPIFI)
> controller that can be found on newer NXP MCUs. For example on the
> LPC18xx and LPC43xx familiy.
>
> NXP SPIFI is a specialized SPI inte
Hi Daniel,
Thanks for the review!
On 4 August 2015 at 06:21, Daniel Lezcano wrote:
> On 07/27/2015 04:02 PM, Govindraj Raja wrote:
>>
>> From: Ezequiel Garcia
>>
>> The Pistachio SoC provides four general purpose timers, and allow
>> to implement a clocksource
Joachim,
On 30 July 2015 at 20:30, Joachim Eastwood wrote:
> On 29 July 2015 at 15:47, Ezequiel Garcia
> wrote:
>> +devicetree guys
>>
>> On 28 July 2015 at 20:22, Joachim Eastwood wrote:
>>> On 29 July 2015 at 00:45, Ezequiel Garcia
>>> wro
+devicetree guys
On 28 July 2015 at 20:22, Joachim Eastwood wrote:
> On 29 July 2015 at 00:45, Ezequiel Garcia
> wrote:
>> On 28 July 2015 at 19:37, Joachim Eastwood wrote:
>>> On 27 July 2015 at 06:45, Ariel D'Alessandro
>>> wrote:
>>>> Add
arm-kernel&m=143016894704253&w=2
>>
>> Joachim Eastwood (2):
>> reset: add driver for lpc18xx rgu
>> doc: dt: add documentation for lpc1850-rgu reset driver
>
> Applied both, thanks.
>
Philipp,
Any chance we can have the reset controllers' tree to linux-n
,spi-nor" compatible
string.
Notice that the binding specifies the chip-specific compatible
as optional (it says _May_):
- compatible : May include a device-specific string consisting of the
manufacturer and name of the chip.
> + ret = spi_nor_scan(&spifi->nor, modalias, flash_r
On 05/30/2015 04:37 PM, Joachim Eastwood wrote:
> On 30 May 2015 at 21:33, Richard Weinberger wrote:
>> Am 30.05.2015 um 20:08 schrieb Ezequiel Garcia:
>>> +Richard
>>>
>>> On 05/30/2015 01:51 PM, Joachim Eastwood wrote:
>>>> Hi Ezequiel,
&g
+Richard
On 05/30/2015 01:51 PM, Joachim Eastwood wrote:
> Hi Ezequiel,
>
> On 30 May 2015 at 17:43, Ezequiel Garcia
> wrote:
>> Hi Joachim,
>>
>> Looks pretty neat. I've just a couple comments.
>>
>> On 05/29/2015 02:50 PM, Joachim Eastwood
fi->clk_reg);
> + if (ret) {
> + dev_err(&pdev->dev, "unable to enable reg clock\n");
> + return ret;
> + }
> +
> + ret = clk_prepare_enable(spifi->clk_spifi);
> + if (ret) {
> + dev_err(&pdev->dev, "unable to enable spifi clock\n");
> + goto dis_clk_reg;
> + }
> +
> + spifi->dev = &pdev->dev;
> + platform_set_drvdata(pdev, spifi);
> +
> + /* Initialize and reset device */
> + nxp_spifi_reset(spifi);
> + writel(0, spifi->io_base + SPIFI_IDATA);
> + writel(0, spifi->io_base + SPIFI_MCMD);
> + nxp_spifi_reset(spifi);
> +
> + flash_np = of_get_next_available_child(pdev->dev.of_node, NULL);
> + if (!flash_np) {
> + dev_err(&pdev->dev, "no spi flash device to configure\n");
> + ret = -ENODEV;
> + goto dis_clks;
> + }
> +
> + ret = nxp_spifi_setup_flash(spifi, flash_np);
> + if (ret) {
> + dev_err(&pdev->dev, "unable to setup flash chip\n");
> + goto dis_clks;
> + }
> +
> + return 0;
> +
> +dis_clks:
> + clk_disable_unprepare(spifi->clk_spifi);
> +dis_clk_reg:
> + clk_disable_unprepare(spifi->clk_reg);
> + return ret;
> +}
> +
> +static int nxp_spifi_remove(struct platform_device *pdev)
> +{
> + struct nxp_spifi *spifi = platform_get_drvdata(pdev);
> +
> + mtd_device_unregister(&spifi->mtd);
> + clk_disable_unprepare(spifi->clk_spifi);
> + clk_disable_unprepare(spifi->clk_reg);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id nxp_spifi_match[] = {
> + {.compatible = "nxp,lpc1773-spifi"},
> + { /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, nxp_spifi_match);
> +
> +static struct platform_driver nxp_spifi_driver = {
> + .probe = nxp_spifi_probe,
> + .remove = nxp_spifi_remove,
> + .driver = {
> + .name = "nxp-spifi",
> + .of_match_table = nxp_spifi_match,
> + },
> +};
> +module_platform_driver(nxp_spifi_driver);
> +
> +MODULE_DESCRIPTION("NXP SPI Flash Interface driver");
> +MODULE_AUTHOR("Joachim Eastwood ");
> +MODULE_LICENSE("GPL v2");
>
--
Ezequiel Garcia, VanguardiaSur
www.vanguardiasur.com.ar
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Add a device-tree binding document for the clocksource driver provided
by Pistachio SoC general purpose timers.
Reviewed-by: Andrew Bresticker
Signed-off-by: Ezequiel Garcia
---
Changes from v2:
* Fix spacing for consistency as pointed out by Sergei.
Changes from v1:
* No changes
This commit introduces a new config, so the user can choose to enable
the General Purpose Timer based clocksource. This option is required
to have CPUFreq support.
Signed-off-by: Ezequiel Garcia
---
arch/mips/Kconfig | 1 +
arch/mips/pistachio/Kconfig | 13 +
2 files
This commit introduces the clockevent frequency update, using
a clock notifier. It will be used to support CPUFreq on platforms
using MIPS GIC based clockevents.
Signed-off-by: Ezequiel Garcia
---
drivers/clocksource/mips-gic-timer.c | 31 ++-
1 file changed, 30
independent clock,
this new clocksource driver will be useful to introduce CPUFreq support
for Pistachio machines.
Signed-off-by: Govindraj Raja
Signed-off-by: Ezequiel Garcia
---
drivers/clocksource/Kconfig | 4 +
drivers/clocksource/Makefile | 1 +
drivers/clocksource/time
Add a device-tree binding document for the clocksource driver provided
by Pistachio SoC general purpose timers.
Reviewed-by: Andrew Bresticker
Signed-off-by: Ezequiel Garcia
---
.../bindings/timer/img,pistachio-gptimer.txt | 28 ++
1 file changed, 28 insertions
For the clock to be used (e.g. get its rate through clk_get_rate)
it should be prepared and enabled first.
Also, while the clock is enabled the driver must hold a reference to it,
so let's remove the call to clk_put.
Reviewed-by: Andrew Bresticker
Signed-off-by: Ezequiel Garcia
---
dr
dback are welcome!
Changes since v1
Addressed review comments by Andrew:
* Fix typo
* Fix style issues
* Use readl/writel accessors instead of raw variants
* Drop spurious comment and of_device_id table
* Add a pistachio_ prefix to clocksource functions
Ezequiel G
This is preparation work for the introduction of clockevent frequency
update with a clock notifier. This is only possible when the device
is passed a clk struct, so let's split the legacy and devicetree
initialization.
Reviewed-by: Andrew Bresticker
Signed-off-by: Ezequiel Garcia
---
dr
This commit adds the required checks on the functions that return
an error. Some of them are not critical, so only a warning is
printed.
Reviewed-by: Andrew Bresticker
Signed-off-by: Ezequiel Garcia
---
drivers/clocksource/mips-gic-timer.c | 16 +---
1 file changed, 13 insertions
On 05/22/2015 01:48 PM, Andrew Bresticker wrote:
> On Thu, May 21, 2015 at 2:41 PM, Ezequiel Garcia
> wrote:
>> The Pistachio SoC provides four general purpose timers, and allow
>> to implement a clocksource driver.
>>
>> This driver can be used as a replacement
On 05/22/2015 01:58 PM, James Hartley wrote:
>
>
>> -Original Message-
>> From: abres...@google.com [mailto:abres...@google.com] On Behalf Of
>> Andrew Bresticker
>> Sent: 22 May 2015 17:50
>> To: Ezequiel Garcia
>> Cc: linux-ker...@v
On 05/21/2015 07:32 PM, Andrew Bresticker wrote:
> On Thu, May 21, 2015 at 2:37 PM, Ezequiel Garcia
> wrote:
>> This commit introduces the clockevent frequency update, using
>> a clock notifier. It will be used to support CPUFreq on platforms
>> using MIPS GIC based c
On 05/21/2015 07:24 PM, Andrew Bresticker wrote:
> On Thu, May 21, 2015 at 2:37 PM, Ezequiel Garcia
> wrote:
>> This is preparation work for the introduction of clockevent frequency
>> update with a clock notifier. This is only possible when the device
>> is passed a cl
On 05/21/2015 07:00 PM, Thomas Gleixner wrote:
> On Thu, 21 May 2015, Ezequiel Garcia wrote:
>> +static cycle_t clocksource_read_cycles(struct clocksource *cs)
>> +{
>> +u32 counter, overflw;
>> +unsigned long flags;
>> +
>> +raw_spin_lock_i
This commit introduces a new config, so the user can choose to enable
the General Purpose Timer based clocksource. This option is required
to have CPUFreq support.
Signed-off-by: Ezequiel Garcia
---
arch/mips/Kconfig | 1 +
arch/mips/pistachio/Kconfig | 13 +
2 files
Add a device-tree binding document for the clocksource driver provided
by Pistachio SoC general purpose timers.
Signed-off-by: Ezequiel Garcia
---
.../bindings/timer/img,pistachio-gptimer.txt | 29 ++
1 file changed, 29 insertions(+)
create mode 100644
Documentation
independent clock,
this new clocksource driver will be useful to introduce CPUFreq support
for Pistachio machines.
Signed-off-by: Govindraj Raja
Signed-off-by: Ezequiel Garcia
---
drivers/clocksource/Kconfig | 4 +
drivers/clocksource/Makefile | 1 +
drivers/clocksource/time
This commit adds the required checks on the functions that return
an error. Some of them are not critical, so only a warning is
printed.
Signed-off-by: Ezequiel Garcia
---
drivers/clocksource/mips-gic-timer.c | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a
This commit introduces the clockevent frequency update, using
a clock notifier. It will be used to support CPUFreq on platforms
using MIPS GIC based clockevents.
Signed-off-by: Ezequiel Garcia
---
drivers/clocksource/mips-gic-timer.c | 31 ++-
1 file changed, 30
For the clock to be used (e.g. get its rate through clk_get_rate)
it should be prepared and enabled first.
Also, while the clock is enabled the driver must hold a reference to it,
so let's remove the call to clk_put.
Signed-off-by: Ezequiel Garcia
---
drivers/clocksource/mips-gic-timer.
This is preparation work for the introduction of clockevent frequency
update with a clock notifier. This is only possible when the device
is passed a clk struct, so let's split the legacy and devicetree
initialization.
Signed-off-by: Ezequiel Garcia
---
drivers/clocksource/mips-gic-timer.c
dback are welcome!
Ezequiel Garcia (7):
clocksource: mips-gic: Enable the clock before using it
clocksource: mips-gic: Add missing error returns checks
clocksource: mips-gic: Split clocksource and clockevent initialization
clocksource: mips-gic: Update clockevent frequency on clock
Andrew,
On 04/07/2015 04:44 PM, Andrew Bresticker wrote:
[..]
> +static int pistachio_pinmux_enable(struct pinctrl_dev *pctldev,
> +unsigned func, unsigned group)
> +{
> + struct pistachio_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
> + const struct pi
Just a silly comment.
On 04/07/2015 04:44 PM, Andrew Bresticker wrote:
[..]
> +
> +static const struct pinmux_ops pistachio_pinmux_ops = {
> + .get_functions_count = pistachio_pinmux_get_functions_count,
> + .get_function_name = pistachio_pinmux_get_function_name,
> + .get_function_gro
clocks
> devicetree: Add bindings for the ATH79 GPIO controllers
> MIPS: ath79: Add OF support to the GPIO driver
> of: Add vendor prefix for TP-Link Technologies Co. Ltd
> MIPS: Add basic support for the TL-WR1043ND version 1
>
Hi Alban,
I've booted a Carambola2 using t
Hi Andrew,
On 04/07/2015 04:44 PM, Andrew Bresticker wrote:
[..]
> +static int pistachio_gpio_register(struct pistachio_pinctrl *pctl)
> +{
> + struct device_node *node = pctl->dev->of_node;
> + struct pistachio_gpio_bank *bank;
> + unsigned int i;
> + int irq, ret = 0;
> +
> +
On 02/25/2015 02:04 PM, Gregory CLEMENT wrote:
>>
>> My conclusions about these registers are based on experimental data. The
>> documentation is very sparse, but the Thermal Manager Control and Status
>> Register looks like the preferred register given the way it is laid out in
>> the
>> public s
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
Hi Thierry,
On 01/30/2015 06:18 AM, Thierry Reding wrote:
> On Thu, Jan 29, 2015 at 01:32:09PM -0300, Ezequiel Garcia wrote:
>> On 01/20/2015 07:52 AM, Ezequiel Garcia wrote:
>>>
>>>
>>> On 01/09/2015 02:54 P
On 01/29/2015 03:12 PM, Jonathan Cameron wrote:
> On 29/01/15 16:29, Ezequiel Garcia wrote:
>> Hi Jonathan,
>>
>> On 01/20/2015 05:37 PM, Jonathan Cameron wrote:
>> [..]
>>>
>>> Hi, I'm afraid that I'm a little stalled on sending it on bec
On 01/20/2015 07:52 AM, Ezequiel Garcia wrote:
>
>
> On 01/09/2015 02:54 PM, Ezequiel Garcia wrote:
>> A new round for the IMG PWM driver.
>>
>> The IMG PWM controller is muxed with a PDM controller, through a shared
>> so-called periph register bit, wh
Hi Jonathan,
On 01/20/2015 05:37 PM, Jonathan Cameron wrote:
[..]
>
> Hi, I'm afraid that I'm a little stalled on sending it on because Greg
> hasn't yet picked up my last pull request. In the mean time I've applied
> it to the branch that will get rebased once he's taken that and pushed it
> out
On 01/20/2015 10:59 AM, Guenter Roeck wrote:
> On 01/20/2015 03:13 AM, Ezequiel Garcia wrote:
>> Hi Wim,
>>
>> On 01/06/2015 10:19 AM, Ezequiel Garcia wrote:
>>> Here's the seventh round for IMG PDC Watchdog driver.
>>> The series is based on v3.19-rc3.
On 01/28/2015 03:57 PM, Guenter Roeck wrote:
> On Wed, Jan 28, 2015 at 03:39:22PM -0300, Ezequiel Garcia wrote:
>> On 01/20/2015 10:59 AM, Guenter Roeck wrote:
>>> On 01/20/2015 03:13 AM, Ezequiel Garcia wrote:
>>>> Hi Wim,
>>>>
>>>> On 01
On 01/20/2015 05:37 PM, Jonathan Cameron wrote:
> On 20/01/15 10:54, Ezequiel Garcia wrote:
>>
>>
>> On 01/10/2015 11:15 AM, Jonathan Cameron wrote:
>>> On 06/01/15 20:47, Ezequiel Garcia wrote:
>>>> This series add the support for an ADC IP block from C
On 01/20/2015 10:59 AM, Guenter Roeck wrote:
> On 01/20/2015 03:13 AM, Ezequiel Garcia wrote:
>> Hi Wim,
>>
>> On 01/06/2015 10:19 AM, Ezequiel Garcia wrote:
>>> Here's the seventh round for IMG PDC Watchdog driver.
>>> The series is based on v3
Hi Wim,
On 01/06/2015 10:19 AM, Ezequiel Garcia wrote:
> Here's the seventh round for IMG PDC Watchdog driver.
> The series is based on v3.19-rc3.
>
Guenter has reviewed both patches. Do you think you can review this
soonishly and let me know if you have more comments?
We are
On 01/11/2015 10:57 PM, Peter Pan 潘栋 (peterpandong) wrote:
>> On 01/08/2015 02:04 AM, Peter Pan 潘栋 (peterpandong) wrote:
> This commit adds the devicetree binding document that specifies the
> spi nand devices support.
>
> Signed-off-by: Peter Pan
> ---
> Documentation/d
On 01/10/2015 11:15 AM, Jonathan Cameron wrote:
> On 06/01/15 20:47, Ezequiel Garcia wrote:
>> This series add the support for an ADC IP block from Cosmic Circuits.
>> The patchset is based on v3.19-rc3.
>>
>> As agreed with Rob, this series drops the vendor pr
On 01/09/2015 02:54 PM, Ezequiel Garcia wrote:
> A new round for the IMG PWM driver.
>
> The IMG PWM controller is muxed with a PDM controller, through a shared
> so-called periph register bit, which sets the output as PWM or PDM.
> Because this register is not part of the pin c
A new round for the IMG PWM driver.
The IMG PWM controller is muxed with a PDM controller, through a shared
so-called periph register bit, which sets the output as PWM or PDM.
Because this register is not part of the pin controller block, but rather
PWM/PDM specific, and because the register is al
Signed-off-by: Naidu Tellapati
Signed-off-by: Sai Masarapu
Signed-off-by: Ezequiel Garcia
---
drivers/pwm/Kconfig | 13 +++
drivers/pwm/Makefile | 1 +
drivers/pwm/pwm-img.c | 250 ++
3 files changed, 264 insertions(+)
create mode 100644
From: Naidu Tellapati
Add binding document for IMG Pulse Width Modulator (PWM) DAC present on the
Pistachio SOC. The PWM DAC has four channels.
Signed-off-by: Naidu Tellapati
Signed-off-by: Sai Masarapu
Signed-off-by: Ezequiel Garcia
---
Documentation/devicetree/bindings/pwm/img-pwm.txt
On 01/08/2015 12:49 PM, Vladimir Zapolskiy wrote:
> Hi Ezequiel,
>
> On 07.01.2015 19:20, Ezequiel Garcia wrote:
>> From: Naidu Tellapati
>>
>> The Pistachio SOC from Imagination Technologies includes a Pulse Width
>> Modulation DAC which produces 1 to 4 di
On 01/08/2015 02:04 AM, Peter Pan 潘栋 (peterpandong) wrote:
>>> This commit adds the devicetree binding document that specifies the
>>> spi nand devices support.
>>>
>>> Signed-off-by: Peter Pan
>>> ---
>>> Documentation/devicetree/bindings/mtd/spi-nand.txt | 22
>> ++
>>> 1
Hi,
On 01/08/2015 11:21 AM, One Thousand Gnomes wrote:
[..]
>
> and - you get the idea 8)
>
Thanks for all the comments. Before preparing a new patchset fixing
them, I'd like to check with the maintainers (Thierry on PWM, and Greg
on misc) about the validity of the general approach.
Thierry ha
On 01/07/2015 09:52 PM, Peter Pan 潘栋 (peterpandong) wrote:
> This commit adds the devicetree binding document that specifies the
> spi nand devices support.
>
> Signed-off-by: Peter Pan
> ---
> Documentation/devicetree/bindings/mtd/spi-nand.txt | 22
> ++
> 1 file changed,
From: Naidu Tellapati
Add binding document for IMG Pulse Width Modulator (PWM) DAC present on the
Pistachio SOC. The PWM DAC has four channels.
Signed-off-by: Naidu Tellapati
Signed-off-by: Sai Masarapu
Signed-off-by: Ezequiel Garcia
---
Documentation/devicetree/bindings/pwm/img-pwm.txt
This patchset is the seventh round for the IMG PWM and PDM DAC drivers.
The PWM driver is a typical PWM, and I don't think there's anything
controversial there.
The PDM driver -on the other side- is a bit ackward. At first, we tried
to support it as a PWM, but after some lengthy discussions, we c
From: Naidu Tellapati
Add binding document for the Pulse Density Modulator (PDM) DAC present on the
Pistachio SOC.
Signed-off-by: Naidu Tellapati
Signed-off-by: Arul Ramasamy
Signed-off-by: Ezequiel Garcia
---
Documentation/devicetree/bindings/misc/img-pdm.txt | 54 ++
1
control targets such as LCD
backlight.
Signed-off-by: Naidu Tellapati
Signed-off-by: Arul Ramasamy
Signed-off-by: Ezequiel Garcia
---
drivers/misc/Kconfig| 13 ++
drivers/misc/Makefile | 1 +
drivers/misc/img-pdm.c | 608
include/linux
Signed-off-by: Naidu Tellapati
Signed-off-by: Sai Masarapu
Signed-off-by: Ezequiel Garcia
---
drivers/pwm/Kconfig | 13 +++
drivers/pwm/Makefile | 1 +
drivers/pwm/pwm-img.c | 250 ++
3 files changed, 264 insertions(+)
create mode 100644
;
> + cdns,block-size = <16>;
> + cdns,read-delay = <4>;
> + cdns,tshsl-ns = <50>;
> + cdns,tsd2d-ns = <50>;
> + cdns,tchsh-ns = <4>;
> + cdns,tslch-ns = <4>;
> + }
> + }
>
--
Ezequiel Garcia, VanguardiaSur
www.vanguardiasur.com.ar
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On 01/06/2015 06:30 PM, Ken Wilson wrote:
> Create a new dt binding for the Armada 375 that supports up to
> 3 chip selects but uses the same prescaler values and algorithm
> as the basic orion binding.
>
> Update the Armada 370 so that it supports up to 4 chip selects.
>
> This has been tested o
From: Phani Movva
Add the devicetree binding document for Cosmic Circuits 10001 ADC device.
Reviewed-by: Andrew Bresticker
Acked-by: Rob Herring
Signed-off-by: Phani Movva
Signed-off-by: Naidu Tellapati
Signed-off-by: Ezequiel Garcia
---
.../devicetree/bindings/iio/adc/cc10001_adc.txt
From: Phani Movva
This commit adds support for Cosmic Circuits 10001 10-bit ADC device.
Reviewed-by: Andrew Bresticker
Signed-off-by: Phani Movva
Signed-off-by: Naidu Tellapati
[ezequiel: code style cleaning]
Signed-off-by: Ezequiel Garcia
---
drivers/iio/adc/Kconfig | 11
Reviewed-by: Andrew Bresticker
Acked-by: Rob Herring
Signed-off-by: Ezequiel Garcia
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
b/Documentation/devicetree/bindings/vendor
d code cleaning based on the feedback.
Ezequiel Garcia (1):
DT: Add a vendor prefix for Cosmic Circuits
Phani Movva (2):
iio: adc: Cosmic Circuits 10001 ADC driver
DT: iio: adc: Add CC_10001 binding documentation
.../devicetree/bindings/iio/adc/cc10001_adc.txt| 22 ++
.../devicetree/
v, mtd->oobsize,
> + &nand->oob_dma, GFP_KERNEL);
> + if (!nand->oob_buf)
> + return -ENOMEM;
> +
> + chip->ecc.mode = NAND_ECC_HW;
> + chip->ecc.size = 512;
> + chip->ecc.bytes = mtd->oobsize;
> + chip-&g
Hi Rob,
Thanks a lot for the comments.
On 01/06/2015 01:30 PM, Rob Herring wrote:
> On Tue, Jan 6, 2015 at 9:29 AM, Ezequiel Garcia
> wrote:
>> From: Phani Movva
>>
>> Add the devicetree binding document for Cosmic Circuits 10001 ADC device.
>>
>> Signed-o
Acked-by: Rob Herring
Signed-off-by: Ezequiel Garcia
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
b/Documentation/devicetree/bindings/vendor-prefixes.txt
index b1df0ad
From: Phani Movva
This commit adds support for Cosmic Circuits 10001 10-bit ADC device.
Signed-off-by: Phani Movva
Signed-off-by: Naidu Tellapati
[ezequiel: code style cleaning]
Signed-off-by: Ezequiel Garcia
---
drivers/iio/adc/Kconfig | 11 ++
drivers/iio/adc/Makefile | 1
From: Phani Movva
Add the devicetree binding document for Cosmic Circuits 10001 ADC device.
Signed-off-by: Phani Movva
Signed-off-by: Naidu Tellapati
[Ezequiel: minor style cleaning]
Signed-off-by: Ezequiel Garcia
---
.../devicetree/bindings/iio/adc/cc10001_adc.txt| 22
WER_UP, to make the code
less silly.
* Error out when no valid sample can be read (i.e. when end-of-conversion
poll times out).
* ... plus some assorted code cleaning based on the feedback.
Ezequiel Garcia (1):
DT: Add a vendor prefix for Cosmic Circuits
Phani Movva (2):
iio: a
From: Naidu Tellapati
Add the devicetree binding document for ImgTec PDC Watchdog Timer.
Reviewed-by: Andrew Bresticker
Signed-off-by: Naidu Tellapati
Signed-off-by: Jude Abraham
Signed-off-by: Ezequiel Garcia
---
.../devicetree/bindings/watchdog/imgpdc-wdt.txt | 19
From: Naidu Tellapati
This commit adds support for ImgTec PowerDown Controller Watchdog Timer.
Reviewed-by: Andrew Bresticker
Signed-off-by: Naidu Tellapati
Signed-off-by: Jude Abraham
[ezequiel: Minor style fixes]
Signed-off-by: Ezequiel Garcia
---
drivers/watchdog/Kconfig | 11
Here's the seventh round for IMG PDC Watchdog driver.
The series is based on v3.19-rc3.
Thanks!
Changes from v6:
* Reworked set_timeout function to get rid of the min_delay field.
* Addressed a few comments made by Guenter Roeck.
* Added a description of the clocks to the devicetree bindin
Hi Hartmut,
On 12/10/2014 08:43 PM, Hartmut Knaack wrote:
> Ezequiel Garcia schrieb am 27.11.2014 um 16:39:
>> From: Phani Movva
>>
>> This commit adds support for Cosmic Circuits 10001 10-bit ADC device.
> Still some issues left, unfortunately things I pointed out
On 12/05/2014 10:25 AM, Jonathan Cameron wrote:
> On 05/12/14 13:12, Jonathan Cameron wrote:
>>
>>
>> On December 5, 2014 11:55:40 AM GMT+00:00, Ezequiel Garcia
>> wrote:
>>> Hi Jonathan,
>>>
>>> On 11/27/2014 12:39 PM, Ezequiel Garcia wrot
Hi Jonathan,
On 11/27/2014 12:39 PM, Ezequiel Garcia wrote:
> Changes from v4:
>
> * Added a compile-time dependency on REGULATOR and HAVE_CLK.
>
> * Replaced the silly XOR operation for a proper mask out of the
> available channels.
>
> Changes from v3:
&g
Wim,
On 11/27/2014 01:54 AM, Naidu Tellapati wrote:
> This patchset provides support for the PowerDown Controller (PDC) Watchdog
> Timer
> found on Pistachio SOC from Imagination Technologies (ImgTec).
>
> The series is based on 3.18-rc5.
>
> I am re-sending the series with correct Signed-off-b
Hi Thierry,
On 11/28/2014 03:12 PM, Naidu Tellapati wrote:
> The Pistachio SOC from Imagination Technologies includes – 4x PDM blocks
> and 1x “basic PWM� block with four output channels. These share 4 MFIO
> pins,
> each PWM channel being muxed with each PDM block output (0-3 muxed with 0-
Acked-by: Rob Herring
Signed-off-by: Ezequiel Garcia
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 723999d
From: Phani Movva
Add the devicetree binding document for Cosmic Circuits 10001 ADC device.
Signed-off-by: Phani Movva
Signed-off-by: Naidu Tellapati
[Ezequiel: minor style cleaning]
Signed-off-by: Ezequiel Garcia
---
.../devicetree/bindings/iio/adc/cc10001_adc.txt| 22
times out).
* ... plus some assorted code cleaning based on the feedback.
Ezequiel Garcia (1):
DT: Add a vendor prefix for Cosmic Circuits
Phani Movva (2):
iio: adc: Cosmic Circuits 10001 ADC driver
DT: iio: adc: Add CC_10001 binding documentation
.../devicetree/bindings/iio/adc/cc100
From: Phani Movva
This commit adds support for Cosmic Circuits 10001 10-bit ADC device.
Signed-off-by: Phani Movva
Signed-off-by: Naidu Tellapati
[Ezequiel: code style cleaning]
Signed-off-by: Ezequiel Garcia
---
drivers/iio/adc/Kconfig | 11 ++
drivers/iio/adc/Makefile | 1
On 11/27/2014 12:16 PM, Lars-Peter Clausen wrote:
> [...]
+
+adc_dev->reg = devm_regulator_get(&pdev->dev, "vref");
+if (IS_ERR_OR_NULL(adc_dev->reg))
+return -EINVAL;
>>> if (IS_ERR(adc_dev->reg))
>>> return PTR_ERR(adc
On 11/25/2014 07:53 PM, Hartmut Knaack wrote:
> Ezequiel Garcia schrieb am 25.11.2014 23:03:
>>
>>
>> On 11/25/2014 06:41 PM, Hartmut Knaack wrote:
>>>>
>>>> Unless I'm missing something, that's exactly what XOR does.
>>>>
>
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