d.org;
>> devicetree@vger.kernel.org; Li Yang-Leo-R58472; Lian Minghuan-B31939
>> Subject: Re: [PATCH] dts/ls2080a: Update PCIe compatible
>>
>> On Tue, Nov 24, 2015 at 02:04:35PM +0800, Mingkai Hu wrote:
>> > From: Minghuan Lian
>> >
>> > The patch
On Mon, Nov 16, 2015 at 9:11 AM, Linus Walleij wrote:
> On Tue, Nov 3, 2015 at 12:19 PM, Liu Gang wrote:
>
>> The GPIO block for ls2080a platform has little endian registers,
>> the GPIO driver needs this property to read/write registers by
>> right interface.
>>
>> Signed-off-by: Liu Gang
>>
>>
Hi ARM SoC maintainers,
After several rounds of review I think the patch series is generally in
good shape. Can someone from the ARM maintainers group help to pick
these patches up?
Some small updates to v7:
- Re-grouped the series to only include device tree related patches for
arm-soc subsyste
From: Shaohui Xie
Signed-off-by: Shaohui Xie
Signed-off-by: Mingkai Hu
Signed-off-by: Wenbin Song
Signed-off-by: Hou Zhiqiang
Signed-off-by: Li Yang
---
V7:
- Rebased on latest LS2080 patches.
V6:
- No change.
V5:
- Move gic, timer and pmu nodes out of SoC node.
V4:
- Add soc node
From: Mingkai Hu
LS1043a is an SoC with 4 ARMv8 A53 cores and most other IP blocks
are similar to LS1021a which also complies to Freescale Chassis 2.1 spec.
Created LS1043a SoC DTSI file to be included by board level DTS files.
Signed-off-by: Li Yang
Signed-off-by: Hou Zhiqiang
Signed-off-by
From: Mingkai Hu
Signed-off-by: Mingkai Hu
Signed-off-by: Hou Zhiqiang
---
v2-v7: no change
Documentation/devicetree/bindings/arm/fsl.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt
b/Documentation/devicetree/bindings/arm/fsl.txt
inde
On Thu, Oct 1, 2015 at 4:58 PM, Scott Wood wrote:
> On Thu, 2015-10-01 at 16:42 -0500, Li Yang wrote:
>> On Thu, Oct 1, 2015 at 3:05 PM, Stuart Yoder
>> wrote:
>> > Hi Rob,
>> >
>> > Had a question about your comments on the patch below.
>> >
&
On Thu, Oct 1, 2015 at 3:05 PM, Stuart Yoder wrote:
> Hi Rob,
>
> Had a question about your comments on the patch below.
>
> You singled out 3 nodes (gic,uart,clockgen) and said "This should be under a
> bus node."
>
> What is special about those 3 nodes types? There are a bunch of other memory
On Mon, Sep 28, 2015 at 2:29 PM, Russell King - ARM Linux
wrote:
> On Mon, Sep 28, 2015 at 07:14:30PM +, Li Leo wrote:
>> I saw some discussion going on last year about the permissive license
>> to be used in ARM device tree files. I know a lot of files have been
>> changed to use GPLv2/X11 l
On Fri, Sep 11, 2015 at 12:53 AM, Yuan Yao wrote:
> Add Freescale Queue Direct Memory Access(qDMA) controller support.
> This module can be found on LS-1 and LS-2 SoCs.
>
> This add the legacy mode support for qDMA.
>
> Signed-off-by: Yuan Yao
> ---
> Documentation/devicetree/bindings/dma/fsl-qd
On Wed, Sep 9, 2015 at 4:07 AM, Arnd Bergmann wrote:
> On Tuesday 08 September 2015 15:06:16 Li Yang wrote:
>> On Mon, Sep 7, 2015 at 6:32 AM, Arnd Bergmann wrote:
>> > On Friday 04 September 2015 12:27:46 Bhupesh Sharma wrote:
>> >> @@ -4,7 +4,8 @@ This PCIe h
On Sat, Sep 5, 2015 at 3:11 AM, Sharma Bhupesh
wrote:
>> From: pku@gmail.com [mailto:pku@gmail.com]
>> Sent: Saturday, September 05, 2015 2:43 AM
>> On Fri, Sep 4, 2015 at 3:16 PM, Sharma Bhupesh
>> wrote:
>> >> From: pku@gmail.com [mailto:pku@gmail.com]
>> >> Sent: Friday, Septem
On Mon, Sep 7, 2015 at 3:23 AM, wrote:
> From: Tang Yuantian
>
> adds bindings for Freescale QorIQ AHCI SATA controller.
>
> Signed-off-by: Tang Yuantian
> ---
> .../devicetree/bindings/ata/ahci-fsl-qoriq.txt | 21
> +
> 1 file changed, 21 insertions(+)
> create mode
On Sun, Sep 6, 2015 at 12:39 AM, Yuantian Tang
wrote:
> Hi,
>
{snip}
>>
>> This will break booting new kernels with old dtb files, something which in
>> general is considered a big non-no, I suggest adding a comment that this has
>> been superseded by the new ahci_qoriq.c code, and maybe add a dat
On Mon, Sep 7, 2015 at 6:32 AM, Arnd Bergmann wrote:
> On Friday 04 September 2015 12:27:46 Bhupesh Sharma wrote:
>> @@ -4,7 +4,8 @@ This PCIe host controller is based on the Synopsis
>> Designware PCIe IP
>> and thus inherits all the common properties defined in designware-pcie.txt.
>>
>> Requ
On Fri, Sep 4, 2015 at 3:16 PM, Sharma Bhupesh
wrote:
>> From: pku@gmail.com [mailto:pku@gmail.com]
>> Sent: Friday, September 04, 2015 10:27 PM
>> On Fri, Sep 4, 2015 at 1:57 AM, Bhupesh Sharma
>> wrote:
>> > This patch adds bindings for QIXIS FPGA controller found on FSL boards.
>>
>> A
On Fri, Sep 4, 2015 at 2:05 AM, Bhupesh Sharma
wrote:
> This patch updates the LS2085a DTSI (DTS Include) file to add
> support for various peripherals supported by FSL LS2085a SoC, for e.g.:
The title and description here are still using the old LS2085 name.
> - USB 3.0 Host
> -
On Fri, Sep 4, 2015 at 1:57 AM, Bhupesh Sharma
wrote:
> This patch adds bindings for QIXIS FPGA controller found on FSL boards.
A general comment: when you are updating the device tree bindings.
You should cc the devicetree@vger.kernel.org mailing list.
>
> Some Freescale boards like LS2080AQDS/
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