qup_wait_writeready waits only on a output fifo empty event.
Change the same function to accept the event and data length
to wait as parameters. This way the same function can be used for
timeouts in other places as well.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 67
t to coalesce each i2c_msg in i2c_msgs for fifo and
block mode in Patch 2. Also addressed further code comments.
http://comments.gmane.org/gmane.linux.drivers.i2c/22497
[V2] Addressed comments from Ivan T. Ivanov, Andy Gross [v1] Initial Version
Sricharan R (6):
i2c: qup: Change qup_wa
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 7786408..bd1be53 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom
For each block a data_write/read tag and data_len tag is added to
the output fifo. For the final block of data write_stop/read_stop
tag is used.
Signed-off-by: Andy Gross
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 415 ---
1 file ch
for the same.
This is required for some clients like touchscreen which keeps
incrementing counts across individual transfers and 'STOP' bit inbetween
resets the counter, which is not required.
This patch adds the support in non-dma mode.
Signed-off-by: S
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 753bdfd..7786408 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
transfer more than 256 bytes, without a
'stop' which is not possible otherwise.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 447 ++-
1 file changed, 439 insertions(+), 8 deletions(-)
diff --git a/drivers/i2c/busses/i2c-qup.c b/d
the existing driver with the addition of generic bindings.
http://www.spinics.net/lists/linux-arm-msm/msg10077.html
This series is based on the IOMMU probe deferral series from
Laurent Pinchart
https://lkml.org/lkml/2015/5/14/786
Tested this series on ifc6410 board.
Sricharan R
The cacheablity attributes are set when IOMMU_CACHE property
is true. So cachebility is set as either noncached (normal)
or cached (normal WBWA) directly and avoid setting using
tex remap.
Signed-off-by: Sricharan R
---
drivers/iommu/msm_iommu.c | 66
This adds the xlate callback which gets invoked during
device registration from DT. The master devices gets added
through this. Also adding the iommu_of_setup callback here.
Signed-off-by: Sricharan R
---
drivers/iommu/msm_iommu.c | 51 +--
1 file
Now that the driver is DT adapted, bus_set_iommu gets called
only when on compatible matching. So the driver should not
break multiplatform builds now. So remove the BROKEN config.
Signed-off-by: Sricharan R
---
drivers/iommu/Kconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers
were responsible for programming all of the iommus/contexts
for the device. Now while adapting to generic DT bindings we maintain the
list of iommus, contexts that each master domain is connected to and
program all of them on attach/detach.
Signed-off-by: Sricharan R
---
.../devicetree/bindings
There are only two functions left in msm_iommu_dev.c. Move it to
msm_iommu.c and delete the file.
Signed-off-by: Sricharan R
---
drivers/iommu/Makefile| 2 +-
drivers/iommu/msm_iommu.c | 163 +
drivers/iommu/msm_iommu_dev.c | 204
This patch uses IOMMU_OF_DECLARE to register the driver
and the iommu_ops. So when master devices of the iommu are
registered, of_xlate callback can be used to add the master
configurations to the smmu driver.
Signed-off-by: Sricharan R
---
drivers/iommu/arm-smmu.c | 36
From: Mitchel Humpherys
This adds the support to turn on the regulators required
for SMMUs. It is turned on during the SMMU probe and remains
'on' till the device exists.
Signed-off-by: Sricharan R
---
.../devicetree/bindings/iommu/arm,smmu.txt | 3 ++
drivers/iommu/
):
iommu/arm-smmu: add support for specifying clocks
iommu/arm-smmu: Add support for specifying regulators
Sricharan R (2):
iommu/arm-smmu: Init driver using IOMMU_OF_DECLARE
iommu/arm-smmu: Add xlate callback for initializing master devices
from dt
.../devicetree/bindings/iommu/arm,smmu.txt
probe
and remains 'on' till the device exists.
Signed-off-by: Mitchel Humpherys
Signed-off-by: Sricharan R
---
.../devicetree/bindings/iommu/arm,smmu.txt | 11 +++
drivers/iommu/arm-smmu.c | 86 +-
2 files changed, 94 insertions(+),
This adds of_xlate callback to arm-smmu driver. xlate callback
is called during device registration from DT for those master
devices attached to iommus using generic iommu bindings.
Signed-off-by: Sricharan R
---
drivers/iommu/arm-smmu.c | 36
1 file changed
transfer more than 256 bytes, without a
'stop' which is not possible otherwise.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 431 +--
1 file changed, 415 insertions(+), 16 deletions(-)
diff --git a/drivers/i2c/busses/i2c-qup.c b/d
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 37b47b5..f138202 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
The qup_i2c_write/read_one functions can be split to have
the common initialization code and function to loop around
the data bytes separately. This way the initialization code
can be reused while adding v2 tags functionality.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 147
For each block a data_write/read tag and data_len tag is added to
the output fifo. For the final block of data write_stop/read_stop
tag is used.
Signed-off-by: Andy Gross
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 330 ++-
1 file ch
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index f138202..17dcda3 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom
de in Patch 2. Also addressed further code comments.
http://comments.gmane.org/gmane.linux.drivers.i2c/22497
[V2] Addressed comments from Ivan T. Ivanov, Andy Gross [v1] Initial Version
Sricharan R (7):
i2c: qup: Change qup_wait_writeready function to use for all timeouts
qup: i2c: factor ou
for the same.
This is required for some clients like touchscreen which keeps
incrementing counts across individual transfers and 'STOP' bit inbetween
resets the counter, which is not required.
This patch adds the support in non-dma mode.
Signed-off-by: S
qup_wait_writeready waits only on a output fifo empty event.
Change the same function to accept the event and data length
to wait as parameters. This way the same function can be used for
timeouts in otherplaces as well.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 67
Hi Ivan,
On 04/16/2015 02:06 PM, Ivan T. Ivanov wrote:
Hi Sricharan,
On Wed, 2015-04-15 at 20:14 +0530, Sricharan R wrote:
+#define QUP_I2C_MX_CONFIG_DURING_RUN BIT(31)
Could you explain what is this for?
This is a new feature in the V2 version of the controller,
to
Hi Ivan,
Sorry resending again, because wrapping seemed to be
somehow wrong in my previous response.
On 04/15/2015 02:19 PM, Ivan T. Ivanov wrote:
Hi Sricharan,
On Wed, 2015-04-15 at 12:09 +0530, Sricharan R wrote:
+/* frequency definitions for high speed and max speed */
+#define
Hi Ivan,
On 04/15/2015 02:19 PM, Ivan T. Ivanov wrote:
Hi Sricharan,
On Wed, 2015-04-15 at 12:09 +0530, Sricharan R wrote:
+/* frequency definitions for high speed and max speed */
+#define I2C_QUP_CLK_FAST_FREQ 100
This is fast mode, if I am not mistaken.
ya, up to 1MHZ
Hi Ivan,
On 04/14/2015 08:46 PM, Ivan T. Ivanov wrote:
Hi Sricharan,
On Sat, 2015-04-11 at 12:39 +0530, Sricharan R wrote:
From: Andy Gross
QUP from version 2.1.1 onwards, supports a new format of
i2c command tags. Tag codes instructs the controller to
perform a operation like read/write
Hi,
On 04/12/2015 03:42 AM, Sergei Shtylyov wrote:
Hello.
On 04/11/2015 10:09 AM, Sricharan R wrote:
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b
transfer more than 256 bytes,
without a 'stop' which is not possible otherwise.
Signed-off-by: Sricharan R
---
[V3] Addressed comments from Andy Gross
to use macros for qup_i2c_wait_ready function.
drivers/i2c/busses/i2c-qup.c | 415 +
qup_wait_writeready waits only on a output fifo empty event.
Change the same function to accept the event and data length
to wait as parameters. This way the same function can be used for
timeouts in otherplaces as well.
Signed-off-by: Sricharan R
---
[v3] Addressed comments from Andy Gross
port for the same.
This is required for some clients like touchscreen which keeps
incrementing counts across individual transfers and 'STOP' bit inbetween
resets the counter, which is not required.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 200 +
upport for the same.
For each block a data_write/read tag and data_len tag is added to
the output fifo. For the final block of data write_stop/read_stop
tag is used.
Signed-off-by: Andy Gross
Signed-off-by: Sricharan R
---
[V3] Addressed comments from Andy Gross
to coalesce each i2c_msg i
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index e265ec1..2c26151 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 2c26151..d741856 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom
agon board eeprom client on i2c bus1
[V3] Added support to coalesce each i2c_msg in i2c_msgs for fifo and
block mode in Patch 2. Also addressed further code comments.
[V2] Addressed comments from Ivan T. Ivanov, Andy Gross [v1] Initial Version
Andy Gross (1):
i2c: qup: Add V2 tags support
Sric
transfer more than 256 bytes,
without a 'stop' which is not possible otherwise.
Signed-off-by: Sricharan R
---
[v2] Addressed comments from Ivan T. Ivanov
drivers/i2c/busses/i2c-qup.c | 371 ++-
1 file changed, 366 insertions(+), 5 deletion
Signed-off-by: Sricharan R
---
[v2] Changed dma channel names as per comments.
arch/arm/boot/dts/qcom-msm8974.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index c2e8711..5cb0772 100644
--- a/arch/arm/boot
port for the same.
This is required for some clients like touchscreen which keeps
incrementing counts across individual transfers and 'STOP' bit inbetween
resets the counter, which is not required.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 199 +
upport for the same.
For each block a data_write/read tag and data_len tag is added to
the output fifo. For the final block of data write_stop/read_stop
tag is used.
Signed-off-by: Andy Gross
Signed-off-by: Sricharan R
---
[v2] Addressed comments from Ivan T. Ivanov
drivers/i2c/busses/i2c-q
Signed-off-by: Sricharan R
---
[v2] Used macros for interrupts property.
arch/arm/boot/dts/qcom-msm8974.dtsi | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 2d11641..c2e8711 100644
qup_wait_writeready waits only on a output fifo empty event.
Change the same function to accept the event and data length
to wait as parameters. This way the same function can be used for
timeouts in otherplaces as well.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 30
agon board eeprom client on i2c bus1
[V2] Addressed comments from Ivan T. Ivanov, Andy Gross
[v1] Initial Version
Andy Gross (1):
i2c: qup: Add V2 tags support
Sricharan R (5):
i2c: qup: Change qup_wait_writeready function to use for all timeouts
i2c: qup: Add bam dma capabilities
i2c: qup
Hi Ivan,
On 03/26/2015 01:01 PM, Ivan T. Ivanov wrote:
Hi Sricharan,
On Thu, 2015-03-26 at 11:14 +0530, Sricharan R wrote:
+ if (msg->flags & I2C_M_RD)
+ qup->rx_tag_len = (qup->blocks << 1);
here again.
hmm, why not shift ?
Because it makes
Hi Ivan,
On 03/25/2015 06:40 PM, Ivan T. Ivanov wrote:
Hi Sricharan,
On Fri, 2015-03-13 at 23:19 +0530, Sricharan R wrote:
#define QUP_I2C_MASTER_GEN 0x408
+#define QUP_I2C_MASTER_CONFIG 0x408
Unused.
Ok, will remove it
#define QUP_READ_LIMIT 256
+#define
Hi Ivan,
On 03/25/2015 05:54 PM, Ivan T. Ivanov wrote:
Hi Sricharan,
On Fri, 2015-03-13 at 23:19 +0530, Sricharan R wrote:
From: Andy Gross
QUP from version 2.1.1 onwards, supports a new format of
i2c command tags. Tag codes instructs the controller to
perform a operation like read/write
qup_wait_writeready waits only on a output fifo empty event.
Change the same function to accept the event and data length
to wait as parameters. This way the same function can be used for
timeouts in otherplaces as well.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 30
transfer more than 256 bytes,
without a 'stop' which is not possible otherwise.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 365 ++-
1 file changed, 359 insertions(+), 6 deletions(-)
diff --git a/drivers/i2c/busses/i2c-qup.c b/d
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index e265ec1..3f648ae 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm
port for the same.
This is required for some clients like touchscreen which keeps
incrementing counts across individual transfers and 'STOP' bit inbetween
resets the counter, which is not required.
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 192 +
upport for the same.
For each block a data_write/read tag and data_len tag is added to
the output fifo. For the final block of data write_stop/read_stop
tag is used.
Signed-off-by: Andy Gross
Signed-off-by: Sricharan R
---
drivers/i2c/busses/i2c-qup.c | 342
Signed-off-by: Sricharan R
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi
b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 3f648ae..1ec7ec5 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom
agon board eeprom client
on i2c bus1
Andy Gross (1):
i2c: qup: Add V2 tags support
Sricharan R (5):
i2c: qup: Change qup_wait_writeready function to use for all timeouts
i2c: qup: Add bam dma capabilities
i2c: qup: Transfer every i2c_msg in i2c_msgs without stop
dts: msm8974: Add blsp2_ba
Hi Tony,
On Tuesday 01 July 2014 01:29 PM, Tony Lindgren wrote:
> * Jason Cooper [140630 12:30]:
>>
>> Whole series applied to irqchip/crossbar, I'll give it a day or two in
>> -next, then I'll merge it into irqchip/core.
>>
>> Tony: Right now, it's immutable unless you tell me I applied somethin
Hi Tony,
On Thursday 26 June 2014 01:14 PM, Tony Lindgren wrote:
> * Sricharan R [140626 00:29]:
>> From: R Sricharan
>>
>> There is a IRQ crossbar device in the soc, which
>> maps the irq requests from the peripherals to the
>> mpu interrupt controller's
27;s input line. The crossbar device is used to map
a peripheral input to a free mpu's interrupt controller line.
Here, adding a new crossbar device node and replacing all the peripheral
interrupt numbers with its fixed crossbar input lines.
Signed-off-by: Sricharan R
Signed-off-by: Nis
From: R Sricharan
There is a IRQ crossbar device in the soc, which maps the
irq requests from the peripherals to the mpu interrupt
controller's inputs. The gic provides the support for such
IPs in the form of routable-irqs. So adding the property
here to gic node.
Signed-off-by: Sricha
This series introduces DT support for crossbar device and
changes dra7 peripherals to use crossbar number instead of irq.
This depends on below driver fixes and cleanup series.
http://marc.info/?l=linux-omap&m=140376708127157&w=2
[V2] Rebased on 3.15 mainline.
[V3] Added ti,irqs-skip property and
-off-by: Nishanth Menon
Signed-off-by: Sricharan R
Acked-by: Santosh Shilimkar
---
drivers/irqchip/irq-crossbar.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 20105bc..51d4b87 100644
--- a/drivers
tch warning:
WARNING: Unnecessary space before function pointer arguments
#37: FILE: drivers/irqchip/irq-crossbar.c:37:
+ void (*write) (int, int);
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
Acked-by: Santosh Shilimkar
---
.../devicetree/bindings/arm/omap/crossbar.txt |3 +++
Adding kerneldoc for unmap callback function.
Signed-off-by: Sricharan R
Acked-by: Santosh Shilimkar
---
drivers/irqchip/irq-crossbar.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index a8c6156..518d712
From: Nishanth Menon
crossbar_of_init always returns -ENOMEM in case of errors.
There can be other causes of failure like invalid data from
DT. So return a appropriate error value for that case.
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
Acked-by: Santosh Shilimkar
---
drivers
, GFP_KERNEL);
WARNING: Prefer kcalloc over kzalloc with multiply
+ cb->register_offsets = kzalloc(max * sizeof(int), GFP_KERNEL);
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
Acked-by: Santosh Shilimkar
---
drivers/irqchip/irq-crossbar.c |7 ---
1 file changed, 4
use it to
validate requests.
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
Acked-by: Santosh Shilimkar
---
.../devicetree/bindings/arm/omap/crossbar.txt |2 ++
drivers/irqchip/irq-crossbar.c | 21 ++--
2 files changed, 21 insertions(+), 2
If crossbar_of_init returns with a error, then set the cb pointer
to null.
Signed-off-by: Sricharan R
Acked-by: Santosh Shilimkar
---
drivers/irqchip/irq-crossbar.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index
(drivers/irqchip/irq-crossbar.c:27): Scanning doc for struct
Warning(drivers/irqchip/irq-crossbar.c:39): No description found for parameter
'write'
2 warnings
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
Acked-by: Santosh Shilimkar
---
drivers/irqchip/irq-crossbar.c |4 ++
From: Nishanth Menon
IS_ERR_VALUE makes sense only *if* there could be valid values in
negative error range. But in the cases that we do use it, there is no
such case. Just remove the same.
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
Acked-by: Santosh Shilimkar
---
drivers
ned-off-by: Nishanth Menon
Signed-off-by: Sricharan R
Acked-by: Santosh Shilimkar
---
drivers/irqchip/irq-crossbar.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 4be30c0..a39cb31 100644
--- a/driv
From: Nishanth Menon
This is a basic check to ensure that crossbar register needs to be
written. This ensures that we have a common check which is used in
both map and unmap logic.
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
Acked-by: Santosh Shilimkar
---
drivers/irqchip/irq
ation/programming of crossbar should be avoided.
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
Acked-by: Santosh Shilimkar
---
.../devicetree/bindings/arm/omap/crossbar.txt | 12 ++--
drivers/irqchip/irq-crossbar.c | 20 ++--
2
Signed-off-by: Sricharan R
Acked-by: Santosh Shilimkar
---
.../devicetree/bindings/arm/omap/crossbar.txt | 17 +
1 file changed, 17 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
From: Nishanth Menon
Using err1,2,3,4 etc makes it hard to ensure a new exit path in the
middle will not result in spurious changes, so rename the error paths
as per the function it does.
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
Acked-by: Santosh Shilimkar
---
drivers
From: Nishanth Menon
Today '0' is actually reserved, but may not be the same in the future.
So, use a flag to mark the GIC interrupts that are reserved.
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
Acked-by: Santosh Shilimkar
---
drivers/irqchip/irq-crossbar.c |
From: Nishanth Menon
When, in the system due to varied reasons, interrupts might be unusable
due to hardware behavior, but register maps do exist, then those interrupts
should be skipped while mapping irq to crossbars.
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
Acked-by: Santosh
quirky hardware with direct hardwiring
of GIC
Sricharan R (2):
irqchip: crossbar: Set cb pointer to null in case of error
irqchip: crossbar: Add kerneldoc for crossbar_domain_unmap callback
.../devicetree/bindings/arm/omap/crossbar.txt | 36 +
drivers/irqchip
Hi Jason,
On Saturday 21 June 2014 08:27 AM, Jason Cooper wrote:
> On Mon, Jun 16, 2014 at 04:53:16PM +0530, Sricharan R wrote:
>> From: Nishanth Menon
>>
>> On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10, 131,
>> 132, 133 are direct wired to hardwar
Ok. I will look for your comments on the rest of the patches and
resend with capitalization fix said above.
> On Mon, Jun 16, 2014 at 04:53:03PM +0530, Sricharan R wrote:
>> From: Nishanth Menon
>>
>> When, in the system due to varied reasons, interrupts might be unusable
>
On Monday 16 June 2014 07:34 PM, Santosh Shilimkar wrote:
> Sricharan,
>
> On Monday 16 June 2014 07:23 AM, Sricharan R wrote:
>> This series does some cleanups, fixes for handling two interrupts
>> getting mapped twice to same crossbar and provides support for
>>
27;s input line. The crossbar device is used to map
a peripheral input to a free mpu's interrupt controller line.
Here, adding a new crossbar device node and replacing all the peripheral
interrupt numbers with its fixed crossbar input lines.
Signed-off-by: Sricharan R
Signed-off-by: Nis
From: R Sricharan
There is a IRQ crossbar device in the soc, which maps the
irq requests from the peripherals to the mpu interrupt
controller's inputs. The gic provides the support for such
IPs in the form of routable-irqs. So adding the property
here to gic node.
Signed-off-by: Sricha
This series introduces DT support for crossbar device and
changes dra7 peripherals to use crossbar number instead of irq.
This depends on below driver fixes and cleanup series.
https://lkml.org/lkml/2014/6/16/218
[V2] Rebased on 3.15 mainline.
[V3] Added ti,irqs-skip property and ti,irqs-safe-ma
From: Nishanth Menon
When, in the system due to varied reasons, interrupts might be unusable
due to hardware behavior, but register maps do exist, then those interrupts
should be skipped while mapping irq to crossbars.
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
---
[V3
From: Nishanth Menon
Today '0' is actually reserved, but may not be the same in the future.
So, use a flag to mark the GIC interrupts that are reserved.
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
---
drivers/irqchip/irq-crossbar.c |5 +++--
1 file changed, 3
tch warning:
WARNING: Unnecessary space before function pointer arguments
#37: FILE: drivers/irqchip/irq-crossbar.c:37:
+ void (*write) (int, int);
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
---
[V3] introduced ti,irqs-safe-map which defines a safe value
to initialize the crossb
-off-by: Nishanth Menon
Signed-off-by: Sricharan R
---
drivers/irqchip/irq-crossbar.c | 16
1 file changed, 16 insertions(+)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 20105bc..51d4b87 100644
--- a/drivers/irqchip/irq-crossbar.c
+++ b
ned-off-by: Nishanth Menon
Signed-off-by: Sricharan R
---
[V3] Added more description to commit log.
drivers/irqchip/irq-crossbar.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index d1f67f6..9528cf2 100
, GFP_KERNEL);
WARNING: Prefer kcalloc over kzalloc with multiply
+ cb->register_offsets = kzalloc(max * sizeof(int), GFP_KERNEL);
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
---
[V3] Added checkpatch fixes as well to this.
drivers/irqchip/irq-crossbar.c |7 ---
1
(drivers/irqchip/irq-crossbar.c:27): Scanning doc for struct
Warning(drivers/irqchip/irq-crossbar.c:39): No description found for parameter
'write'
2 warnings
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
---
[V3] Reworded the commit log
drivers/irqchip/irq-crossbar.c |4 ++
From: Nishanth Menon
IS_ERR_VALUE makes sense only *if* there could be valid values in
negative error range. But in the cases that we do use it, there is no
such case. Just remove the same.
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
---
drivers/irqchip/irq-crossbar.c |6
From: Nishanth Menon
Using err1,2,3,4 etc makes it hard to ensure a new exit path in the
middle will not result in spurious changes, so rename the error paths
as per the function it does.
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
---
drivers/irqchip/irq-crossbar.c | 23
Adding kerneldoc for unmap callback function.
Signed-off-by: Sricharan R
---
[V3] Reworded the kerneldoc
drivers/irqchip/irq-crossbar.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 9b4c0f1..df16ef8
If crossbar_of_init returns with a error, then set the cb pointer
to null.
Signed-off-by: Sricharan R
---
drivers/irqchip/irq-crossbar.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/irqchip/irq-crossbar.c b/drivers/irqchip/irq-crossbar.c
index 5bd7f3d..9b4c0f1 100644
--- a
From: Nishanth Menon
This is a basic check to ensure that crossbar register needs to be
written. This ensures that we have a common check which is used in
both map and unmap logic.
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
---
drivers/irqchip/irq-crossbar.c | 14
use it to
validate requests.
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
---
.../devicetree/bindings/arm/omap/crossbar.txt |2 ++
drivers/irqchip/irq-crossbar.c | 21 ++--
2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/Doc
ation/programming of crossbar should be avoided.
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
---
.../devicetree/bindings/arm/omap/crossbar.txt | 12 ++--
drivers/irqchip/irq-crossbar.c | 20 ++--
2 files changed, 28 insertions(
From: Nishanth Menon
crossbar_of_init always returns -ENOMEM in case of errors.
There can be other causes of failure like invalid data from
DT. So return a appropriate error value for that case.
Signed-off-by: Nishanth Menon
Signed-off-by: Sricharan R
---
[V3] Changed commit log
drivers
Signed-off-by: Sricharan R
---
.../devicetree/bindings/arm/omap/crossbar.txt | 17 +
1 file changed, 17 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/omap/crossbar.txt
b/Documentation/devicetree/bindings/arm/omap/crossbar.txt
index 41aef44..8210ea4 100644
o identify
valid crossbar mapping
irqchip: crossbar: introduce centralized check for crossbar write
documentation: dt: omap: crossbar: add description for interrupt
consumer
irqchip: crossbar: allow for quirky hardware with direct hardwiring
of GIC
Sricharan R (2):
irqchip: crossb
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