On Mon, Dec 21, 2015 at 05:53:41PM -0800, David Daney wrote:
> From: David Daney
>
> No change in functionality.
>
> Move structure definitions into a separate header file. Split probe
> function in to two parts:
>
>- a small driver specific probe function (gen_pci_probe)
>
>- a commo
On Mon, Dec 21, 2015 at 05:53:42PM -0800, David Daney wrote:
> From: David Daney
>
> Some Cavium ThunderX processors require quirky access methods for the
> config space of the PCIe bridge. Add a driver to provide these config
> space accessor functions. The pci-host-generic driver code is used
On Tue, Dec 22, 2015 at 03:04:48PM +0530, Ganapatrao Kulkarni wrote:
> On Fri, Dec 18, 2015 at 12:00 AM, Ganapatrao Kulkarni
> wrote:
> > On Thu, Dec 17, 2015 at 10:41 PM, Will Deacon wrote:
> >> This all looks pretty reasonable, but I'd like to see an Ack from a
>
Mark,
On Fri, Dec 18, 2015 at 06:03:47PM +, Mark Rutland wrote:
> On Fri, Dec 18, 2015 at 09:00:18PM +0530, Ganapatrao Kulkarni wrote:
> > Hi Mark,
> >
> > On Fri, Dec 18, 2015 at 7:48 PM, Mark Rutland wrote:
> > >> +- distance-matrix
> > >> + This property defines a matrix to describe the
Hello,
This all looks pretty reasonable, but I'd like to see an Ack from a
devicetree maintainer on the binding before I merge anything (and I see
that there are outstanding comments from Rutland on that).
On Tue, Nov 17, 2015 at 10:50:40PM +0530, Ganapatrao Kulkarni wrote:
> Adding numa support
On Tue, Dec 15, 2015 at 10:42:42AM +, Will Deacon wrote:
> On Tue, Dec 15, 2015 at 10:37:00AM +, Mark Rutland wrote:
> > On Tue, Dec 15, 2015 at 09:33:20AM +0100, Geert Uytterhoeven wrote:
> > > Use commas instead of periods.
> > >
> > > Signed-off-by
[adding devicetree since I'd like an Ack from them if possible]
On Thu, Dec 17, 2015 at 03:29:36PM +0530, Prem Mallappa wrote:
> Signed-off-by: Prem Mallappa
Please can you add a commit message for this?
> ---
> Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt | 5 +
> 1 file change
On Tue, Dec 15, 2015 at 10:37:00AM +, Mark Rutland wrote:
> On Tue, Dec 15, 2015 at 09:33:20AM +0100, Geert Uytterhoeven wrote:
> > Use commas instead of periods.
> >
> > Signed-off-by: Geert Uytterhoeven
>
> Acked-by: Mark Rutland
Cheers, Mark.
Rob -- do you want to pick this up, or shal
On Mon, Dec 14, 2015 at 02:30:53PM +0100, Linus Walleij wrote:
> On Thu, Dec 10, 2015 at 3:32 PM, Mark Rutland wrote:
> > On Thu, Dec 10, 2015 at 03:14:15PM +0100, Linus Walleij wrote:
> >> diff --git a/Documentation/devicetree/bindings/arm/l2cc.txt
> >> b/Documentation/devicetree/bindings/arm/l2
On Fri, Nov 06, 2015 at 04:42:52PM +0800, Yong Wu wrote:
> On Fri, 2015-10-09 at 10:23 +0800, Yong Wu wrote:
> > This patch is for ARM Short Descriptor Format.
> >
> > Signed-off-by: Yong Wu
> > ---
>
> Hi Will, Robin,
>Is there any comment about this patch?
>As our project request, We a
On Mon, Nov 02, 2015 at 02:03:13PM +, Mark Rutland wrote:
> > > > +/**
> > > > + * struct smccc_res - Result from SMC/HVC call
> > > > + * @a0-a3 result values from registers 0 to 3
> > > > + */
> > > > +struct smccc_res {
> > > > + unsigned long a0;
> > > > + unsigned long a1;
> >
On Mon, Nov 02, 2015 at 02:08:26PM +0100, Jens Wiklander wrote:
> On Mon, Nov 02, 2015 at 11:55:39AM +0000, Will Deacon wrote:
> > On Thu, Oct 29, 2015 at 09:21:24AM +0100, Jens Wiklander wrote:
> > > Switch to use a generic interface for issuing SMC/HVC based on ARM SMC
> &
On Thu, Oct 29, 2015 at 09:21:24AM +0100, Jens Wiklander wrote:
> Switch to use a generic interface for issuing SMC/HVC based on ARM SMC
> Calling Convention. Removes now the now unused psci-call.S.
>
> Signed-off-by: Jens Wiklander
> ---
> arch/arm/kernel/Makefile | 1 -
> arch/arm/kernel
Hi Jens,
On Thu, Oct 29, 2015 at 09:21:23AM +0100, Jens Wiklander wrote:
> Adds helpers to do SMC and HVC based on ARM SMC Calling Convention.
> CONFIG_HAVE_SMCCC is enabled for architectures that may support
> the SMC or HVC instruction. It's the responsibility of the caller
> to know if the SMC
On Wed, Oct 14, 2015 at 02:54:19PM +0200, Joerg Roedel wrote:
> On Fri, Oct 09, 2015 at 10:23:05AM +0800, Yong Wu wrote:
> > This patch is for ARM Short Descriptor Format.
> >
> > Signed-off-by: Yong Wu
>
> I think it would be good if Will Deacon could have a l
On Fri, Oct 09, 2015 at 06:41:51PM +0100, Robin Murphy wrote:
> On 09/10/15 16:57, Will Deacon wrote:
> >On Tue, Sep 22, 2015 at 03:12:47PM +0100, Yong Wu wrote:
> >> I would like to show you a problem I met, The recursion here may
> >>lead to stack overflow whi
On Tue, Sep 22, 2015 at 03:12:47PM +0100, Yong Wu wrote:
> I would like to show you a problem I met, The recursion here may
> lead to stack overflow while we test FHD video decode.
>
> From the log, I get the internal variable in the error case: the
> "size" is 0x10, the "iova" is 0xf
On Fri, Oct 09, 2015 at 03:11:07PM +0100, Liviu Dudau wrote:
> On Fri, Oct 09, 2015 at 08:54:33AM -0500, Rob Herring wrote:
> > On Fri, Oct 9, 2015 at 8:45 AM, Liviu Dudau wrote:
> > > Juno R1 board sports a functional PCIe host bridge that is
> > > compliant with the SBSA standard found here[1].
On Wed, Sep 23, 2015 at 08:39:27PM +0100, Arnd Bergmann wrote:
> On Wednesday 23 September 2015 20:35:45 Will Deacon wrote:
> > On Wed, Sep 23, 2015 at 08:27:41PM +0100, Arnd Bergmann wrote:
> > > On Wednesday 23 September 2015 11:21:56 David Daney wrote:
> > > > &
On Wed, Sep 23, 2015 at 08:27:41PM +0100, Arnd Bergmann wrote:
> On Wednesday 23 September 2015 11:21:56 David Daney wrote:
> > >>
> > >> /* Limit the bus-range to fit within reg */
> > >> -bus_max = pci->cfg.bus_range->start +
> > >> - (resource_size(&pci->cfg.res) >> pci->cf
On Wed, Sep 23, 2015 at 07:21:56PM +0100, David Daney wrote:
> On 09/23/2015 11:01 AM, Will Deacon wrote:
> > On Thu, Sep 17, 2015 at 11:02:11PM +0100, David Daney wrote:
> [...]
> >
> >> Properties of the /chosen node:
> >> diff --git a/drivers/pci/host/pc
On Thu, Sep 17, 2015 at 11:02:11PM +0100, David Daney wrote:
> From: David Daney
>
> There are two problems with the bus_max calculation:
>
> 1) The u8 data type can overflow for large config space windows.
>
> 2) The calculation is incorrect for a bus range that doesn't start at
>zero.
>
Moved most of the code to pci_bus_fixup_irqs(),
> making this patch very simple.
Acked-by: Will Deacon
Will
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On Wed, Sep 23, 2015 at 06:08:39PM +0100, David Daney wrote:
> On 09/23/2015 10:01 AM, Marc Zyngier wrote:
> > On Tue, 22 Sep 2015 17:00:06 -0700
> > David Daney wrote:
> >
> >> From: David Daney
> >>
> >> Call of_msi_map_rid() to handle mapping of the requester id.
> >>
> >> Signed-off-by: David
thing in devicetree/bindings/pci/host-generic-pci.txt
>
> Signed-off-by: David Daney
> ---
> .../devicetree/bindings/pci/host-generic-pci.txt | 8 +++---
> drivers/pci/host/pci-host-generic.c| 29
> ++
> 2 files changed, 34 insertions(+), 3 de
Hi Lorenzo,
On Wed, Sep 16, 2015 at 12:28:52PM +0100, Lorenzo Pieralisi wrote:
> On Wed, Sep 16, 2015 at 11:41:53AM +0100, Will Deacon wrote:
> > > Here is the current code:
> > >
> > > >>bus_range = pci->cfg.bus_range;
> > > >>
On Tue, Sep 15, 2015 at 10:05:59PM +0100, Jens Wiklander wrote:
> On Tue, Sep 15, 2015 at 07:26:45PM +0100, Will Deacon wrote:
> > On Mon, Sep 14, 2015 at 09:30:30AM +0100, Jens Wiklander wrote:
> > > On Fri, Aug 21, 2015 at 01:43:31PM +0200, Jens Wiklander wrote:
> > >
On Mon, Aug 03, 2015 at 11:21:16AM +0100, Yong Wu wrote:
> This patch is for ARM Short Descriptor Format.
>
> Signed-off-by: Yong Wu
> ---
> drivers/iommu/Kconfig| 18 +
> drivers/iommu/Makefile | 1 +
> drivers/iommu/io-pgtable-arm-short.c | 813
> +
Hello Yong,
On Mon, Sep 14, 2015 at 01:25:00PM +0100, Yong Wu wrote:
> On Tue, 2015-07-21 at 18:11 +0100, Will Deacon wrote:
> > > + ret = _arm_short_map(data, iova, paddr, pgdprot, pteprot, large);
> > > +
> > > + tlb->tlb_add_flush(i
On Tue, Sep 15, 2015 at 07:45:56PM +0100, David Daney wrote:
> On 09/15/2015 11:35 AM, Will Deacon wrote:
> > On Tue, Sep 15, 2015 at 07:02:54PM +0100, David Daney wrote:
> >> On 09/15/2015 10:49 AM, Will Deacon wrote:
> >>> On Sat, Sep 12, 2015 at 12:21
On Sat, Sep 12, 2015 at 01:07:19AM +0100, David Daney wrote:
> From: David Daney
>
> The config space for external PCIe root complexes on some Cavium
> ThunderX SoCs is very similar to CAM and ECAM, but differs in the
> shift values that have to be applied to the bus and devfn numbers to
> compos
On Tue, Sep 15, 2015 at 07:02:54PM +0100, David Daney wrote:
> On 09/15/2015 10:49 AM, Will Deacon wrote:
> > On Sat, Sep 12, 2015 at 12:21:57AM +0100, David Daney wrote:
> >>/* Limit the bus-range to fit within reg */
> >> - bus_max
On Mon, Sep 14, 2015 at 09:30:30AM +0100, Jens Wiklander wrote:
> On Fri, Aug 21, 2015 at 01:43:31PM +0200, Jens Wiklander wrote:
> > On Fri, Aug 21, 2015 at 10:24:30AM +0100, Will Deacon wrote:
> > > On Thu, Aug 20, 2015 at 12:37:29PM +0100, Jens Wiklander wrote:
> > >
resources);
> if (!bus) {
> dev_err(dev, "Scanning rootbus failed");
Acked-by: Will Deacon
Will
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On Sat, Sep 12, 2015 at 12:21:59AM +0100, David Daney wrote:
> From: David Daney
>
> If the device tree node for the bus has a "msi-parent" property, use
> that as the default MSI controller for devices on the bus. Add device
> tree binding documentation describing the new property.
>
> This al
On Sat, Sep 12, 2015 at 12:21:57AM +0100, David Daney wrote:
> From: David Daney
>
> There are two problems with the bus_max calculation:
>
> 1) The u8 data type can overflow for large config space windows.
>
> 2) The calculation is incorrect for a bus range that doesn't start at
>zero.
>
d
> initialize it when the bus device is probed. Keep a copy of the
> gen_pci_cfg_bus_ops structure, instead of a pointer to a global copy,
> to future proof against the addition of bus specific elements to
> struct pci_ops.
This looks ok to me:
Acked-by: Will Deacon
Will
> Sig
Hi David,
On Sat, Sep 12, 2015 at 12:21:55AM +0100, David Daney wrote:
> From: David Daney
>
> Use pci_walk_bus() to restrict the fixup irq actions to only the bus
> being created.
>
> If we create multiple buses with pci-host-generic, or there are buses
> created by other drivers, we don't wan
- prop = of_get_property(of_chosen, "linux,pci-probe-only", NULL);
> - if (prop) {
> - if (*prop)
> - pci_add_flags(PCI_PROBE_ONLY);
> - else
> - pci_clear_flags(PCI_PROBE_ONLY);
> - }
> + of_pc
On Thu, Sep 03, 2015 at 10:52:02AM +0100, Ganapatrao Kulkarni wrote:
> On Fri, Aug 14, 2015 at 10:09 PM, Ganapatrao Kulkarni
> wrote:
> > Adding numa support for arm64 based platforms.
> > This patch adds by default the dummy numa node and
> > maps all memory and cpus to node 0.
> > using this pat
On Thu, Aug 20, 2015 at 12:37:29PM +0100, Jens Wiklander wrote:
> On Wed, Aug 19, 2015 at 05:50:09PM +0100, Will Deacon wrote:
> > On Wed, Aug 19, 2015 at 09:40:25AM +0100, Jens Wiklander wrote:
> > > Adds helpers to do SMC based on ARM SMC Calling Convention.
> > > C
On Wed, Aug 19, 2015 at 09:40:25AM +0100, Jens Wiklander wrote:
> Adds helpers to do SMC based on ARM SMC Calling Convention.
> CONFIG_HAVE_SMCCC is enabled for architectures that may support
> the SMC instruction. It's the responsibility of the caller to
> know if the SMC instruction is supported
On Fri, Aug 14, 2015 at 09:26:21PM +0100, Bjorn Helgaas wrote:
> On Fri, Aug 14, 2015 at 11:43 AM, Will Deacon wrote:
> > On Fri, Aug 14, 2015 at 05:40:51PM +0100, Bjorn Helgaas wrote:
> >> Do we need support for pci-probe-only in pci-host-generic at all?
> >> You
pci_check_probe_only(of_chosen);
You could probably just make this take void, as the probe-only property
is always in the /chosen node.
Either way:
Acked-by: Will Deacon
Will
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On Fri, Aug 14, 2015 at 05:40:51PM +0100, Bjorn Helgaas wrote:
> On Fri, Aug 14, 2015 at 05:19:17PM +0100, Marc Zyngier wrote:
> > When pci-host-generic looks for the probe-only property, it seems
> > to trust the DT to be correctly written, and assumes that there
> > is a parameter to the property
On Wed, Aug 12, 2015 at 03:47:48PM +0100, Sricharan R wrote:
> The cacheablity attributes are set when IOMMU_CACHE property
> is true. So cachebility is set as either noncached (normal)
> or cached (normal WBWA) directly and avoid setting using
> tex remap.
Does this IOMMU support the ARMv7 short
On Fri, Jul 31, 2015 at 08:55:37AM +0100, Yong Wu wrote:
> About the AP bits, I may have to add a new quirk for it...
>
> Current I add AP in pte like this:
> #define ARM_SHORT_PTE_RD_WR(3 << 4)
> #define ARM_SHORT_PTE_RDONLY BIT(9)
>
> pteprot |= ARM_SHORT_PTE_RD_WR;
>
>
>
On Wed, Jul 29, 2015 at 06:41:31AM +0100, Yong Wu wrote:
> On Mon, 2015-07-27 at 16:49 +0100, Robin Murphy wrote:
> > On 27/07/15 16:31, Russell King - ARM Linux wrote:
> > > On Mon, Jul 27, 2015 at 02:23:26PM +0100, Robin Murphy wrote:
> > >> On 16/07/15 10:04, Yong Wu wrote:
> > >>> This patch ad
On Tue, Jul 28, 2015 at 02:37:43PM +0100, Yong Wu wrote:
> On Tue, 2015-07-28 at 12:00 +0100, Will Deacon wrote:
> > On Tue, Jul 28, 2015 at 06:08:14AM +0100, Yong Wu wrote:
> > > On Mon, 2015-07-27 at 15:11 +0100, Will Deacon wrote:
> > > > On Mon, Jul 27, 2015 at
On Tue, Jul 28, 2015 at 06:08:14AM +0100, Yong Wu wrote:
> On Mon, 2015-07-27 at 15:11 +0100, Will Deacon wrote:
> > On Mon, Jul 27, 2015 at 03:05:38PM +0100, Robin Murphy wrote:
> > > On 27/07/15 05:21, Yong Wu wrote:
> > > >>>>> +
On Mon, Jul 27, 2015 at 05:24:31AM +0100, Yong Wu wrote:
> On Fri, 2015-07-24 at 17:55 +0100, Will Deacon wrote:
> > On Fri, Jul 24, 2015 at 06:43:13AM +0100, Yong Wu wrote:
> > > On Tue, 2015-07-21 at 15:59 +0100, Will Deacon wrote:
> > > > On Thu, Jul 16, 2015 at 1
On Mon, Jul 27, 2015 at 03:05:38PM +0100, Robin Murphy wrote:
> On 27/07/15 05:21, Yong Wu wrote:
> > + } else {/* page or largepage */
> > + if (quirk & IO_PGTABLE_QUIRK_SHORT_MTK) {
> > + if (large) { /* special Bit */
>
> Th
On Fri, Jul 24, 2015 at 06:43:13AM +0100, Yong Wu wrote:
> On Tue, 2015-07-21 at 15:59 +0100, Will Deacon wrote:
> > On Thu, Jul 16, 2015 at 10:04:34AM +0100, Yong Wu wrote:
> > > +static void mtk_iommu_tlb_flush_all(void *cookie)
> > > +{
> > > + stru
On Fri, Jul 24, 2015 at 06:24:26AM +0100, Yong Wu wrote:
> On Tue, 2015-07-21 at 18:11 +0100, Will Deacon wrote:
> > On Thu, Jul 16, 2015 at 10:04:32AM +0100, Yong Wu wrote:
> > > +/* level 2 pagetable */
> > > +#define ARM_SHORT_PTE_TYPE_LARGE
Hello,
This is looking better, but I still have some concerns.
On Thu, Jul 16, 2015 at 10:04:32AM +0100, Yong Wu wrote:
> This patch is for ARM Short Descriptor Format.
>
> Signed-off-by: Yong Wu
> ---
> drivers/iommu/Kconfig| 18 +
> drivers/iommu/Makefile |
[adding Robin]
On Fri, Jul 17, 2015 at 05:53:22PM +0100, Sricharan R wrote:
> This patch uses IOMMU_OF_DECLARE to register the driver
> and the iommu_ops. So when master devices of the iommu are
> registered, of_xlate callback can be used to add the master
> configurations to the smmu driver.
I'd
On Fri, Jul 17, 2015 at 05:53:24PM +0100, Sricharan R wrote:
> From: Mitchel Humpherys
>
> On some platforms with tight power constraints it is polite to only
> leave your clocks on for as long as you absolutely need them. Currently
> we assume that all clocks necessary for SMMU register access a
Hi Yong Wu,
On Thu, Jul 16, 2015 at 10:04:34AM +0100, Yong Wu wrote:
> This patch adds support for mediatek m4u (MultiMedia Memory Management
> Unit).
[...]
> +static void mtk_iommu_tlb_flush_all(void *cookie)
> +{
> + struct mtk_iommu_domain *domain = cookie;
> + void __iomem *base;
On Thu, Jul 16, 2015 at 02:34:41PM +0100, Mark Rutland wrote:
> Hi Will,
Hi Mark,
[adding David, since he's working on PCI/ITS stuff atm]
> The below is an attempt at an MSI binding, derived from my original
> example. It extends msi-parent inoto a phandle+(optional args) style
> property.
>
>
On Thu, Jul 16, 2015 at 09:30:43AM +0100, Joerg Roedel wrote:
> From: Joerg Roedel
>
> The main use of MAX_PHANDLE_ARGS is to define the number of
> args elements in 'struct of_phandle_args'. This struct is
> often declared on the stack and thus it is impractical to
> increase MAX_PHANDLE_ARGS ag
ndle_with_var_args() instead.
Looks good to me:
Acked-by: Will Deacon
Thanks!
Will
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On Wed, Jul 08, 2015 at 02:30:50PM +0100, Mark Rutland wrote:
> On Tue, Jun 09, 2015 at 11:17:54AM +0100, Mark Rutland wrote:
> > On Fri, Jun 05, 2015 at 10:05:34AM +0100, Will Deacon wrote:
> > > Mark: how do you see this co-existing/merging with the current bindings?
> >
dentifies
the set of CPUs signalling the PPI in question.
Tested-by: Stephen Boyd # Krait PMU
Signed-off-by: Will Deacon
---
Documentation/devicetree/bindings/arm/pmu.txt | 12 +++--
arch/arm/kernel/perf_event.c | 65 ++-
2 files changed, 53 insertions(
On Mon, Jun 29, 2015 at 11:57:49AM +0100, Ganapatrao Kulkarni wrote:
> Hi Catalin, Will, Mark,
>
> can you please have a look of numa patches and share your review comments.
Nothing has changed since the last time you poked me about this series:
- There are open comments from Hanjun
- The de
Hi Joerg,
Thanks for looking at this! I'm fine with the general idea, but obviously
the first patch needs an Ack from a devicetree person.
One comment on the code below...
On Thu, Jun 25, 2015 at 04:52:28PM +0100, Joerg Roedel wrote:
> The function of_parse_phandle_with_args() can only handle 16
On Tue, Jun 16, 2015 at 03:35:41PM +0100, Daniel Kurtz wrote:
> The cros-ec-keyboard.dtsi snippet is useful for both arm and arm64 boards.
> Create a link between the two.
>
> This may not be the most scalable solution, so consider it temporary until
> we find a more central repository for such sh
On Tue, Jun 09, 2015 at 11:17:54AM +0100, Mark Rutland wrote:
> On Fri, Jun 05, 2015 at 10:05:34AM +0100, Will Deacon wrote:
> > On Thu, Jun 04, 2015 at 11:19:30PM +0100, Chalamarla, Tirumalesh wrote:
> > > > On Jun 1, 2015, at 3:22 AM, Mark Rutland wrote:
> > > &
On Fri, May 15, 2015 at 10:43:28AM +0100, Yong Wu wrote:
> This patch adds support for mediatek m4u (MultiMedia Memory Management Unit).
After looking at the page table code, I thought I'd come and check your
TLB invalidate code here.
> +static void mtk_iommu_tlb_flush_all(void *cookie)
> +{
> +
Hello,
Thanks for the patch, it's good to see another user of the generic
IO page-table code. However, I have quite a lot of comments on the code.
On Fri, May 15, 2015 at 10:43:26AM +0100, Yong Wu wrote:
> This patch is for ARM Short Descriptor Format.It has 2-levels
> pagetable and the allocator
On Thu, Jun 04, 2015 at 11:19:30PM +0100, Chalamarla, Tirumalesh wrote:
> > On Jun 1, 2015, at 3:22 AM, Mark Rutland wrote:
> > It's possible to specify that the paths exist. I expect that software
> > would select which to use at runtime.
> >
> My worry is how to define any priorities/preference
arm systems too.
>
> This patch moves the functions handling the power_state parameter
> to generic PSCI firmware layer code.
>
> Signed-off-by: Lorenzo Pieralisi
> Acked-by: Sudeep Holla
> Cc: Will Deacon
> Cc: Catalin Marinas
> Cc: Mark Rutland
On Tue, May 26, 2015 at 05:27:33PM +0100, Fu Wei wrote:
> On 26 May 2015 at 23:36, Guenter Roeck wrote:
> > On Tue, May 26, 2015 at 04:18:42PM +0100, Will Deacon wrote:
> >> Sure, the device it describes may only ever exist on ARM systems, but by
> >> that logic then
On Tue, May 26, 2015 at 04:02:56PM +0100, Ashwin Chaugule wrote:
> On 26 May 2015 at 08:28, Will Deacon wrote:
> > On Mon, May 25, 2015 at 11:03:13AM +0100, fu@linaro.org wrote:
> >> From: Fu Wei
> >>
> >> Parse SBSA Generic Watchdog Structure in G
On Mon, May 25, 2015 at 11:03:13AM +0100, fu@linaro.org wrote:
> From: Fu Wei
>
> Parse SBSA Generic Watchdog Structure in GTDT table of ACPI,
> and create a platform device with that information.
> This platform device can be used by the ARM SBSA Generic
> Watchdog driver.
>
> Tested-by: Su
Hi Joachim,
On Tue, Apr 28, 2015 at 06:24:37PM +0100, Joachim Eastwood wrote:
> This patch set adds support for setting up static memory devices on
> a ARM PrimeCell MultiPort Memory Controller (PL172) from DT. Dynamic
> memory (SDRAM) is not supported in this patch set.
>
> DT bindings for PL172
On Wed, Mar 18, 2015 at 10:39:43AM +, Ganapatrao Kulkarni wrote:
> On Wed, Mar 18, 2015 at 3:30 PM, Will Deacon wrote:
> > On Wed, Mar 18, 2015 at 04:02:53AM +, Ganapatrao Kulkarni wrote:
> >> Please suggest how we go about these patches.
> >> please share y
On Wed, Mar 18, 2015 at 04:02:53AM +, Ganapatrao Kulkarni wrote:
> Hi Catalin, Will, Mark, Arnd
[...]
> Please suggest how we go about these patches.
> please share your review comments, if any changes needs to be done.
I can take the Kconfig patch if you send a version that applies cleanly.
On Tue, Mar 10, 2015 at 03:18:50PM +, Suzuki K. Poulose wrote:
> From: "Suzuki K. Poulose"
>
> This series enables the PMU monitoring support for CCI400 on ARM64.
> The existing CCI400 driver code is a mix of PMU driver and the MCPM
> driver code. The MCPM driver is only used on ARM(32) and c
On Tue, Mar 10, 2015 at 03:18:55PM +, Suzuki K. Poulose wrote:
> From: "Suzuki K. Poulose"
>
> We mask the event with the CCI_PMU_EVENT_MASK, before passing
> the config to pmu_validate_hw_event(), which causes extra bits
> to be ignored and qualifies an invalid event code as valid.
>
> e.g,
hw_event). Get rid of
>helper functions:
> pmu_is_valid_slave_event
> pmu_is_valid_master_event
>
> Signed-off-by: Suzuki K. Poulose
> ---
Looks good to me:
Reviewed-by: Will Deacon
Will
> drivers/bus/arm-cci.c | 141
> -
>
On Mon, Mar 09, 2015 at 12:11:43PM +, Yong Wu wrote:
> On Fri, 2015-03-06 at 10:58 +0000, Will Deacon wrote:
> > On Fri, Mar 06, 2015 at 10:48:17AM +, yong...@mediatek.com wrote:
> > > From: Yong Wu
> > >
> > > This patch adds support for mediat
On Fri, Mar 06, 2015 at 10:48:17AM +, yong...@mediatek.com wrote:
> From: Yong Wu
>
> This patch adds support for mediatek m4u (MultiMedia Memory Management Unit).
> Currently this only supports m4u gen 2 with 2 levels of page table on mt8173.
[...]
> diff --git a/drivers/iommu/mtk_iommu_pa
On Tue, Mar 03, 2015 at 11:54:46PM +, Laurent Pinchart wrote:
> Hello,
Hi Laurent,
> I haven't seen any reply to this e-mail. I know that the combination of
> IOMMU,
> DMA mapping and DT doesn't exactly sound like fun, but I think we still need
> to move on :-)
Yup, and thanks for taking
On Sat, Feb 28, 2015 at 12:11:32AM +, Stephen Boyd wrote:
> These patches add support for the Scorpion PMU found on devices
> such as msm8660, qsd8x50, etc. The first patch is some groundwork
> to make functions more "generic". Even then we end up copying quite
> a bit of code from the Krait pa
On Fri, Feb 27, 2015 at 07:36:11PM +, Stephen Boyd wrote:
> On 02/25/15 08:58, Ashwin Chaugule wrote:
> > Its a count control register (PMxEVCNTCR). Theres various conditions
> > on which you can select when to start/stop counting. e.g. start when
> > another counter register overflows. Setting
On Fri, Feb 13, 2015 at 06:24:09PM +, Stephen Boyd wrote:
> Scorpion supports a set of local performance monitor event
> selection registers (LPM) sitting behind a cp15 based interface
> that extend the architected PMU events to include Scorpion CPU
> and Venum VFP specific events. To use these
> - Pulled out 8/8 of v5 and plan to send a patch for enhancing
>of_dma_configure() to use size to calculate dma mask.
> - Added Acks from reviewers.
This series looks fine to me:
Acked-by: Will Deacon
Will
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On Thu, Feb 05, 2015 at 11:56:01AM +, Mark Rutland wrote:
> On Mon, Jan 26, 2015 at 05:54:16PM +0000, Will Deacon wrote:
> > Historically, the PMU devicetree bindings have expected SPIs to be
> > listed in order of *logical* CPU number. This is problematic for
> > bootloa
On Thu, Feb 05, 2015 at 11:59:33AM +, Mark Rutland wrote:
> On Thu, Feb 05, 2015 at 11:54:16AM +0000, Will Deacon wrote:
> > On Thu, Feb 05, 2015 at 11:46:42AM +, Mark Rutland wrote:
> > > On Mon, Jan 26, 2015 at 05:54:15PM +, Will Deacon wrote:
> > > > di
On Thu, Feb 05, 2015 at 11:46:42AM +, Mark Rutland wrote:
> On Mon, Jan 26, 2015 at 05:54:15PM +0000, Will Deacon wrote:
> > diff --git a/arch/arm64/boot/dts/arm/juno.dts
> > b/arch/arm64/boot/dts/arm/juno.dts
> > index cb3073e4e7a8..4ed9287aaef1 100644
> > --
nly dma-range is used for PCI and iommu is not
> >> supported. So return error if the device is PCI.
> >>
> >> Cc: Joerg Roedel
> >> Cc: Grant Likely
> >> Cc: Rob Herring
> >> Cc: Bjorn Helgaas
> >> Cc: Will Deacon
> >> Cc: Russ
On Wed, Jan 28, 2015 at 01:15:10PM +, Laurent Pinchart wrote:
> On Wednesday 28 January 2015 12:29:42 Will Deacon wrote:
> > On Wed, Jan 28, 2015 at 12:23:03PM +, Laurent Pinchart wrote:
> > > On Wednesday 28 January 2015 11:33:00 Will Deacon wrote:
> > >>
On Wed, Jan 28, 2015 at 12:23:03PM +, Laurent Pinchart wrote:
> On Wednesday 28 January 2015 11:33:00 Will Deacon wrote:
> > On Mon, Jan 26, 2015 at 06:49:01PM +, Murali Karicheri wrote:
> > > On 01/25/2015 08:32 AM, Laurent Pinchart wrote:
> > >> On Friday 2
CPU: 3 PID: 2830 Comm: cc1 Not tainted 3.19.0-rc6+ #1
Hardware name: ARM Juno development board (r0) (DT)
[...]
handlers:
[] armv8pmu_handle_irq
Disabling IRQ #9
Cc: Mark Rutland
Signed-off-by: Will Deacon
---
This is an immediate fix for mainline, with the remaining patches in the
seri
o the
PMU node which allows the interrupt affinity to be described using
a list of phandled to CPU nodes, with each entry in the list
corresponding to the SPI at the same index in the interrupts property.
Cc: Mark Rutland
Signed-off-by: Will Deacon
---
arch/arm/include/asm/pmu.h | 1 +
arc
Make the Juno .dts robust against potential reordering of the CPU nodes
by adding an explicit interrupt-affinity property to the PMU node.
Cc: Mark Rutland
Signed-off-by: Will Deacon
---
arch/arm64/boot/dts/arm/juno.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot
o the
PMU node which allows the interrupt affinity to be described using
a list of phandled to CPU nodes, with each entry in the list
corresponding to the SPI at the same index in the interrupts property.
Cc: Mark Rutland
Signed-off-by: Will Deacon
---
Documentation/devicetree/bindings/arm/pmu.txt
On Thu, Jan 08, 2015 at 10:25:15PM +, Arnd Bergmann wrote:
> On Thursday 08 January 2015 14:52:13 Murali Karicheri wrote:
> >
> > Could you add this as as a follow up patch as I don't have a platformm
> > that support IOMMU and as such my understanding of the IOMMU is limited?
> >
> > I can
On Wed, Jan 07, 2015 at 06:49:53PM +, Murali Karicheri wrote:
> Add of_pci_dma_configure() to allow updating the dma configuration
> of the pci device using the configuration from DT of the parent of
> the root bridge device.
>
> Signed-off-by: Murali Karicheri
> ---
> drivers/of/of_pci.c
On Thu, Jan 08, 2015 at 08:56:39AM +, Arnd Bergmann wrote:
> On Wednesday 07 January 2015 18:04:41 Murali Karicheri wrote:
> > On 01/07/2015 04:18 PM, Arnd Bergmann wrote:
> > > On Wednesday 07 January 2015 13:49:50 Murali Karicheri wrote:
> > >> PCI devices on Keystone doesn't have correct dma
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