subject:"\[PATCH v6\] PCI\: Xilinx\-NWL\-PCIe\: Added support for Xilinx NWL PCIe Host Controller"

Re: [PATCH v6] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

2015-10-30 Thread Marc Zyngier

On Fri, 30 Oct 2015 17:47:08 +0530 Bharat Kumar Gogada wrote: > Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP. > > Signed-off-by: Bharat Kumar Gogada > Signed-off-by: Ravi Kiran Gummaluri > --- > Changes for v6: > Removed repetitive code for msi handlers. > Corrected typo mistakes

[PATCH v6] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

2015-10-30 Thread Bharat Kumar Gogada

Adding PCIe Root Port driver for Xilinx PCIe NWL bridge IP. Signed-off-by: Bharat Kumar Gogada Signed-off-by: Ravi Kiran Gummaluri --- Changes for v6: Removed repetitive code for msi handlers. Corrected typo mistakes in device tree documentation. --- .../devicetree/bindings/pci/xilinx-nwl-pcie.