[Bug target/119781] Apple Rosetta 2 x86-64 emulator does not support x86-64-v2 SAHF instruction
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119781 --- Comment #10 from Dimitri John Ledkov --- I agree that this is not a bug in GCC. But users are in pain and github is full of bug reports against random projects from many users claiming that nothing works. https://gcc.gnu.org/onlinedocs/gcc/x86-Options.html is already full of documentation about various vendors, their cpus, features, and buggy features or missing implementation. The only ask I have, is to mention that one more vendor which has roughly 20% market share of new machines shipped in the last 12 months is also mentioned for the one instruction that is expected to be there, but actually is not. Because it otherwise implements and document usage of instructions that are higher/newer than SAHF. There are 28 mentions of SAHF on that page in relation to various vendors and their products. Is a one-line additional documentation, about one more vendor, is too much to ask?
[Bug target/119781] Apple Rosetta 2 x86-64 emulator does not support x86-64-v2 SAHF instruction
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119781 --- Comment #9 from Andrew Pinski --- For LLVM to produce the bad code you might need -ftrapping-math which defaults to on for GCC while defaults to off for clang. That might be the reason why LLVM does not produce this instruction.
[Bug target/119781] Apple Rosetta 2 x86-64 emulator does not support x86-64-v2 SAHF instruction
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119781 --- Comment #8 from Andrew Pinski --- (In reply to Dimitri John Ledkov from comment #6) > (In reply to Andrew Pinski from comment #3) > > x86_64v2 is defined in the ABI: > > https://gitlab.com/x86-psABIs/x86-64-ABI/-/commit/77566eb03bc6a326811cb7e9 > > > > And it includes sahf . > > Yes, but it is a compiler choice if it is emitted. note that cpython code > itself doesn't use sahf, it is generated by the compiler choice. Are you sure you are compiling with -march=x86_64v2 there? Also maybe it is a tuning thing. GCC might be tuned more towards AMD while LLVM is tuned more towards Intel. But it does not mean LLVM might not produce the instruction in some cases as I showed by my link to LLVM. Again this is NOT a GCC bug but rather an user one.
[Bug target/119781] Apple Rosetta 2 x86-64 emulator does not support x86-64-v2 SAHF instruction
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119781 --- Comment #7 from Dimitri John Ledkov --- Note that this seems to be coming from: ix86_fp_comparison_strategy
[Bug target/119781] Apple Rosetta 2 x86-64 emulator does not support x86-64-v2 SAHF instruction
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119781 --- Comment #6 from Dimitri John Ledkov --- (In reply to Andrew Pinski from comment #3) > x86_64v2 is defined in the ABI: > https://gitlab.com/x86-psABIs/x86-64-ABI/-/commit/77566eb03bc6a326811cb7e9 > > And it includes sahf . Yes, but it is a compiler choice if it is emitted. note that cpython code itself doesn't use sahf, it is generated by the compiler choice. and for the same source code LLVM chooses not to emit it.
[Bug target/119781] Apple Rosetta 2 x86-64 emulator does not support x86-64-v2 SAHF instruction
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119781 --- Comment #5 from Dimitri John Ledkov --- (In reply to Andrew Pinski from comment #2) > >1) Updating documentation for the -msahf option to mention that Apple > >Rosetta 2 does not support this instruction would be very helpful. I will > >send a patch with a proposed documentation update. > > > No, Please don't. The documentation for Rosetta should be what updated > instead. Rosetta documentation is already up to date, but yet undiscoverable by users. Note gcc documentation already documents in that same paragraph known systems that do and do not support the said instruction. it is very obscure, thus hard to discover which target hardware has support for it, or not. > > > >Note other compilers do not appear to generate sahf instruction by default. > > Wrong, see my link. The definition for x86-64-v2 is the same. But the compiler choices do not produce that instruction for the same C code. As in cpython built with march=x86-64-v2 doesn't contain SAHF instructions. I can rerun the tests of that.
[Bug target/119781] Apple Rosetta 2 x86-64 emulator does not support x86-64-v2 SAHF instruction
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119781 --- Comment #4 from Dimitri John Ledkov --- Created attachment 61094 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=61094&action=edit 0001-doc-Document-lack-of-SAHF-support-on-Apple-Rosetta-2.patch https://gcc.gnu.org/pipermail/gcc-patches/2025-April/680851.html
[Bug target/119781] Apple Rosetta 2 x86-64 emulator does not support x86-64-v2 SAHF instruction
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119781 --- Comment #2 from Andrew Pinski --- >1) Updating documentation for the -msahf option to mention that Apple Rosetta >2 does not support this instruction would be very helpful. I will send a patch >with a proposed documentation update. No, Please don't. The documentation for Rosetta should be what updated instead. >Note other compilers do not appear to generate sahf instruction by default. Wrong, see my link.
[Bug target/119781] Apple Rosetta 2 x86-64 emulator does not support x86-64-v2 SAHF instruction
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119781 --- Comment #3 from Andrew Pinski --- x86_64v2 is defined in the ABI: https://gitlab.com/x86-psABIs/x86-64-ABI/-/commit/77566eb03bc6a326811cb7e9 And it includes sahf .
[Bug target/119781] Apple Rosetta 2 x86-64 emulator does not support x86-64-v2 SAHF instruction
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119781 Andrew Pinski changed: What|Removed |Added Resolution|--- |WONTFIX Status|UNCONFIRMED |RESOLVED --- Comment #1 from Andrew Pinski --- LLVM has the same definition as GCC for x86_64v2. https://github.com/llvm/llvm-project/blob/c41ef751f85ee42f40380d064f44cfd347fb6215/llvm/lib/Target/X86/X86.td#L840
