[Bug target/120333] [16 Regression] RISC-V: Wrong code with bitmanip extension

2025-05-19 Thread law at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120333

Jeffrey A. Law  changed:

   What|Removed |Added

 Resolution|--- |FIXED
 Status|ASSIGNED|RESOLVED

--- Comment #4 from Jeffrey A. Law  ---
Fixed on the trunk.

[Bug target/120333] [16 Regression] RISC-V: Wrong code with bitmanip extension

2025-05-19 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120333

--- Comment #3 from GCC Commits  ---
The master branch has been updated by Jeff Law :

https://gcc.gnu.org/g:38fa6c0455ec14f2f42310a817b90765ad894aa4

commit r16-740-g38fa6c0455ec14f2f42310a817b90765ad894aa4
Author: Jeff Law 
Date:   Mon May 19 16:55:15 2025 -0600

[committed][RISC-V][PR target/120333] Remove bogus bext pattern

I goof'd when doing analysis of missed bext cases.  For the shift into the
sign
bit, then shift into the low bit case (thankfully the least common), I got
it
in my brain that the field is at the left shift count.   It's actually at
word_size - 1 - left shift count.

One the subtraction is included, it's no longer profitable to turn those
cases
into bext.  Best case scenario would be sub+bext, but we can just as easily
use
sll+srl which fuses in some designs into a single op.

So this patch removes those two patterns, adjusts the existing testcase and
adds the new execution test.

Given it's a partial reversion and has passed in my tester, I'm going to go
ahead and push it to the trunk rather than waiting for upstream CI.

PR target/120333
gcc/
* config/riscv/bitmanip.md: Remove bext formed from left+right
shift patterns.

gcc/testsuite/

* gcc.target/riscv/pr114512.c: Update expected output.
* gcc.target/riscv/pr120333.c: New test.

[Bug target/120333] [16 Regression] RISC-V: Wrong code with bitmanip extension

2025-05-19 Thread law at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120333

Jeffrey A. Law  changed:

   What|Removed |Added

 Status|NEW |ASSIGNED

--- Comment #2 from Jeffrey A. Law  ---
I think the pattern in that change is just bogus.  I forgot to account for the
fact that the left shift value isn't the bit position we care about.  The
position we care about is 63/31 - shift value (rv64/rv32).

Once we take into the account the need for that adjustment, the new code is no
better than the old code.  Thankfully that variant is the least important of
the single bit extraction variants.

[Bug target/120333] [16 Regression] RISC-V: Wrong code with bitmanip extension

2025-05-18 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120333

Andrew Pinski  changed:

   What|Removed |Added

 Status|UNCONFIRMED |NEW
 Ever confirmed|0   |1
   Last reconfirmed||2025-05-18
   See Also||https://gcc.gnu.org/bugzill
   ||a/show_bug.cgi?id=114512

--- Comment #1 from Andrew Pinski  ---
Confirmed. Looks like it might be caused by r16-411-g4cd741dcbd3729 .

[Bug target/120333] [16 Regression] RISC-V: Wrong code with bitmanip extension

2025-05-18 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120333

Andrew Pinski  changed:

   What|Removed |Added

   Target Milestone|--- |16.0
Summary|RISC-V: Wrong code with |[16 Regression] RISC-V:
   |bitmanip extension  |Wrong code with bitmanip
   ||extension