[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2026-05-04 Thread rdapp at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 124750, which changed state.

Bug 124750 Summary: Opportunity to optimize vector register allocation after 
loop unrolling.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=124750

   What|Removed |Added

 Status|UNCONFIRMED |RESOLVED
 Resolution|--- |INVALID

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2026-04-30 Thread jakub at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 124988, which changed state.

Bug 124988 Summary: wrong code with __builtin_mul_overflow() and shift of 
_BitInt() on riscv
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=124988

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2026-04-07 Thread rdapp at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 124613, which changed state.

Bug 124613 Summary: [16 regression] gcc.target/riscv/pr122051.c fails with ICE 
in emit_move_multi_word since r16-7312-gecc37444062b40
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=124613

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2026-03-29 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 124674, which changed state.

Bug 124674 Summary: [15/16 Regression] ICE: in require, at machmode.h:323 with 
-O1 and __builtin_mul_overflow()
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=124674

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2026-02-24 Thread rdapp at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 123381, which changed state.

Bug 123381 Summary: ICE: maximum number of generated reload insns per insn 
achieved (90) with -mrvv-vector-bits=zvl
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123381

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2026-02-21 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 124172, which changed state.

Bug 124172 Summary: [16 Regression] Building a RISC-V GCC fails when using Clang
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=124172

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2026-02-10 Thread rdapp at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 123940, which changed state.

Bug 123940 Summary: [15 Regression] [RISCV] [Miscompile] GCC - riscv64 target, 
miscompiles at -O3 since r15-3734
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123940

   What|Removed |Added

 Status|REOPENED|RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2026-02-10 Thread rdapp at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 123870, which changed state.

Bug 123870 Summary: [riscv64] ICE on vzext_vf2 and xtheadvector
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123870

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2026-02-06 Thread rguenth at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 123940, which changed state.

Bug 123940 Summary: [15 Regression] [RISCV] [Miscompile] GCC - riscv64 target, 
miscompiles at -O3 since r15-3734
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123940

   What|Removed |Added

 Status|RESOLVED|REOPENED
 Resolution|FIXED   |---

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2026-02-06 Thread rdapp at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 123940, which changed state.

Bug 123940 Summary: [15/16 Regression] [RISCV] [Miscompile] GCC - riscv64 
target, miscompiles at -O3 since r15-3734
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123940

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2026-01-29 Thread rdapp at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 123806, which changed state.

Bug 123806 Summary: gcc 14/15/16 miscompiles rvv intrinsics at -O1/2/3
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123806

   What|Removed |Added

 Status|UNCONFIRMED |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2026-01-29 Thread rdapp at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 123626, which changed state.

Bug 123626 Summary: [16 Regression] [RISCV] [Miscompile] GCC - riscv64 target, 
miscompiles at -O3 as well as -O2 since 
g:08ccc67ef44b4ddea72ea50d465d38b87414ecce
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123626

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2026-01-28 Thread rdapp at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 123808, which changed state.

Bug 123808 Summary: gcc 16 miscompiles at -O2/3
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123808

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |DUPLICATE

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2026-01-22 Thread rdapp at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 123731, which changed state.

Bug 123731 Summary: [16 Regression] wrong code at -O1/O2/O3/Os since r16-6671
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123731

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2026-01-19 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 121787, which changed state.

Bug 121787 Summary: [16 Regression] RISC-V rv64gcv: crash at -O1/2/3
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121787

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2026-01-13 Thread rdapp at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 123501, which changed state.

Bug 123501 Summary: [16 Regression] [RISCV] [Miscompile] GCC - riscv64 target, 
miscompiles at -O3 since g:0b129b8b368635b3170aa276809d644dc99e3256
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123501

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2026-01-13 Thread rdapp at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 123301, which changed state.

Bug 123301 Summary: [16 Regression] RISC-V rv64gcv: ICE at -O3 during RTL pass: 
expand
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123301

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2026-01-12 Thread rguenth at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 123414, which changed state.

Bug 123414 Summary: [16 Regression] [RISCV] [Miscompile] GCC - riscv64 target, 
miscompiles at -O3 since r16-6296
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123414

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2026-01-09 Thread rdapp at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 123444, which changed state.

Bug 123444 Summary: [16 Regression] [RISCV] [Miscompile] GCC - riscv64 target, 
miscompiles at -O3 since r16-6133
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123444

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |DUPLICATE

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2026-01-02 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 121485, which changed state.

Bug 121485 Summary: [15 Regression]RISC-V Zvkned vector-scalar intrinsics use 
wrong EMUL (m1 for m2/m4/m8 variants of intrinsics)
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121485

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-12-29 Thread pinskia at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 123308, which changed state.

Bug 123308 Summary: Recent ifcvt's change causes RISC-V regressions
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123308

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-12-26 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 123283, which changed state.

Bug 123283 Summary: [16 regression] [RISC-V] libgo miscompiled by 
r16-5947-ga6c50ec2c6ebcb
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123283

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-12-22 Thread vineetg at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 122769, which changed state.

Bug 122769 Summary: RISC-V: Short branch can be elided for alu op
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122769

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-12-19 Thread rdapp at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 123097, which changed state.

Bug 123097 Summary: [16 Regression] [RISCV] [Miscompile] GCC - riscv64 target, 
miscompiles at -O3 since r16-5979
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123097

   What|Removed |Added

 Status|UNCONFIRMED |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-12-19 Thread rdapp at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 123118, which changed state.

Bug 123118 Summary: ICE during RTL pass in expand_insn at optabs.cc:8293
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=123118

   What|Removed |Added

 Status|UNCONFIRMED |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-12-10 Thread rdapp at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 122652, which changed state.

Bug 122652 Summary: RISCV: Crash at -O3 during RTL pass: vsetvl
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122652

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-12-09 Thread rdapp at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 122656, which changed state.

Bug 122656 Summary: RISCV: ICE during RTL pass: expand
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122656

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-12-01 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 122942, which changed state.

Bug 122942 Summary: The risc-v rva23s64 and rvb23s64 profiles are missing the 
zifencei extension
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122942

   What|Removed |Added

 Status|UNCONFIRMED |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-11-28 Thread rguenth at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 122844, which changed state.

Bug 122844 Summary: [16 Regression] [RISCV] [Miscompile] GCC - riscv64 target, 
miscompiles at -O3 since r16-5169-g8fad025430b4fd
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122844

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-11-26 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 122735, which changed state.

Bug 122735 Summary: [16 regression] RISCV: ICE during RTL pass: combine
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122735

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-11-24 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 122692, which changed state.

Bug 122692 Summary: [15 regression] U16 array to U8 array saturation test fails 
on riscv64-linux-gnu
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122692

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-11-14 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 122672, which changed state.

Bug 122672 Summary: RISCV: ICE in gen_lowpart_general, at rtlhooks.cc:57
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122672

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |DUPLICATE

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-11-04 Thread rdapp at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 122486, which changed state.

Bug 122486 Summary: RISC-V: The intrinsic for the vsetvli instruction generates 
assembly that does not match the intrinsic's documented semantics
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122486

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |INVALID

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-11-03 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 122270, which changed state.

Bug 122270 Summary: riscv: during GIMPLE pass: internal compiler error: in 
gsi_replace, at gimple-iterator.cc:438
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122270

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-11-03 Thread tnfchris at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 122475, which changed state.

Bug 122475 Summary: [16 Regression] ICE in the vectorize with RVV and SVE
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122475

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-10-29 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 116662, which changed state.

Bug 116662 Summary: The value of __GCC_DESTRUCTIVE_SIZE for riscv64 could be 
improved
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116662

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-10-28 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 120782, which changed state.

Bug 120782 Summary: [15 16 Regression]RISC-V: vector-strict-align not working 
for spec17 521 ref size
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120782

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |DUPLICATE

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-10-18 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 121845, which changed state.

Bug 121845 Summary: [15 Regression] RISC-V rv64gcv: miscompile at -O0
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121845

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-10-18 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 121652, which changed state.

Bug 121652 Summary: [15 Regression] round builtin does not raise FE_INVALID for 
signaling NaN
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121652

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-10-03 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 110812, which changed state.

Bug 110812 Summary: Check availability of builtins at expand time
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110812

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-10-03 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 121995, which changed state.

Bug 121995 Summary: [RISCV] [Miscompile] GCC - riscv64 target, miscompiles with 
multiplication on unsigned char at -O3 as well as -O2
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121995

   What|Removed |Added

 Status|UNCONFIRMED |RESOLVED
 Resolution|--- |DUPLICATE

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-10-03 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 122076, which changed state.

Bug 122076 Summary: [RISCV] [Miscompile] GCC - riscv64 target, miscompiles at 
-O3 as well as -O2
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122076

   What|Removed |Added

 Status|UNCONFIRMED |RESOLVED
 Resolution|--- |DUPLICATE

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-10-03 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 121742, which changed state.

Bug 121742 Summary: [15] RISC-V rv64gcv: miscompile at -O1/O2
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121742

   What|Removed |Added

 Status|UNCONFIRMED |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-10-03 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 121780, which changed state.

Bug 121780 Summary: [Trunk] RISC-V rv64gcv: miscompile at -O1
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121780

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-10-03 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 121937, which changed state.

Bug 121937 Summary: [16 Regression] RISC-V rv64gcv: crash at -O3 during RTL 
pass: combine
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121937

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-09-15 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 121512, which changed state.

Bug 121512 Summary: internal compiler error: in generate_insn, at 
config/riscv/riscv-vector-builtins.cc:4470
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121512

   What|Removed |Added

 Status|UNCONFIRMED |RESOLVED
 Resolution|--- |DUPLICATE

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-09-04 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 121660, which changed state.

Bug 121660 Summary: [16 Regression] RISC-V: internal compiler error: in 
apply_scale, at profile-count.h:1187
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121660

   What|Removed |Added

 Status|UNCONFIRMED |RESOLVED
 Resolution|--- |DUPLICATE

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-08-21 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 120141, which changed state.

Bug 120141 Summary: [RVV] Noop are not removed
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120141

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |WONTFIX

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-08-19 Thread vineetg at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 121534, which changed state.

Bug 121534 Summary: GCC misoptimizes C23 sinpi/cospi/tanpi during inlining of 
round()
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121534

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-08-12 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 121113, which changed state.

Bug 121113 Summary: ICE: in riscv_sched_variable_issue, at 
config/riscv/riscv.cc:10243 with -mcpu=xiangshan-kunminghu and _Float16
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121113

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-07-13 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 120356, which changed state.

Bug 120356 Summary: [15 Regression] RISC-V: Miscompile at -O[23] since 
r15-6881-g7b815107f40
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120356

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-07-13 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 120995, which changed state.

Bug 120995 Summary: [15 regression] [RISC-V] ICE: unrecognizable insn 
UNSPEC_COMPARE_AND_SWAP with rv64gc_zabha_zacas
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120995

   What|Removed |Added

 Status|ASSIGNED|RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-07-12 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 119267, which changed state.

Bug 119267 Summary: RISC-V: gcc generates vsetivli with wrong LMUL with 
extended assembly
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119267

   What|Removed |Added

 Status|SUSPENDED   |RESOLVED
 Resolution|--- |INVALID

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-07-07 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 116686, which changed state.

Bug 116686 Summary: [15/16 Regression] RISC-V: 
gcc.target/riscv/rvv/autovec/pr114734.c failing with zvl1024b lmul2
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116686

   What|Removed |Added

 Status|UNCONFIRMED |RESOLVED
 Resolution|--- |WORKSFORME

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-07-06 Thread vineetg at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 118241, which changed state.

Bug 118241 Summary: RISC-V ICE: internal compiler error: in int_mode_for_mode, 
at stor-layout.cc:407 caused by prefetch instructions
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118241

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-06-30 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 120659, which changed state.

Bug 120659 Summary: ICE: in riscv_sched_variable_issue, at 
config/riscv/riscv.cc:9879 with -O2 -mcpu=sifive-x280
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120659

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-06-30 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 120714, which changed state.

Bug 120714 Summary: RISC-V: incorrect frame pointer CFA address for stack-clash 
protection loops
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120714

   What|Removed |Added

 Status|UNCONFIRMED |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-06-26 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763
Bug 120763 depends on bug 120828, which changed state.

Bug 120828 Summary: [16 Regression] Unrecognized insn after recent RISC-V 
change for .vf support
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120828

   What|Removed |Added

 Status|UNCONFIRMED |RESOLVED
 Resolution|--- |FIXED

[Bug target/120763] [meta-bug] Tracker for bugs to visit during weekly RISC-V meeting

2025-06-22 Thread law at gcc dot gnu.org via Gcc-bugs 
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120763

Jeffrey A. Law  changed:

   What|Removed |Added

   Last reconfirmed||2025-06-22
 Depends on||120651, 120627, 120356,
   ||120242, 119944, 119007,
   ||118595, 109933, 104102,
   ||89173, 86005, 82106
 Ever confirmed|0   |1
 Status|UNCONFIRMED |ASSIGNED


Referenced Bugs:

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82106
[Bug 82106] [RISCV] Misaligned loads generated when doubles are split between
stack and registers
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86005
[Bug 86005] [RISCV] Invalid intermixing of __atomic_* libcalls and inline
atomic instruction sequences
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89173
[Bug 89173] FAIL: runtime/pprof
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104102
[Bug 104102] __builtin_frame_address(1) desn't work on riscv
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109933
[Bug 109933] __atomic_test_and_set is broken for BIG ENDIAN riscv targets
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118595
[Bug 118595] [15/16 regression] RISC-V: gfortran/c-interop test execution
failures on RVV zvl > 128b since r15-3228-g771256bcb9d
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119007
[Bug 119007] RISC-V: The optimization ignored the side effects of the rounding
mode, resulting in incorrect results for rvv
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119944
[Bug 119944] [16] RISC-V: g++.dg/torture/pr119610.C "terminate called after
throwing an instance of 'int'
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120242
[Bug 120242] [15/16 regression] RISC-V: Miscompile at -O[23] since
r15-9239-g4d7a634f6d4
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120356
[Bug 120356] [15/16 Regression] RISC-V: Miscompile at -O[23] since
r15-6881-g7b815107f40
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120627
[Bug 120627] [15/16 regression] RISC-V: Miscompile at -O[23] since
r15-2186-g9d8ef2711df
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120651
[Bug 120651] [15/16 Regression] RISC-V: Miscompile at -O3 with -flto since
r15-3228-g771256bcb9d