[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

2026-01-29 Thread Jeff Law via Gcc-cvs 
https://gcc.gnu.org/g:7ebf555094d80ce310e3bc23804fa831a6c22d27

commit 7ebf555094d80ce310e3bc23804fa831a6c22d27
Author: Pan Li 
Date:   Mon Apr 28 20:35:09 2025 +0800

RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

This patch will add testcase for unsigned integer SAT_ADD form 7:

  #define DEF_SAT_U_ADD_FMT_7(WT, T) \
  T __attribute__((noinline))\
  sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
  {  \
T max = -1;  \
WT val = (WT)x + (WT)y;  \
return val > max ? max : (T)val; \
  }

  DEF_SAT_U_ADD_FMT_7(uint64_t, uint32_t)

The below test are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u64.c: New test.

Signed-off-by: Pan Li 
(cherry picked from commit f6535d433e250421f6c1f2f691c04e613d63a694)

Diff:
---
 gcc/testsuite/gcc.target/riscv/sat/sat_arith.h | 22 ++
 .../riscv/sat/sat_u_add-7-u16-from-u32.c   | 21 +
 .../riscv/sat/sat_u_add-7-u16-from-u64.c   | 21 +
 .../riscv/sat/sat_u_add-7-u32-from-u64.c   | 22 ++
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c | 19 
 .../riscv/sat/sat_u_add-run-7-u16-from-u32.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u16-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u32-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u16.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u32.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u64.c| 26 ++
 13 files changed, 299 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h 
b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
index c8a135a5f0f7..2225d30d77e2 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
@@ -53,12 +53,34 @@ sat_u_add_##T##_fmt_6 (T x, T y)\
   return (T)(x + y) < x ? -1 : (x + y); \
 }
 
+#define DEF_SAT_U_ADD_FMT_7(WT, T) \
+T __attribute__((noinline))\
+sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
+{  \
+  T max = -1;  \
+  WT val = (WT)x + (WT)y;  \
+  return val > max ? max : (T)val; \
+}
+#define DEF_SAT_U_ADD_FMT_7_WRAP(WT, T) DEF_SAT_U_ADD_FMT_7(WT, T)
+
 #define RUN_SAT_U_ADD_FMT_1(T, x, y) sat_u_add_##T##_fmt_1(x, y)
 #define RUN_SAT_U_ADD_FMT_2(T, x, y) sat_u_add_##T##_fmt_2(x, y)
 #define RUN_SAT_U_ADD_FMT_3(T, x, y) sat_u_add_##T##_fmt_3(x, y)
 #define RUN_SAT_U_ADD_FMT_4(T, x, y) sat_u_add_##T##_fmt_4(x, y)
 #define RUN_SAT_U_ADD_FMT_5(T, x, y) sat_u_add_##T##_fmt_5(x, y)
 #define RUN_SAT_U_ADD_FMT_6(T, x, y) sat_u_add_##T##_fmt_6(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y) \
+  sat_u_add_uint16_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y) \
+  sat_u_add_uint32_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y) \
+  sat_u_add_uint64_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y)
 
 #define DEF_SAT_U_ADD_IMM_FMT_1(T, IMM)  \
 T __attribute__((noinline))  \
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c 
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c
new file mode 100644
index ..527f8de63517
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

2026-01-16 Thread Jeff Law via Gcc-cvs 
https://gcc.gnu.org/g:317b87a1e4d33cf6e41393808717c438dc0fbd61

commit 317b87a1e4d33cf6e41393808717c438dc0fbd61
Author: Pan Li 
Date:   Mon Apr 28 20:35:09 2025 +0800

RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

This patch will add testcase for unsigned integer SAT_ADD form 7:

  #define DEF_SAT_U_ADD_FMT_7(WT, T) \
  T __attribute__((noinline))\
  sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
  {  \
T max = -1;  \
WT val = (WT)x + (WT)y;  \
return val > max ? max : (T)val; \
  }

  DEF_SAT_U_ADD_FMT_7(uint64_t, uint32_t)

The below test are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u64.c: New test.

Signed-off-by: Pan Li 
(cherry picked from commit f6535d433e250421f6c1f2f691c04e613d63a694)

Diff:
---
 gcc/testsuite/gcc.target/riscv/sat/sat_arith.h | 22 ++
 .../riscv/sat/sat_u_add-7-u16-from-u32.c   | 21 +
 .../riscv/sat/sat_u_add-7-u16-from-u64.c   | 21 +
 .../riscv/sat/sat_u_add-7-u32-from-u64.c   | 22 ++
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c | 19 
 .../riscv/sat/sat_u_add-run-7-u16-from-u32.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u16-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u32-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u16.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u32.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u64.c| 26 ++
 13 files changed, 299 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h 
b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
index c8a135a5f0f7..2225d30d77e2 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
@@ -53,12 +53,34 @@ sat_u_add_##T##_fmt_6 (T x, T y)\
   return (T)(x + y) < x ? -1 : (x + y); \
 }
 
+#define DEF_SAT_U_ADD_FMT_7(WT, T) \
+T __attribute__((noinline))\
+sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
+{  \
+  T max = -1;  \
+  WT val = (WT)x + (WT)y;  \
+  return val > max ? max : (T)val; \
+}
+#define DEF_SAT_U_ADD_FMT_7_WRAP(WT, T) DEF_SAT_U_ADD_FMT_7(WT, T)
+
 #define RUN_SAT_U_ADD_FMT_1(T, x, y) sat_u_add_##T##_fmt_1(x, y)
 #define RUN_SAT_U_ADD_FMT_2(T, x, y) sat_u_add_##T##_fmt_2(x, y)
 #define RUN_SAT_U_ADD_FMT_3(T, x, y) sat_u_add_##T##_fmt_3(x, y)
 #define RUN_SAT_U_ADD_FMT_4(T, x, y) sat_u_add_##T##_fmt_4(x, y)
 #define RUN_SAT_U_ADD_FMT_5(T, x, y) sat_u_add_##T##_fmt_5(x, y)
 #define RUN_SAT_U_ADD_FMT_6(T, x, y) sat_u_add_##T##_fmt_6(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y) \
+  sat_u_add_uint16_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y) \
+  sat_u_add_uint32_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y) \
+  sat_u_add_uint64_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y)
 
 #define DEF_SAT_U_ADD_IMM_FMT_1(T, IMM)  \
 T __attribute__((noinline))  \
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c 
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c
new file mode 100644
index ..527f8de63517
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

2025-11-07 Thread Jeff Law via Gcc-cvs 
https://gcc.gnu.org/g:3a4090a47896e1794a188461eb5dc0bf94778503

commit 3a4090a47896e1794a188461eb5dc0bf94778503
Author: Pan Li 
Date:   Mon Apr 28 20:35:09 2025 +0800

RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

This patch will add testcase for unsigned integer SAT_ADD form 7:

  #define DEF_SAT_U_ADD_FMT_7(WT, T) \
  T __attribute__((noinline))\
  sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
  {  \
T max = -1;  \
WT val = (WT)x + (WT)y;  \
return val > max ? max : (T)val; \
  }

  DEF_SAT_U_ADD_FMT_7(uint64_t, uint32_t)

The below test are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u64.c: New test.

Signed-off-by: Pan Li 
(cherry picked from commit f6535d433e250421f6c1f2f691c04e613d63a694)

Diff:
---
 gcc/testsuite/gcc.target/riscv/sat/sat_arith.h | 22 ++
 .../riscv/sat/sat_u_add-7-u16-from-u32.c   | 21 +
 .../riscv/sat/sat_u_add-7-u16-from-u64.c   | 21 +
 .../riscv/sat/sat_u_add-7-u32-from-u64.c   | 22 ++
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c | 19 
 .../riscv/sat/sat_u_add-run-7-u16-from-u32.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u16-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u32-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u16.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u32.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u64.c| 26 ++
 13 files changed, 299 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h 
b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
index c8a135a5f0f7..2225d30d77e2 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
@@ -53,12 +53,34 @@ sat_u_add_##T##_fmt_6 (T x, T y)\
   return (T)(x + y) < x ? -1 : (x + y); \
 }
 
+#define DEF_SAT_U_ADD_FMT_7(WT, T) \
+T __attribute__((noinline))\
+sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
+{  \
+  T max = -1;  \
+  WT val = (WT)x + (WT)y;  \
+  return val > max ? max : (T)val; \
+}
+#define DEF_SAT_U_ADD_FMT_7_WRAP(WT, T) DEF_SAT_U_ADD_FMT_7(WT, T)
+
 #define RUN_SAT_U_ADD_FMT_1(T, x, y) sat_u_add_##T##_fmt_1(x, y)
 #define RUN_SAT_U_ADD_FMT_2(T, x, y) sat_u_add_##T##_fmt_2(x, y)
 #define RUN_SAT_U_ADD_FMT_3(T, x, y) sat_u_add_##T##_fmt_3(x, y)
 #define RUN_SAT_U_ADD_FMT_4(T, x, y) sat_u_add_##T##_fmt_4(x, y)
 #define RUN_SAT_U_ADD_FMT_5(T, x, y) sat_u_add_##T##_fmt_5(x, y)
 #define RUN_SAT_U_ADD_FMT_6(T, x, y) sat_u_add_##T##_fmt_6(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y) \
+  sat_u_add_uint16_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y) \
+  sat_u_add_uint32_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y) \
+  sat_u_add_uint64_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y)
 
 #define DEF_SAT_U_ADD_IMM_FMT_1(T, IMM)  \
 T __attribute__((noinline))  \
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c 
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c
new file mode 100644
index ..527f8de63517
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

2025-11-01 Thread Jeff Law via Gcc-cvs 
https://gcc.gnu.org/g:5f6f46d934ccad13fa03d17ce7e0697cca123ccb

commit 5f6f46d934ccad13fa03d17ce7e0697cca123ccb
Author: Pan Li 
Date:   Mon Apr 28 20:35:09 2025 +0800

RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

This patch will add testcase for unsigned integer SAT_ADD form 7:

  #define DEF_SAT_U_ADD_FMT_7(WT, T) \
  T __attribute__((noinline))\
  sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
  {  \
T max = -1;  \
WT val = (WT)x + (WT)y;  \
return val > max ? max : (T)val; \
  }

  DEF_SAT_U_ADD_FMT_7(uint64_t, uint32_t)

The below test are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u64.c: New test.

Signed-off-by: Pan Li 
(cherry picked from commit f6535d433e250421f6c1f2f691c04e613d63a694)

Diff:
---
 gcc/testsuite/gcc.target/riscv/sat/sat_arith.h | 22 ++
 .../riscv/sat/sat_u_add-7-u16-from-u32.c   | 21 +
 .../riscv/sat/sat_u_add-7-u16-from-u64.c   | 21 +
 .../riscv/sat/sat_u_add-7-u32-from-u64.c   | 22 ++
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c | 19 
 .../riscv/sat/sat_u_add-run-7-u16-from-u32.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u16-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u32-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u16.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u32.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u64.c| 26 ++
 13 files changed, 299 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h 
b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
index c8a135a5f0f7..2225d30d77e2 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
@@ -53,12 +53,34 @@ sat_u_add_##T##_fmt_6 (T x, T y)\
   return (T)(x + y) < x ? -1 : (x + y); \
 }
 
+#define DEF_SAT_U_ADD_FMT_7(WT, T) \
+T __attribute__((noinline))\
+sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
+{  \
+  T max = -1;  \
+  WT val = (WT)x + (WT)y;  \
+  return val > max ? max : (T)val; \
+}
+#define DEF_SAT_U_ADD_FMT_7_WRAP(WT, T) DEF_SAT_U_ADD_FMT_7(WT, T)
+
 #define RUN_SAT_U_ADD_FMT_1(T, x, y) sat_u_add_##T##_fmt_1(x, y)
 #define RUN_SAT_U_ADD_FMT_2(T, x, y) sat_u_add_##T##_fmt_2(x, y)
 #define RUN_SAT_U_ADD_FMT_3(T, x, y) sat_u_add_##T##_fmt_3(x, y)
 #define RUN_SAT_U_ADD_FMT_4(T, x, y) sat_u_add_##T##_fmt_4(x, y)
 #define RUN_SAT_U_ADD_FMT_5(T, x, y) sat_u_add_##T##_fmt_5(x, y)
 #define RUN_SAT_U_ADD_FMT_6(T, x, y) sat_u_add_##T##_fmt_6(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y) \
+  sat_u_add_uint16_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y) \
+  sat_u_add_uint32_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y) \
+  sat_u_add_uint64_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y)
 
 #define DEF_SAT_U_ADD_IMM_FMT_1(T, IMM)  \
 T __attribute__((noinline))  \
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c 
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c
new file mode 100644
index ..527f8de63517
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

2025-10-17 Thread Jeff Law via Gcc-cvs 
https://gcc.gnu.org/g:52e30b790bd368735abd2c7302ab0cd26bac44b6

commit 52e30b790bd368735abd2c7302ab0cd26bac44b6
Author: Pan Li 
Date:   Mon Apr 28 20:35:09 2025 +0800

RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

This patch will add testcase for unsigned integer SAT_ADD form 7:

  #define DEF_SAT_U_ADD_FMT_7(WT, T) \
  T __attribute__((noinline))\
  sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
  {  \
T max = -1;  \
WT val = (WT)x + (WT)y;  \
return val > max ? max : (T)val; \
  }

  DEF_SAT_U_ADD_FMT_7(uint64_t, uint32_t)

The below test are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u64.c: New test.

Signed-off-by: Pan Li 
(cherry picked from commit f6535d433e250421f6c1f2f691c04e613d63a694)

Diff:
---
 gcc/testsuite/gcc.target/riscv/sat/sat_arith.h | 22 ++
 .../riscv/sat/sat_u_add-7-u16-from-u32.c   | 21 +
 .../riscv/sat/sat_u_add-7-u16-from-u64.c   | 21 +
 .../riscv/sat/sat_u_add-7-u32-from-u64.c   | 22 ++
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c | 19 
 .../riscv/sat/sat_u_add-run-7-u16-from-u32.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u16-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u32-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u16.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u32.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u64.c| 26 ++
 13 files changed, 299 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h 
b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
index c8a135a5f0f7..2225d30d77e2 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
@@ -53,12 +53,34 @@ sat_u_add_##T##_fmt_6 (T x, T y)\
   return (T)(x + y) < x ? -1 : (x + y); \
 }
 
+#define DEF_SAT_U_ADD_FMT_7(WT, T) \
+T __attribute__((noinline))\
+sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
+{  \
+  T max = -1;  \
+  WT val = (WT)x + (WT)y;  \
+  return val > max ? max : (T)val; \
+}
+#define DEF_SAT_U_ADD_FMT_7_WRAP(WT, T) DEF_SAT_U_ADD_FMT_7(WT, T)
+
 #define RUN_SAT_U_ADD_FMT_1(T, x, y) sat_u_add_##T##_fmt_1(x, y)
 #define RUN_SAT_U_ADD_FMT_2(T, x, y) sat_u_add_##T##_fmt_2(x, y)
 #define RUN_SAT_U_ADD_FMT_3(T, x, y) sat_u_add_##T##_fmt_3(x, y)
 #define RUN_SAT_U_ADD_FMT_4(T, x, y) sat_u_add_##T##_fmt_4(x, y)
 #define RUN_SAT_U_ADD_FMT_5(T, x, y) sat_u_add_##T##_fmt_5(x, y)
 #define RUN_SAT_U_ADD_FMT_6(T, x, y) sat_u_add_##T##_fmt_6(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y) \
+  sat_u_add_uint16_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y) \
+  sat_u_add_uint32_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y) \
+  sat_u_add_uint64_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y)
 
 #define DEF_SAT_U_ADD_IMM_FMT_1(T, IMM)  \
 T __attribute__((noinline))  \
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c 
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c
new file mode 100644
index ..527f8de63517
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

2025-09-13 Thread Jeff Law via Gcc-cvs 
https://gcc.gnu.org/g:95e14bfe73ce665d6601c1fe4015dc4c7374e128

commit 95e14bfe73ce665d6601c1fe4015dc4c7374e128
Author: Pan Li 
Date:   Mon Apr 28 20:35:09 2025 +0800

RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

This patch will add testcase for unsigned integer SAT_ADD form 7:

  #define DEF_SAT_U_ADD_FMT_7(WT, T) \
  T __attribute__((noinline))\
  sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
  {  \
T max = -1;  \
WT val = (WT)x + (WT)y;  \
return val > max ? max : (T)val; \
  }

  DEF_SAT_U_ADD_FMT_7(uint64_t, uint32_t)

The below test are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u64.c: New test.

Signed-off-by: Pan Li 
(cherry picked from commit f6535d433e250421f6c1f2f691c04e613d63a694)

Diff:
---
 gcc/testsuite/gcc.target/riscv/sat/sat_arith.h | 22 ++
 .../riscv/sat/sat_u_add-7-u16-from-u32.c   | 21 +
 .../riscv/sat/sat_u_add-7-u16-from-u64.c   | 21 +
 .../riscv/sat/sat_u_add-7-u32-from-u64.c   | 22 ++
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c | 19 
 .../riscv/sat/sat_u_add-run-7-u16-from-u32.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u16-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u32-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u16.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u32.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u64.c| 26 ++
 13 files changed, 299 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h 
b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
index c8a135a5f0f7..2225d30d77e2 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
@@ -53,12 +53,34 @@ sat_u_add_##T##_fmt_6 (T x, T y)\
   return (T)(x + y) < x ? -1 : (x + y); \
 }
 
+#define DEF_SAT_U_ADD_FMT_7(WT, T) \
+T __attribute__((noinline))\
+sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
+{  \
+  T max = -1;  \
+  WT val = (WT)x + (WT)y;  \
+  return val > max ? max : (T)val; \
+}
+#define DEF_SAT_U_ADD_FMT_7_WRAP(WT, T) DEF_SAT_U_ADD_FMT_7(WT, T)
+
 #define RUN_SAT_U_ADD_FMT_1(T, x, y) sat_u_add_##T##_fmt_1(x, y)
 #define RUN_SAT_U_ADD_FMT_2(T, x, y) sat_u_add_##T##_fmt_2(x, y)
 #define RUN_SAT_U_ADD_FMT_3(T, x, y) sat_u_add_##T##_fmt_3(x, y)
 #define RUN_SAT_U_ADD_FMT_4(T, x, y) sat_u_add_##T##_fmt_4(x, y)
 #define RUN_SAT_U_ADD_FMT_5(T, x, y) sat_u_add_##T##_fmt_5(x, y)
 #define RUN_SAT_U_ADD_FMT_6(T, x, y) sat_u_add_##T##_fmt_6(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y) \
+  sat_u_add_uint16_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y) \
+  sat_u_add_uint32_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y) \
+  sat_u_add_uint64_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y)
 
 #define DEF_SAT_U_ADD_IMM_FMT_1(T, IMM)  \
 T __attribute__((noinline))  \
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c 
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c
new file mode 100644
index ..527f8de63517
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

2025-09-06 Thread Jeff Law via Gcc-cvs 
https://gcc.gnu.org/g:0fd464c69d477bec86482176e4f0935d84ef0d64

commit 0fd464c69d477bec86482176e4f0935d84ef0d64
Author: Pan Li 
Date:   Mon Apr 28 20:35:09 2025 +0800

RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

This patch will add testcase for unsigned integer SAT_ADD form 7:

  #define DEF_SAT_U_ADD_FMT_7(WT, T) \
  T __attribute__((noinline))\
  sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
  {  \
T max = -1;  \
WT val = (WT)x + (WT)y;  \
return val > max ? max : (T)val; \
  }

  DEF_SAT_U_ADD_FMT_7(uint64_t, uint32_t)

The below test are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u64.c: New test.

Signed-off-by: Pan Li 
(cherry picked from commit f6535d433e250421f6c1f2f691c04e613d63a694)

Diff:
---
 gcc/testsuite/gcc.target/riscv/sat/sat_arith.h | 22 ++
 .../riscv/sat/sat_u_add-7-u16-from-u32.c   | 21 +
 .../riscv/sat/sat_u_add-7-u16-from-u64.c   | 21 +
 .../riscv/sat/sat_u_add-7-u32-from-u64.c   | 22 ++
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c | 19 
 .../riscv/sat/sat_u_add-run-7-u16-from-u32.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u16-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u32-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u16.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u32.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u64.c| 26 ++
 13 files changed, 299 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h 
b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
index c8a135a5f0f7..2225d30d77e2 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
@@ -53,12 +53,34 @@ sat_u_add_##T##_fmt_6 (T x, T y)\
   return (T)(x + y) < x ? -1 : (x + y); \
 }
 
+#define DEF_SAT_U_ADD_FMT_7(WT, T) \
+T __attribute__((noinline))\
+sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
+{  \
+  T max = -1;  \
+  WT val = (WT)x + (WT)y;  \
+  return val > max ? max : (T)val; \
+}
+#define DEF_SAT_U_ADD_FMT_7_WRAP(WT, T) DEF_SAT_U_ADD_FMT_7(WT, T)
+
 #define RUN_SAT_U_ADD_FMT_1(T, x, y) sat_u_add_##T##_fmt_1(x, y)
 #define RUN_SAT_U_ADD_FMT_2(T, x, y) sat_u_add_##T##_fmt_2(x, y)
 #define RUN_SAT_U_ADD_FMT_3(T, x, y) sat_u_add_##T##_fmt_3(x, y)
 #define RUN_SAT_U_ADD_FMT_4(T, x, y) sat_u_add_##T##_fmt_4(x, y)
 #define RUN_SAT_U_ADD_FMT_5(T, x, y) sat_u_add_##T##_fmt_5(x, y)
 #define RUN_SAT_U_ADD_FMT_6(T, x, y) sat_u_add_##T##_fmt_6(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y) \
+  sat_u_add_uint16_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y) \
+  sat_u_add_uint32_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y) \
+  sat_u_add_uint64_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y)
 
 #define DEF_SAT_U_ADD_IMM_FMT_1(T, IMM)  \
 T __attribute__((noinline))  \
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c 
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c
new file mode 100644
index ..527f8de63517
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

2025-08-25 Thread Jeff Law via Gcc-cvs 
https://gcc.gnu.org/g:54a8f574d3e91da6c5b0cb5b616860fdc3811e8b

commit 54a8f574d3e91da6c5b0cb5b616860fdc3811e8b
Author: Pan Li 
Date:   Mon Apr 28 20:35:09 2025 +0800

RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

This patch will add testcase for unsigned integer SAT_ADD form 7:

  #define DEF_SAT_U_ADD_FMT_7(WT, T) \
  T __attribute__((noinline))\
  sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
  {  \
T max = -1;  \
WT val = (WT)x + (WT)y;  \
return val > max ? max : (T)val; \
  }

  DEF_SAT_U_ADD_FMT_7(uint64_t, uint32_t)

The below test are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u64.c: New test.

Signed-off-by: Pan Li 
(cherry picked from commit f6535d433e250421f6c1f2f691c04e613d63a694)

Diff:
---
 gcc/testsuite/gcc.target/riscv/sat/sat_arith.h | 22 ++
 .../riscv/sat/sat_u_add-7-u16-from-u32.c   | 21 +
 .../riscv/sat/sat_u_add-7-u16-from-u64.c   | 21 +
 .../riscv/sat/sat_u_add-7-u32-from-u64.c   | 22 ++
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c | 19 
 .../riscv/sat/sat_u_add-run-7-u16-from-u32.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u16-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u32-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u16.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u32.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u64.c| 26 ++
 13 files changed, 299 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h 
b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
index c8a135a5f0f7..2225d30d77e2 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
@@ -53,12 +53,34 @@ sat_u_add_##T##_fmt_6 (T x, T y)\
   return (T)(x + y) < x ? -1 : (x + y); \
 }
 
+#define DEF_SAT_U_ADD_FMT_7(WT, T) \
+T __attribute__((noinline))\
+sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
+{  \
+  T max = -1;  \
+  WT val = (WT)x + (WT)y;  \
+  return val > max ? max : (T)val; \
+}
+#define DEF_SAT_U_ADD_FMT_7_WRAP(WT, T) DEF_SAT_U_ADD_FMT_7(WT, T)
+
 #define RUN_SAT_U_ADD_FMT_1(T, x, y) sat_u_add_##T##_fmt_1(x, y)
 #define RUN_SAT_U_ADD_FMT_2(T, x, y) sat_u_add_##T##_fmt_2(x, y)
 #define RUN_SAT_U_ADD_FMT_3(T, x, y) sat_u_add_##T##_fmt_3(x, y)
 #define RUN_SAT_U_ADD_FMT_4(T, x, y) sat_u_add_##T##_fmt_4(x, y)
 #define RUN_SAT_U_ADD_FMT_5(T, x, y) sat_u_add_##T##_fmt_5(x, y)
 #define RUN_SAT_U_ADD_FMT_6(T, x, y) sat_u_add_##T##_fmt_6(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y) \
+  sat_u_add_uint16_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y) \
+  sat_u_add_uint32_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y) \
+  sat_u_add_uint64_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y)
 
 #define DEF_SAT_U_ADD_IMM_FMT_1(T, IMM)  \
 T __attribute__((noinline))  \
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c 
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c
new file mode 100644
index ..527f8de63517
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

2025-07-23 Thread Jeff Law via Gcc-cvs 
https://gcc.gnu.org/g:6fa627e0b9ce836167cc0ba745ed0f14e73ee569

commit 6fa627e0b9ce836167cc0ba745ed0f14e73ee569
Author: Pan Li 
Date:   Mon Apr 28 20:35:09 2025 +0800

RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

This patch will add testcase for unsigned integer SAT_ADD form 7:

  #define DEF_SAT_U_ADD_FMT_7(WT, T) \
  T __attribute__((noinline))\
  sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
  {  \
T max = -1;  \
WT val = (WT)x + (WT)y;  \
return val > max ? max : (T)val; \
  }

  DEF_SAT_U_ADD_FMT_7(uint64_t, uint32_t)

The below test are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u64.c: New test.

Signed-off-by: Pan Li 
(cherry picked from commit f6535d433e250421f6c1f2f691c04e613d63a694)

Diff:
---
 gcc/testsuite/gcc.target/riscv/sat/sat_arith.h | 22 ++
 .../riscv/sat/sat_u_add-7-u16-from-u32.c   | 21 +
 .../riscv/sat/sat_u_add-7-u16-from-u64.c   | 21 +
 .../riscv/sat/sat_u_add-7-u32-from-u64.c   | 22 ++
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c | 19 
 .../riscv/sat/sat_u_add-run-7-u16-from-u32.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u16-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u32-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u16.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u32.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u64.c| 26 ++
 13 files changed, 299 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h 
b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
index c8a135a5f0f7..2225d30d77e2 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
@@ -53,12 +53,34 @@ sat_u_add_##T##_fmt_6 (T x, T y)\
   return (T)(x + y) < x ? -1 : (x + y); \
 }
 
+#define DEF_SAT_U_ADD_FMT_7(WT, T) \
+T __attribute__((noinline))\
+sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
+{  \
+  T max = -1;  \
+  WT val = (WT)x + (WT)y;  \
+  return val > max ? max : (T)val; \
+}
+#define DEF_SAT_U_ADD_FMT_7_WRAP(WT, T) DEF_SAT_U_ADD_FMT_7(WT, T)
+
 #define RUN_SAT_U_ADD_FMT_1(T, x, y) sat_u_add_##T##_fmt_1(x, y)
 #define RUN_SAT_U_ADD_FMT_2(T, x, y) sat_u_add_##T##_fmt_2(x, y)
 #define RUN_SAT_U_ADD_FMT_3(T, x, y) sat_u_add_##T##_fmt_3(x, y)
 #define RUN_SAT_U_ADD_FMT_4(T, x, y) sat_u_add_##T##_fmt_4(x, y)
 #define RUN_SAT_U_ADD_FMT_5(T, x, y) sat_u_add_##T##_fmt_5(x, y)
 #define RUN_SAT_U_ADD_FMT_6(T, x, y) sat_u_add_##T##_fmt_6(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y) \
+  sat_u_add_uint16_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y) \
+  sat_u_add_uint32_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y) \
+  sat_u_add_uint64_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y)
 
 #define DEF_SAT_U_ADD_IMM_FMT_1(T, IMM)  \
 T __attribute__((noinline))  \
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c 
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c
new file mode 100644
index ..527f8de63517
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

2025-07-05 Thread Jeff Law via Gcc-cvs 
https://gcc.gnu.org/g:2d190e7c5adfd0a1e6a32b73165692a4d2b13dd7

commit 2d190e7c5adfd0a1e6a32b73165692a4d2b13dd7
Author: Pan Li 
Date:   Mon Apr 28 20:35:09 2025 +0800

RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

This patch will add testcase for unsigned integer SAT_ADD form 7:

  #define DEF_SAT_U_ADD_FMT_7(WT, T) \
  T __attribute__((noinline))\
  sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
  {  \
T max = -1;  \
WT val = (WT)x + (WT)y;  \
return val > max ? max : (T)val; \
  }

  DEF_SAT_U_ADD_FMT_7(uint64_t, uint32_t)

The below test are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u64.c: New test.

Signed-off-by: Pan Li 
(cherry picked from commit f6535d433e250421f6c1f2f691c04e613d63a694)

Diff:
---
 gcc/testsuite/gcc.target/riscv/sat/sat_arith.h | 22 ++
 .../riscv/sat/sat_u_add-7-u16-from-u32.c   | 21 +
 .../riscv/sat/sat_u_add-7-u16-from-u64.c   | 21 +
 .../riscv/sat/sat_u_add-7-u32-from-u64.c   | 22 ++
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c | 19 
 .../riscv/sat/sat_u_add-run-7-u16-from-u32.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u16-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u32-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u16.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u32.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u64.c| 26 ++
 13 files changed, 299 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h 
b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
index c8a135a5f0f7..2225d30d77e2 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
@@ -53,12 +53,34 @@ sat_u_add_##T##_fmt_6 (T x, T y)\
   return (T)(x + y) < x ? -1 : (x + y); \
 }
 
+#define DEF_SAT_U_ADD_FMT_7(WT, T) \
+T __attribute__((noinline))\
+sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
+{  \
+  T max = -1;  \
+  WT val = (WT)x + (WT)y;  \
+  return val > max ? max : (T)val; \
+}
+#define DEF_SAT_U_ADD_FMT_7_WRAP(WT, T) DEF_SAT_U_ADD_FMT_7(WT, T)
+
 #define RUN_SAT_U_ADD_FMT_1(T, x, y) sat_u_add_##T##_fmt_1(x, y)
 #define RUN_SAT_U_ADD_FMT_2(T, x, y) sat_u_add_##T##_fmt_2(x, y)
 #define RUN_SAT_U_ADD_FMT_3(T, x, y) sat_u_add_##T##_fmt_3(x, y)
 #define RUN_SAT_U_ADD_FMT_4(T, x, y) sat_u_add_##T##_fmt_4(x, y)
 #define RUN_SAT_U_ADD_FMT_5(T, x, y) sat_u_add_##T##_fmt_5(x, y)
 #define RUN_SAT_U_ADD_FMT_6(T, x, y) sat_u_add_##T##_fmt_6(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y) \
+  sat_u_add_uint16_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y) \
+  sat_u_add_uint32_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y) \
+  sat_u_add_uint64_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y)
 
 #define DEF_SAT_U_ADD_IMM_FMT_1(T, IMM)  \
 T __attribute__((noinline))  \
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c 
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c
new file mode 100644
index ..527f8de63517
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

2025-05-18 Thread Jeff Law via Gcc-cvs 
https://gcc.gnu.org/g:24f53c2781a919deaf098a7514428e679d4866c0

commit 24f53c2781a919deaf098a7514428e679d4866c0
Author: Pan Li 
Date:   Mon Apr 28 20:35:09 2025 +0800

RISC-V: Add testcases for scalar unsigned integer SAT_ADD form 7

This patch will add testcase for unsigned integer SAT_ADD form 7:

  #define DEF_SAT_U_ADD_FMT_7(WT, T) \
  T __attribute__((noinline))\
  sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
  {  \
T max = -1;  \
WT val = (WT)x + (WT)y;  \
return val > max ? max : (T)val; \
  }

  DEF_SAT_U_ADD_FMT_7(uint64_t, uint32_t)

The below test are passed for this patch.
* The rv64gcv fully regression test.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/sat/sat_arith.h: Add test helper macros.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u16-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u32-from-u64.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u16.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u32.c: New test.
* gcc.target/riscv/sat/sat_u_add-run-7-u8-from-u64.c: New test.

Signed-off-by: Pan Li 
(cherry picked from commit f6535d433e250421f6c1f2f691c04e613d63a694)

Diff:
---
 gcc/testsuite/gcc.target/riscv/sat/sat_arith.h | 22 ++
 .../riscv/sat/sat_u_add-7-u16-from-u32.c   | 21 +
 .../riscv/sat/sat_u_add-7-u16-from-u64.c   | 21 +
 .../riscv/sat/sat_u_add-7-u32-from-u64.c   | 22 ++
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c | 19 
 .../gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c | 19 
 .../riscv/sat/sat_u_add-run-7-u16-from-u32.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u16-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u32-from-u64.c   | 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u16.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u32.c| 26 ++
 .../riscv/sat/sat_u_add-run-7-u8-from-u64.c| 26 ++
 13 files changed, 299 insertions(+)

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h 
b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
index c8a135a5f0f7..2225d30d77e2 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_arith.h
@@ -53,12 +53,34 @@ sat_u_add_##T##_fmt_6 (T x, T y)\
   return (T)(x + y) < x ? -1 : (x + y); \
 }
 
+#define DEF_SAT_U_ADD_FMT_7(WT, T) \
+T __attribute__((noinline))\
+sat_u_add_##WT##_##T##_fmt_7(T x, T y) \
+{  \
+  T max = -1;  \
+  WT val = (WT)x + (WT)y;  \
+  return val > max ? max : (T)val; \
+}
+#define DEF_SAT_U_ADD_FMT_7_WRAP(WT, T) DEF_SAT_U_ADD_FMT_7(WT, T)
+
 #define RUN_SAT_U_ADD_FMT_1(T, x, y) sat_u_add_##T##_fmt_1(x, y)
 #define RUN_SAT_U_ADD_FMT_2(T, x, y) sat_u_add_##T##_fmt_2(x, y)
 #define RUN_SAT_U_ADD_FMT_3(T, x, y) sat_u_add_##T##_fmt_3(x, y)
 #define RUN_SAT_U_ADD_FMT_4(T, x, y) sat_u_add_##T##_fmt_4(x, y)
 #define RUN_SAT_U_ADD_FMT_5(T, x, y) sat_u_add_##T##_fmt_5(x, y)
 #define RUN_SAT_U_ADD_FMT_6(T, x, y) sat_u_add_##T##_fmt_6(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y) \
+  sat_u_add_uint16_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U16_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U16(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y) \
+  sat_u_add_uint32_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U32_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U32(T, x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y) \
+  sat_u_add_uint64_t_##T##_fmt_7(x, y)
+#define RUN_SAT_U_ADD_FMT_7_FROM_U64_WRAP(T, x, y) \
+  RUN_SAT_U_ADD_FMT_7_FROM_U64(T, x, y)
 
 #define DEF_SAT_U_ADD_IMM_FMT_1(T, IMM)  \
 T __attribute__((noinline))  \
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c 
b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c
new file mode 100644
index ..527f8de63517
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7