[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Extract vec_series for expand_const_vector [NFC]
https://gcc.gnu.org/g:f467831e1ccce4e6c0f2486b5ce7c6bdb63f9529
commit f467831e1ccce4e6c0f2486b5ce7c6bdb63f9529
Author: Pan Li
Date: Wed Apr 16 14:43:23 2025 +0800
RISC-V: Extract vec_series for expand_const_vector [NFC]
Consider the expand_const_vector is quit long (about 500 lines)
and complicated, we would like to extract the different case
into different functions. For example, the const vec_series
will be extracted into expand_const_vec_series.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
gcc/ChangeLog:
* config/riscv/riscv-v.cc (expand_const_vec_series): Add new
func to take care of the const vec_series.
(expand_const_vector): Extract const vec_series into separated
function.
Signed-off-by: Pan Li
(cherry picked from commit cf366b62f48fc5c06b76a9a78320888a9591031b)
Diff:
---
gcc/config/riscv/riscv-v.cc | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index d5aa008b39c4..f1bf7e92760e 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -1224,6 +1224,18 @@ expand_const_vec_duplicate (rtx target, rtx src, rtx elt)
emit_move_insn (target, result);
}
+static void
+expand_const_vec_series (rtx target, rtx base, rtx step)
+{
+ machine_mode mode = GET_MODE (target);
+ rtx result = register_operand (target, mode) ? target : gen_reg_rtx (mode);
+
+ expand_vec_series (result, base, step);
+
+ if (result != target)
+emit_move_insn (target, result);
+}
+
static void
expand_const_vector (rtx target, rtx src)
{
@@ -1237,13 +1249,7 @@ expand_const_vector (rtx target, rtx src)
/* Support scalable const series vector. */
rtx base, step;
if (const_vec_series_p (src, &base, &step))
-{
- expand_vec_series (result, base, step);
-
- if (result != target)
- emit_move_insn (target, result);
- return;
-}
+return expand_const_vec_series (target, base, step);
/* Handle variable-length vector. */
unsigned int nelts_per_pattern = CONST_VECTOR_NELTS_PER_PATTERN (src);
[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Extract vec_series for expand_const_vector [NFC]
https://gcc.gnu.org/g:e33c2ec38c25c79ea8f39ff0570d5dd30800a19a
commit e33c2ec38c25c79ea8f39ff0570d5dd30800a19a
Author: Pan Li
Date: Wed Apr 16 14:43:23 2025 +0800
RISC-V: Extract vec_series for expand_const_vector [NFC]
Consider the expand_const_vector is quit long (about 500 lines)
and complicated, we would like to extract the different case
into different functions. For example, the const vec_series
will be extracted into expand_const_vec_series.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
gcc/ChangeLog:
* config/riscv/riscv-v.cc (expand_const_vec_series): Add new
func to take care of the const vec_series.
(expand_const_vector): Extract const vec_series into separated
function.
Signed-off-by: Pan Li
(cherry picked from commit cf366b62f48fc5c06b76a9a78320888a9591031b)
Diff:
---
gcc/config/riscv/riscv-v.cc | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index d5aa008b39c4..f1bf7e92760e 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -1224,6 +1224,18 @@ expand_const_vec_duplicate (rtx target, rtx src, rtx elt)
emit_move_insn (target, result);
}
+static void
+expand_const_vec_series (rtx target, rtx base, rtx step)
+{
+ machine_mode mode = GET_MODE (target);
+ rtx result = register_operand (target, mode) ? target : gen_reg_rtx (mode);
+
+ expand_vec_series (result, base, step);
+
+ if (result != target)
+emit_move_insn (target, result);
+}
+
static void
expand_const_vector (rtx target, rtx src)
{
@@ -1237,13 +1249,7 @@ expand_const_vector (rtx target, rtx src)
/* Support scalable const series vector. */
rtx base, step;
if (const_vec_series_p (src, &base, &step))
-{
- expand_vec_series (result, base, step);
-
- if (result != target)
- emit_move_insn (target, result);
- return;
-}
+return expand_const_vec_series (target, base, step);
/* Handle variable-length vector. */
unsigned int nelts_per_pattern = CONST_VECTOR_NELTS_PER_PATTERN (src);
[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Extract vec_series for expand_const_vector [NFC]
https://gcc.gnu.org/g:4dbd3dffe5f0957cebfea1c6aa9abb77f4d56f72
commit 4dbd3dffe5f0957cebfea1c6aa9abb77f4d56f72
Author: Pan Li
Date: Wed Apr 16 14:43:23 2025 +0800
RISC-V: Extract vec_series for expand_const_vector [NFC]
Consider the expand_const_vector is quit long (about 500 lines)
and complicated, we would like to extract the different case
into different functions. For example, the const vec_series
will be extracted into expand_const_vec_series.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
gcc/ChangeLog:
* config/riscv/riscv-v.cc (expand_const_vec_series): Add new
func to take care of the const vec_series.
(expand_const_vector): Extract const vec_series into separated
function.
Signed-off-by: Pan Li
(cherry picked from commit cf366b62f48fc5c06b76a9a78320888a9591031b)
Diff:
---
gcc/config/riscv/riscv-v.cc | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index d5aa008b39c4..f1bf7e92760e 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -1224,6 +1224,18 @@ expand_const_vec_duplicate (rtx target, rtx src, rtx elt)
emit_move_insn (target, result);
}
+static void
+expand_const_vec_series (rtx target, rtx base, rtx step)
+{
+ machine_mode mode = GET_MODE (target);
+ rtx result = register_operand (target, mode) ? target : gen_reg_rtx (mode);
+
+ expand_vec_series (result, base, step);
+
+ if (result != target)
+emit_move_insn (target, result);
+}
+
static void
expand_const_vector (rtx target, rtx src)
{
@@ -1237,13 +1249,7 @@ expand_const_vector (rtx target, rtx src)
/* Support scalable const series vector. */
rtx base, step;
if (const_vec_series_p (src, &base, &step))
-{
- expand_vec_series (result, base, step);
-
- if (result != target)
- emit_move_insn (target, result);
- return;
-}
+return expand_const_vec_series (target, base, step);
/* Handle variable-length vector. */
unsigned int nelts_per_pattern = CONST_VECTOR_NELTS_PER_PATTERN (src);
[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Extract vec_series for expand_const_vector [NFC]
https://gcc.gnu.org/g:ccdcf8717afbdbe053456c73702a30d0c5bebb82
commit ccdcf8717afbdbe053456c73702a30d0c5bebb82
Author: Pan Li
Date: Wed Apr 16 14:43:23 2025 +0800
RISC-V: Extract vec_series for expand_const_vector [NFC]
Consider the expand_const_vector is quit long (about 500 lines)
and complicated, we would like to extract the different case
into different functions. For example, the const vec_series
will be extracted into expand_const_vec_series.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
gcc/ChangeLog:
* config/riscv/riscv-v.cc (expand_const_vec_series): Add new
func to take care of the const vec_series.
(expand_const_vector): Extract const vec_series into separated
function.
Signed-off-by: Pan Li
(cherry picked from commit cf366b62f48fc5c06b76a9a78320888a9591031b)
Diff:
---
gcc/config/riscv/riscv-v.cc | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index d5aa008b39c4..f1bf7e92760e 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -1224,6 +1224,18 @@ expand_const_vec_duplicate (rtx target, rtx src, rtx elt)
emit_move_insn (target, result);
}
+static void
+expand_const_vec_series (rtx target, rtx base, rtx step)
+{
+ machine_mode mode = GET_MODE (target);
+ rtx result = register_operand (target, mode) ? target : gen_reg_rtx (mode);
+
+ expand_vec_series (result, base, step);
+
+ if (result != target)
+emit_move_insn (target, result);
+}
+
static void
expand_const_vector (rtx target, rtx src)
{
@@ -1237,13 +1249,7 @@ expand_const_vector (rtx target, rtx src)
/* Support scalable const series vector. */
rtx base, step;
if (const_vec_series_p (src, &base, &step))
-{
- expand_vec_series (result, base, step);
-
- if (result != target)
- emit_move_insn (target, result);
- return;
-}
+return expand_const_vec_series (target, base, step);
/* Handle variable-length vector. */
unsigned int nelts_per_pattern = CONST_VECTOR_NELTS_PER_PATTERN (src);
[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Extract vec_series for expand_const_vector [NFC]
https://gcc.gnu.org/g:4508a2f625d04d6b0a6196c8bffc32c0f35e276e
commit 4508a2f625d04d6b0a6196c8bffc32c0f35e276e
Author: Pan Li
Date: Wed Apr 16 14:43:23 2025 +0800
RISC-V: Extract vec_series for expand_const_vector [NFC]
Consider the expand_const_vector is quit long (about 500 lines)
and complicated, we would like to extract the different case
into different functions. For example, the const vec_series
will be extracted into expand_const_vec_series.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
gcc/ChangeLog:
* config/riscv/riscv-v.cc (expand_const_vec_series): Add new
func to take care of the const vec_series.
(expand_const_vector): Extract const vec_series into separated
function.
Signed-off-by: Pan Li
(cherry picked from commit cf366b62f48fc5c06b76a9a78320888a9591031b)
Diff:
---
gcc/config/riscv/riscv-v.cc | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index d435fb6bc447..ea8472b535f0 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -1224,6 +1224,18 @@ expand_const_vec_duplicate (rtx target, rtx src, rtx elt)
emit_move_insn (target, result);
}
+static void
+expand_const_vec_series (rtx target, rtx base, rtx step)
+{
+ machine_mode mode = GET_MODE (target);
+ rtx result = register_operand (target, mode) ? target : gen_reg_rtx (mode);
+
+ expand_vec_series (result, base, step);
+
+ if (result != target)
+emit_move_insn (target, result);
+}
+
static void
expand_const_vector (rtx target, rtx src)
{
@@ -1237,13 +1249,7 @@ expand_const_vector (rtx target, rtx src)
/* Support scalable const series vector. */
rtx base, step;
if (const_vec_series_p (src, &base, &step))
-{
- expand_vec_series (result, base, step);
-
- if (result != target)
- emit_move_insn (target, result);
- return;
-}
+return expand_const_vec_series (target, base, step);
/* Handle variable-length vector. */
unsigned int nelts_per_pattern = CONST_VECTOR_NELTS_PER_PATTERN (src);
[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Extract vec_series for expand_const_vector [NFC]
https://gcc.gnu.org/g:ab1776f72aed64420f0074b7183b7ab841cc61fc
commit ab1776f72aed64420f0074b7183b7ab841cc61fc
Author: Pan Li
Date: Wed Apr 16 14:43:23 2025 +0800
RISC-V: Extract vec_series for expand_const_vector [NFC]
Consider the expand_const_vector is quit long (about 500 lines)
and complicated, we would like to extract the different case
into different functions. For example, the const vec_series
will be extracted into expand_const_vec_series.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
gcc/ChangeLog:
* config/riscv/riscv-v.cc (expand_const_vec_series): Add new
func to take care of the const vec_series.
(expand_const_vector): Extract const vec_series into separated
function.
Signed-off-by: Pan Li
(cherry picked from commit cf366b62f48fc5c06b76a9a78320888a9591031b)
Diff:
---
gcc/config/riscv/riscv-v.cc | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index edb9abcbcad7..f95dfd009ec7 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -1224,6 +1224,18 @@ expand_const_vec_duplicate (rtx target, rtx src, rtx elt)
emit_move_insn (target, result);
}
+static void
+expand_const_vec_series (rtx target, rtx base, rtx step)
+{
+ machine_mode mode = GET_MODE (target);
+ rtx result = register_operand (target, mode) ? target : gen_reg_rtx (mode);
+
+ expand_vec_series (result, base, step);
+
+ if (result != target)
+emit_move_insn (target, result);
+}
+
static void
expand_const_vector (rtx target, rtx src)
{
@@ -1237,13 +1249,7 @@ expand_const_vector (rtx target, rtx src)
/* Support scalable const series vector. */
rtx base, step;
if (const_vec_series_p (src, &base, &step))
-{
- expand_vec_series (result, base, step);
-
- if (result != target)
- emit_move_insn (target, result);
- return;
-}
+return expand_const_vec_series (target, base, step);
/* Handle variable-length vector. */
unsigned int nelts_per_pattern = CONST_VECTOR_NELTS_PER_PATTERN (src);
[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Extract vec_series for expand_const_vector [NFC]
https://gcc.gnu.org/g:16b845b85fe49f710d01671cc9e50d2a186bc1cc
commit 16b845b85fe49f710d01671cc9e50d2a186bc1cc
Author: Pan Li
Date: Wed Apr 16 14:43:23 2025 +0800
RISC-V: Extract vec_series for expand_const_vector [NFC]
Consider the expand_const_vector is quit long (about 500 lines)
and complicated, we would like to extract the different case
into different functions. For example, the const vec_series
will be extracted into expand_const_vec_series.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
gcc/ChangeLog:
* config/riscv/riscv-v.cc (expand_const_vec_series): Add new
func to take care of the const vec_series.
(expand_const_vector): Extract const vec_series into separated
function.
Signed-off-by: Pan Li
(cherry picked from commit cf366b62f48fc5c06b76a9a78320888a9591031b)
Diff:
---
gcc/config/riscv/riscv-v.cc | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index edb9abcbcad7..f95dfd009ec7 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -1224,6 +1224,18 @@ expand_const_vec_duplicate (rtx target, rtx src, rtx elt)
emit_move_insn (target, result);
}
+static void
+expand_const_vec_series (rtx target, rtx base, rtx step)
+{
+ machine_mode mode = GET_MODE (target);
+ rtx result = register_operand (target, mode) ? target : gen_reg_rtx (mode);
+
+ expand_vec_series (result, base, step);
+
+ if (result != target)
+emit_move_insn (target, result);
+}
+
static void
expand_const_vector (rtx target, rtx src)
{
@@ -1237,13 +1249,7 @@ expand_const_vector (rtx target, rtx src)
/* Support scalable const series vector. */
rtx base, step;
if (const_vec_series_p (src, &base, &step))
-{
- expand_vec_series (result, base, step);
-
- if (result != target)
- emit_move_insn (target, result);
- return;
-}
+return expand_const_vec_series (target, base, step);
/* Handle variable-length vector. */
unsigned int nelts_per_pattern = CONST_VECTOR_NELTS_PER_PATTERN (src);
[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Extract vec_series for expand_const_vector [NFC]
https://gcc.gnu.org/g:1da5604e3d3ffbb13a800c90a0b3d503c8111302
commit 1da5604e3d3ffbb13a800c90a0b3d503c8111302
Author: Pan Li
Date: Wed Apr 16 14:43:23 2025 +0800
RISC-V: Extract vec_series for expand_const_vector [NFC]
Consider the expand_const_vector is quit long (about 500 lines)
and complicated, we would like to extract the different case
into different functions. For example, the const vec_series
will be extracted into expand_const_vec_series.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
gcc/ChangeLog:
* config/riscv/riscv-v.cc (expand_const_vec_series): Add new
func to take care of the const vec_series.
(expand_const_vector): Extract const vec_series into separated
function.
Signed-off-by: Pan Li
(cherry picked from commit cf366b62f48fc5c06b76a9a78320888a9591031b)
Diff:
---
gcc/config/riscv/riscv-v.cc | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index edb9abcbcad7..f95dfd009ec7 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -1224,6 +1224,18 @@ expand_const_vec_duplicate (rtx target, rtx src, rtx elt)
emit_move_insn (target, result);
}
+static void
+expand_const_vec_series (rtx target, rtx base, rtx step)
+{
+ machine_mode mode = GET_MODE (target);
+ rtx result = register_operand (target, mode) ? target : gen_reg_rtx (mode);
+
+ expand_vec_series (result, base, step);
+
+ if (result != target)
+emit_move_insn (target, result);
+}
+
static void
expand_const_vector (rtx target, rtx src)
{
@@ -1237,13 +1249,7 @@ expand_const_vector (rtx target, rtx src)
/* Support scalable const series vector. */
rtx base, step;
if (const_vec_series_p (src, &base, &step))
-{
- expand_vec_series (result, base, step);
-
- if (result != target)
- emit_move_insn (target, result);
- return;
-}
+return expand_const_vec_series (target, base, step);
/* Handle variable-length vector. */
unsigned int nelts_per_pattern = CONST_VECTOR_NELTS_PER_PATTERN (src);
[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Extract vec_series for expand_const_vector [NFC]
https://gcc.gnu.org/g:7bc3d614670c201398b86b5c2325b9ecbbe73751
commit 7bc3d614670c201398b86b5c2325b9ecbbe73751
Author: Pan Li
Date: Wed Apr 16 14:43:23 2025 +0800
RISC-V: Extract vec_series for expand_const_vector [NFC]
Consider the expand_const_vector is quit long (about 500 lines)
and complicated, we would like to extract the different case
into different functions. For example, the const vec_series
will be extracted into expand_const_vec_series.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
gcc/ChangeLog:
* config/riscv/riscv-v.cc (expand_const_vec_series): Add new
func to take care of the const vec_series.
(expand_const_vector): Extract const vec_series into separated
function.
Signed-off-by: Pan Li
(cherry picked from commit cf366b62f48fc5c06b76a9a78320888a9591031b)
Diff:
---
gcc/config/riscv/riscv-v.cc | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index edb9abcbcad7..f95dfd009ec7 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -1224,6 +1224,18 @@ expand_const_vec_duplicate (rtx target, rtx src, rtx elt)
emit_move_insn (target, result);
}
+static void
+expand_const_vec_series (rtx target, rtx base, rtx step)
+{
+ machine_mode mode = GET_MODE (target);
+ rtx result = register_operand (target, mode) ? target : gen_reg_rtx (mode);
+
+ expand_vec_series (result, base, step);
+
+ if (result != target)
+emit_move_insn (target, result);
+}
+
static void
expand_const_vector (rtx target, rtx src)
{
@@ -1237,13 +1249,7 @@ expand_const_vector (rtx target, rtx src)
/* Support scalable const series vector. */
rtx base, step;
if (const_vec_series_p (src, &base, &step))
-{
- expand_vec_series (result, base, step);
-
- if (result != target)
- emit_move_insn (target, result);
- return;
-}
+return expand_const_vec_series (target, base, step);
/* Handle variable-length vector. */
unsigned int nelts_per_pattern = CONST_VECTOR_NELTS_PER_PATTERN (src);
[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Extract vec_series for expand_const_vector [NFC]
https://gcc.gnu.org/g:1b348771f4d3ea3bab26d7925cf9a2ada3a3add7
commit 1b348771f4d3ea3bab26d7925cf9a2ada3a3add7
Author: Pan Li
Date: Wed Apr 16 14:43:23 2025 +0800
RISC-V: Extract vec_series for expand_const_vector [NFC]
Consider the expand_const_vector is quit long (about 500 lines)
and complicated, we would like to extract the different case
into different functions. For example, the const vec_series
will be extracted into expand_const_vec_series.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
gcc/ChangeLog:
* config/riscv/riscv-v.cc (expand_const_vec_series): Add new
func to take care of the const vec_series.
(expand_const_vector): Extract const vec_series into separated
function.
Signed-off-by: Pan Li
(cherry picked from commit cf366b62f48fc5c06b76a9a78320888a9591031b)
Diff:
---
gcc/config/riscv/riscv-v.cc | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index 1eb14a24e3db..e0af296449c3 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -1224,6 +1224,18 @@ expand_const_vec_duplicate (rtx target, rtx src, rtx elt)
emit_move_insn (target, result);
}
+static void
+expand_const_vec_series (rtx target, rtx base, rtx step)
+{
+ machine_mode mode = GET_MODE (target);
+ rtx result = register_operand (target, mode) ? target : gen_reg_rtx (mode);
+
+ expand_vec_series (result, base, step);
+
+ if (result != target)
+emit_move_insn (target, result);
+}
+
static void
expand_const_vector (rtx target, rtx src)
{
@@ -1237,13 +1249,7 @@ expand_const_vector (rtx target, rtx src)
/* Support scalable const series vector. */
rtx base, step;
if (const_vec_series_p (src, &base, &step))
-{
- expand_vec_series (result, base, step);
-
- if (result != target)
- emit_move_insn (target, result);
- return;
-}
+return expand_const_vec_series (target, base, step);
/* Handle variable-length vector. */
unsigned int nelts_per_pattern = CONST_VECTOR_NELTS_PER_PATTERN (src);
[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Extract vec_series for expand_const_vector [NFC]
https://gcc.gnu.org/g:8146b6eb1b61ab37a65397b7ee7abe5a49a173a0
commit 8146b6eb1b61ab37a65397b7ee7abe5a49a173a0
Author: Pan Li
Date: Wed Apr 16 14:43:23 2025 +0800
RISC-V: Extract vec_series for expand_const_vector [NFC]
Consider the expand_const_vector is quit long (about 500 lines)
and complicated, we would like to extract the different case
into different functions. For example, the const vec_series
will be extracted into expand_const_vec_series.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
gcc/ChangeLog:
* config/riscv/riscv-v.cc (expand_const_vec_series): Add new
func to take care of the const vec_series.
(expand_const_vector): Extract const vec_series into separated
function.
Signed-off-by: Pan Li
(cherry picked from commit cf366b62f48fc5c06b76a9a78320888a9591031b)
Diff:
---
gcc/config/riscv/riscv-v.cc | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/gcc/config/riscv/riscv-v.cc b/gcc/config/riscv/riscv-v.cc
index 1eb14a24e3db..e0af296449c3 100644
--- a/gcc/config/riscv/riscv-v.cc
+++ b/gcc/config/riscv/riscv-v.cc
@@ -1224,6 +1224,18 @@ expand_const_vec_duplicate (rtx target, rtx src, rtx elt)
emit_move_insn (target, result);
}
+static void
+expand_const_vec_series (rtx target, rtx base, rtx step)
+{
+ machine_mode mode = GET_MODE (target);
+ rtx result = register_operand (target, mode) ? target : gen_reg_rtx (mode);
+
+ expand_vec_series (result, base, step);
+
+ if (result != target)
+emit_move_insn (target, result);
+}
+
static void
expand_const_vector (rtx target, rtx src)
{
@@ -1237,13 +1249,7 @@ expand_const_vector (rtx target, rtx src)
/* Support scalable const series vector. */
rtx base, step;
if (const_vec_series_p (src, &base, &step))
-{
- expand_vec_series (result, base, step);
-
- if (result != target)
- emit_move_insn (target, result);
- return;
-}
+return expand_const_vec_series (target, base, step);
/* Handle variable-length vector. */
unsigned int nelts_per_pattern = CONST_VECTOR_NELTS_PER_PATTERN (src);
