[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RISC-V Profiles 20/22.
https://gcc.gnu.org/g:1fc5c6ea1e4a035bdd956af5be9e05b2ba6de370
commit 1fc5c6ea1e4a035bdd956af5be9e05b2ba6de370
Author: Jiawei
Date: Sat May 10 20:25:52 2025 +0800
RISC-V: Support RISC-V Profiles 20/22.
This patch introduces support for RISC-V Profiles RV20 and RV22 [1],
enabling developers to utilize these profiles through the -march option.
[1] https://github.com/riscv/riscv-profiles/releases/tag/v1.0
Version log:
Using lowercase letters to present Profiles.
Using '_' as divsor between Profiles and other RISC-V extension.
Add descriptions in invoke.texi.
Checking if there exist '_' between Profiles and additional extensions.
Using std::string to avoid memory problems.
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc (struct riscv_profiles): New
struct.
(riscv_subset_list::parse_profiles): New parser.
(riscv_subset_list::parse_base_ext): Ditto.
* config/riscv/riscv-subset.h: New def.
* doc/invoke.texi: New option descriptions.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/arch-49.c: New test.
* gcc.target/riscv/arch-50.c: New test.
* gcc.target/riscv/arch-51.c: New test.
* gcc.target/riscv/arch-52.c: New test.
(cherry picked from commit 43b450e3f72a53c744e77f55393962f1d349373a)
Diff:
---
gcc/common/config/riscv/riscv-common.cc | 85 ++--
gcc/config/riscv/riscv-subset.h | 2 +
gcc/doc/invoke.texi | 17 ---
gcc/testsuite/gcc.target/riscv/arch-49.c | 5 ++
gcc/testsuite/gcc.target/riscv/arch-50.c | 12 +
gcc/testsuite/gcc.target/riscv/arch-51.c | 12 +
gcc/testsuite/gcc.target/riscv/arch-52.c | 6 +++
7 files changed, 130 insertions(+), 9 deletions(-)
diff --git a/gcc/common/config/riscv/riscv-common.cc
b/gcc/common/config/riscv/riscv-common.cc
index ca14eb96b253..0fa2e21f272d 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -274,6 +274,12 @@ struct riscv_ext_version
int minor_version;
};
+struct riscv_profiles
+{
+ const char *profile_name;
+ const char *profile_string;
+};
+
/* All standard extensions defined in all supported ISA spec. */
static const struct riscv_ext_version riscv_ext_version_table[] =
{
@@ -502,6 +508,31 @@ static const struct riscv_ext_version riscv_combine_info[]
=
{NULL, ISA_SPEC_CLASS_NONE, 0, 0}
};
+/* This table records the mapping form RISC-V Profiles into march string. */
+static const riscv_profiles riscv_profiles_table[] =
+{
+ /* RVI20U only contains the base extension 'i' as mandatory extension. */
+ {"rvi20u64", "rv64i"},
+ {"rvi20u32", "rv32i"},
+
+ /* RVA20U contains the 'i,m,a,f,d,c,zicsr,zicntr,ziccif,ziccrse,ziccamoa,
+ zicclsm,za128rs' as mandatory extensions. */
+ {"rva20u64", "rv64imafdc_zicsr_zicntr_ziccif_ziccrse_ziccamoa"
+ "_zicclsm_za128rs"},
+
+ /* RVA22U contains the 'i,m,a,f,d,c,zicsr,zihintpause,zba,zbb,zbs,zicntr,
+ zihpm,ziccif,ziccrse,ziccamoa, zicclsm,zic64b,za64rs,zicbom,zicbop,zicboz,
+ zfhmin,zkt' as mandatory extensions. */
+ {"rva22u64", "rv64imafdc_zicsr_zicntr_ziccif_ziccrse_ziccamoa"
+ "_zicclsm_zic64b_za64rs_zihintpause_zba_zbb_zbs_zicbom_zicbop"
+ "_zicboz_zfhmin_zkt"},
+
+ /* Currently we do not define S/M mode Profiles in gcc part. */
+
+ /* Terminate the list. */
+ {NULL, NULL}
+};
+
static const riscv_cpu_info riscv_cpu_tables[] =
{
#define RISCV_CORE(CORE_NAME, ARCH, TUNE) \
@@ -1109,6 +1140,52 @@ riscv_subset_list::parsing_subset_version (const char
*ext,
return p;
}
+/* Parsing RISC-V Profiles in -march string.
+ Return string with mandatory extensions of Profiles. */
+std::string
+riscv_subset_list::parse_profiles (const char *arch)
+{
+ /* Checking if input string contains a Profiles.
+There are two cases use Profiles in -march option:
+
+1. Only use Profiles in '-march' as input
+2. Mixed Profiles with other extensions
+
+Use '_' to split Profiles and other extension. */
+std::string p(arch);
+const size_t p_len = p.size();
+
+for (int i = 0; riscv_profiles_table[i].profile_name != nullptr; ++i)
+{
+ const std::string& p_name = riscv_profiles_table[i].profile_name;
+ const std::string& p_str = riscv_profiles_table[i].profile_string;
+ size_t pos = p.find(p_name);
+ /* Find profile at the begin. */
+ if (pos == 0 && pos + p_name.size() <= p_len)
+ {
+ size_t after_pos = pos + p_name.size();
+ std::string after_part = p.substr(after_pos);
+
+ /* If there're only profile, return the profile_string directly. */
+ if (after_part[0] == '\0')
+ return p_str;
+
+ /* If isn't '_' after profile, need to add it and mention the user.
*/
+ if (after_part[0] != '_')
+ {
+ warning_at (m_loc, 0, "Should use \"%c
[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RISC-V Profiles 20/22.
https://gcc.gnu.org/g:cf38c7b6c3afd3eb9a06d2146daffaa8f46baebd
commit cf38c7b6c3afd3eb9a06d2146daffaa8f46baebd
Author: Jiawei
Date: Sat May 10 20:25:52 2025 +0800
RISC-V: Support RISC-V Profiles 20/22.
This patch introduces support for RISC-V Profiles RV20 and RV22 [1],
enabling developers to utilize these profiles through the -march option.
[1] https://github.com/riscv/riscv-profiles/releases/tag/v1.0
Version log:
Using lowercase letters to present Profiles.
Using '_' as divsor between Profiles and other RISC-V extension.
Add descriptions in invoke.texi.
Checking if there exist '_' between Profiles and additional extensions.
Using std::string to avoid memory problems.
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc (struct riscv_profiles): New
struct.
(riscv_subset_list::parse_profiles): New parser.
(riscv_subset_list::parse_base_ext): Ditto.
* config/riscv/riscv-subset.h: New def.
* doc/invoke.texi: New option descriptions.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/arch-49.c: New test.
* gcc.target/riscv/arch-50.c: New test.
* gcc.target/riscv/arch-51.c: New test.
* gcc.target/riscv/arch-52.c: New test.
(cherry picked from commit 43b450e3f72a53c744e77f55393962f1d349373a)
Diff:
---
gcc/common/config/riscv/riscv-common.cc | 85 ++--
gcc/config/riscv/riscv-subset.h | 2 +
gcc/doc/invoke.texi | 17 ---
gcc/testsuite/gcc.target/riscv/arch-49.c | 5 ++
gcc/testsuite/gcc.target/riscv/arch-50.c | 12 +
gcc/testsuite/gcc.target/riscv/arch-51.c | 12 +
gcc/testsuite/gcc.target/riscv/arch-52.c | 6 +++
7 files changed, 130 insertions(+), 9 deletions(-)
diff --git a/gcc/common/config/riscv/riscv-common.cc
b/gcc/common/config/riscv/riscv-common.cc
index ca14eb96b253..0fa2e21f272d 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -274,6 +274,12 @@ struct riscv_ext_version
int minor_version;
};
+struct riscv_profiles
+{
+ const char *profile_name;
+ const char *profile_string;
+};
+
/* All standard extensions defined in all supported ISA spec. */
static const struct riscv_ext_version riscv_ext_version_table[] =
{
@@ -502,6 +508,31 @@ static const struct riscv_ext_version riscv_combine_info[]
=
{NULL, ISA_SPEC_CLASS_NONE, 0, 0}
};
+/* This table records the mapping form RISC-V Profiles into march string. */
+static const riscv_profiles riscv_profiles_table[] =
+{
+ /* RVI20U only contains the base extension 'i' as mandatory extension. */
+ {"rvi20u64", "rv64i"},
+ {"rvi20u32", "rv32i"},
+
+ /* RVA20U contains the 'i,m,a,f,d,c,zicsr,zicntr,ziccif,ziccrse,ziccamoa,
+ zicclsm,za128rs' as mandatory extensions. */
+ {"rva20u64", "rv64imafdc_zicsr_zicntr_ziccif_ziccrse_ziccamoa"
+ "_zicclsm_za128rs"},
+
+ /* RVA22U contains the 'i,m,a,f,d,c,zicsr,zihintpause,zba,zbb,zbs,zicntr,
+ zihpm,ziccif,ziccrse,ziccamoa, zicclsm,zic64b,za64rs,zicbom,zicbop,zicboz,
+ zfhmin,zkt' as mandatory extensions. */
+ {"rva22u64", "rv64imafdc_zicsr_zicntr_ziccif_ziccrse_ziccamoa"
+ "_zicclsm_zic64b_za64rs_zihintpause_zba_zbb_zbs_zicbom_zicbop"
+ "_zicboz_zfhmin_zkt"},
+
+ /* Currently we do not define S/M mode Profiles in gcc part. */
+
+ /* Terminate the list. */
+ {NULL, NULL}
+};
+
static const riscv_cpu_info riscv_cpu_tables[] =
{
#define RISCV_CORE(CORE_NAME, ARCH, TUNE) \
@@ -1109,6 +1140,52 @@ riscv_subset_list::parsing_subset_version (const char
*ext,
return p;
}
+/* Parsing RISC-V Profiles in -march string.
+ Return string with mandatory extensions of Profiles. */
+std::string
+riscv_subset_list::parse_profiles (const char *arch)
+{
+ /* Checking if input string contains a Profiles.
+There are two cases use Profiles in -march option:
+
+1. Only use Profiles in '-march' as input
+2. Mixed Profiles with other extensions
+
+Use '_' to split Profiles and other extension. */
+std::string p(arch);
+const size_t p_len = p.size();
+
+for (int i = 0; riscv_profiles_table[i].profile_name != nullptr; ++i)
+{
+ const std::string& p_name = riscv_profiles_table[i].profile_name;
+ const std::string& p_str = riscv_profiles_table[i].profile_string;
+ size_t pos = p.find(p_name);
+ /* Find profile at the begin. */
+ if (pos == 0 && pos + p_name.size() <= p_len)
+ {
+ size_t after_pos = pos + p_name.size();
+ std::string after_part = p.substr(after_pos);
+
+ /* If there're only profile, return the profile_string directly. */
+ if (after_part[0] == '\0')
+ return p_str;
+
+ /* If isn't '_' after profile, need to add it and mention the user.
*/
+ if (after_part[0] != '_')
+ {
+ warning_at (m_loc, 0, "Should use \"%c
[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RISC-V Profiles 20/22.
https://gcc.gnu.org/g:512416ec4cafd077b0b9e945598d1c18fd6adaea
commit 512416ec4cafd077b0b9e945598d1c18fd6adaea
Author: Jiawei
Date: Sat May 10 20:25:52 2025 +0800
RISC-V: Support RISC-V Profiles 20/22.
This patch introduces support for RISC-V Profiles RV20 and RV22 [1],
enabling developers to utilize these profiles through the -march option.
[1] https://github.com/riscv/riscv-profiles/releases/tag/v1.0
Version log:
Using lowercase letters to present Profiles.
Using '_' as divsor between Profiles and other RISC-V extension.
Add descriptions in invoke.texi.
Checking if there exist '_' between Profiles and additional extensions.
Using std::string to avoid memory problems.
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc (struct riscv_profiles): New
struct.
(riscv_subset_list::parse_profiles): New parser.
(riscv_subset_list::parse_base_ext): Ditto.
* config/riscv/riscv-subset.h: New def.
* doc/invoke.texi: New option descriptions.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/arch-49.c: New test.
* gcc.target/riscv/arch-50.c: New test.
* gcc.target/riscv/arch-51.c: New test.
* gcc.target/riscv/arch-52.c: New test.
(cherry picked from commit 43b450e3f72a53c744e77f55393962f1d349373a)
Diff:
---
gcc/common/config/riscv/riscv-common.cc | 85 ++--
gcc/config/riscv/riscv-subset.h | 2 +
gcc/doc/invoke.texi | 17 ---
gcc/testsuite/gcc.target/riscv/arch-49.c | 5 ++
gcc/testsuite/gcc.target/riscv/arch-50.c | 12 +
gcc/testsuite/gcc.target/riscv/arch-51.c | 12 +
gcc/testsuite/gcc.target/riscv/arch-52.c | 6 +++
7 files changed, 130 insertions(+), 9 deletions(-)
diff --git a/gcc/common/config/riscv/riscv-common.cc
b/gcc/common/config/riscv/riscv-common.cc
index ca14eb96b253..0fa2e21f272d 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -274,6 +274,12 @@ struct riscv_ext_version
int minor_version;
};
+struct riscv_profiles
+{
+ const char *profile_name;
+ const char *profile_string;
+};
+
/* All standard extensions defined in all supported ISA spec. */
static const struct riscv_ext_version riscv_ext_version_table[] =
{
@@ -502,6 +508,31 @@ static const struct riscv_ext_version riscv_combine_info[]
=
{NULL, ISA_SPEC_CLASS_NONE, 0, 0}
};
+/* This table records the mapping form RISC-V Profiles into march string. */
+static const riscv_profiles riscv_profiles_table[] =
+{
+ /* RVI20U only contains the base extension 'i' as mandatory extension. */
+ {"rvi20u64", "rv64i"},
+ {"rvi20u32", "rv32i"},
+
+ /* RVA20U contains the 'i,m,a,f,d,c,zicsr,zicntr,ziccif,ziccrse,ziccamoa,
+ zicclsm,za128rs' as mandatory extensions. */
+ {"rva20u64", "rv64imafdc_zicsr_zicntr_ziccif_ziccrse_ziccamoa"
+ "_zicclsm_za128rs"},
+
+ /* RVA22U contains the 'i,m,a,f,d,c,zicsr,zihintpause,zba,zbb,zbs,zicntr,
+ zihpm,ziccif,ziccrse,ziccamoa, zicclsm,zic64b,za64rs,zicbom,zicbop,zicboz,
+ zfhmin,zkt' as mandatory extensions. */
+ {"rva22u64", "rv64imafdc_zicsr_zicntr_ziccif_ziccrse_ziccamoa"
+ "_zicclsm_zic64b_za64rs_zihintpause_zba_zbb_zbs_zicbom_zicbop"
+ "_zicboz_zfhmin_zkt"},
+
+ /* Currently we do not define S/M mode Profiles in gcc part. */
+
+ /* Terminate the list. */
+ {NULL, NULL}
+};
+
static const riscv_cpu_info riscv_cpu_tables[] =
{
#define RISCV_CORE(CORE_NAME, ARCH, TUNE) \
@@ -1109,6 +1140,52 @@ riscv_subset_list::parsing_subset_version (const char
*ext,
return p;
}
+/* Parsing RISC-V Profiles in -march string.
+ Return string with mandatory extensions of Profiles. */
+std::string
+riscv_subset_list::parse_profiles (const char *arch)
+{
+ /* Checking if input string contains a Profiles.
+There are two cases use Profiles in -march option:
+
+1. Only use Profiles in '-march' as input
+2. Mixed Profiles with other extensions
+
+Use '_' to split Profiles and other extension. */
+std::string p(arch);
+const size_t p_len = p.size();
+
+for (int i = 0; riscv_profiles_table[i].profile_name != nullptr; ++i)
+{
+ const std::string& p_name = riscv_profiles_table[i].profile_name;
+ const std::string& p_str = riscv_profiles_table[i].profile_string;
+ size_t pos = p.find(p_name);
+ /* Find profile at the begin. */
+ if (pos == 0 && pos + p_name.size() <= p_len)
+ {
+ size_t after_pos = pos + p_name.size();
+ std::string after_part = p.substr(after_pos);
+
+ /* If there're only profile, return the profile_string directly. */
+ if (after_part[0] == '\0')
+ return p_str;
+
+ /* If isn't '_' after profile, need to add it and mention the user.
*/
+ if (after_part[0] != '_')
+ {
+ warning_at (m_loc, 0, "Should use \"%c
[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RISC-V Profiles 20/22.
https://gcc.gnu.org/g:0e392bb1d8c06293e2cbaef084dfa6619bec201f
commit 0e392bb1d8c06293e2cbaef084dfa6619bec201f
Author: Jiawei
Date: Sat May 10 20:25:52 2025 +0800
RISC-V: Support RISC-V Profiles 20/22.
This patch introduces support for RISC-V Profiles RV20 and RV22 [1],
enabling developers to utilize these profiles through the -march option.
[1] https://github.com/riscv/riscv-profiles/releases/tag/v1.0
Version log:
Using lowercase letters to present Profiles.
Using '_' as divsor between Profiles and other RISC-V extension.
Add descriptions in invoke.texi.
Checking if there exist '_' between Profiles and additional extensions.
Using std::string to avoid memory problems.
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc (struct riscv_profiles): New
struct.
(riscv_subset_list::parse_profiles): New parser.
(riscv_subset_list::parse_base_ext): Ditto.
* config/riscv/riscv-subset.h: New def.
* doc/invoke.texi: New option descriptions.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/arch-49.c: New test.
* gcc.target/riscv/arch-50.c: New test.
* gcc.target/riscv/arch-51.c: New test.
* gcc.target/riscv/arch-52.c: New test.
(cherry picked from commit 43b450e3f72a53c744e77f55393962f1d349373a)
Diff:
---
gcc/common/config/riscv/riscv-common.cc | 85 ++--
gcc/config/riscv/riscv-subset.h | 2 +
gcc/doc/invoke.texi | 17 ---
gcc/testsuite/gcc.target/riscv/arch-49.c | 5 ++
gcc/testsuite/gcc.target/riscv/arch-50.c | 12 +
gcc/testsuite/gcc.target/riscv/arch-51.c | 12 +
gcc/testsuite/gcc.target/riscv/arch-52.c | 6 +++
7 files changed, 130 insertions(+), 9 deletions(-)
diff --git a/gcc/common/config/riscv/riscv-common.cc
b/gcc/common/config/riscv/riscv-common.cc
index ca14eb96b253..0fa2e21f272d 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -274,6 +274,12 @@ struct riscv_ext_version
int minor_version;
};
+struct riscv_profiles
+{
+ const char *profile_name;
+ const char *profile_string;
+};
+
/* All standard extensions defined in all supported ISA spec. */
static const struct riscv_ext_version riscv_ext_version_table[] =
{
@@ -502,6 +508,31 @@ static const struct riscv_ext_version riscv_combine_info[]
=
{NULL, ISA_SPEC_CLASS_NONE, 0, 0}
};
+/* This table records the mapping form RISC-V Profiles into march string. */
+static const riscv_profiles riscv_profiles_table[] =
+{
+ /* RVI20U only contains the base extension 'i' as mandatory extension. */
+ {"rvi20u64", "rv64i"},
+ {"rvi20u32", "rv32i"},
+
+ /* RVA20U contains the 'i,m,a,f,d,c,zicsr,zicntr,ziccif,ziccrse,ziccamoa,
+ zicclsm,za128rs' as mandatory extensions. */
+ {"rva20u64", "rv64imafdc_zicsr_zicntr_ziccif_ziccrse_ziccamoa"
+ "_zicclsm_za128rs"},
+
+ /* RVA22U contains the 'i,m,a,f,d,c,zicsr,zihintpause,zba,zbb,zbs,zicntr,
+ zihpm,ziccif,ziccrse,ziccamoa, zicclsm,zic64b,za64rs,zicbom,zicbop,zicboz,
+ zfhmin,zkt' as mandatory extensions. */
+ {"rva22u64", "rv64imafdc_zicsr_zicntr_ziccif_ziccrse_ziccamoa"
+ "_zicclsm_zic64b_za64rs_zihintpause_zba_zbb_zbs_zicbom_zicbop"
+ "_zicboz_zfhmin_zkt"},
+
+ /* Currently we do not define S/M mode Profiles in gcc part. */
+
+ /* Terminate the list. */
+ {NULL, NULL}
+};
+
static const riscv_cpu_info riscv_cpu_tables[] =
{
#define RISCV_CORE(CORE_NAME, ARCH, TUNE) \
@@ -1109,6 +1140,52 @@ riscv_subset_list::parsing_subset_version (const char
*ext,
return p;
}
+/* Parsing RISC-V Profiles in -march string.
+ Return string with mandatory extensions of Profiles. */
+std::string
+riscv_subset_list::parse_profiles (const char *arch)
+{
+ /* Checking if input string contains a Profiles.
+There are two cases use Profiles in -march option:
+
+1. Only use Profiles in '-march' as input
+2. Mixed Profiles with other extensions
+
+Use '_' to split Profiles and other extension. */
+std::string p(arch);
+const size_t p_len = p.size();
+
+for (int i = 0; riscv_profiles_table[i].profile_name != nullptr; ++i)
+{
+ const std::string& p_name = riscv_profiles_table[i].profile_name;
+ const std::string& p_str = riscv_profiles_table[i].profile_string;
+ size_t pos = p.find(p_name);
+ /* Find profile at the begin. */
+ if (pos == 0 && pos + p_name.size() <= p_len)
+ {
+ size_t after_pos = pos + p_name.size();
+ std::string after_part = p.substr(after_pos);
+
+ /* If there're only profile, return the profile_string directly. */
+ if (after_part[0] == '\0')
+ return p_str;
+
+ /* If isn't '_' after profile, need to add it and mention the user.
*/
+ if (after_part[0] != '_')
+ {
+ warning_at (m_loc, 0, "Should use \"%c
[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RISC-V Profiles 20/22.
https://gcc.gnu.org/g:3c887420a1fd53fdf512dd9aef65c61627efd498
commit 3c887420a1fd53fdf512dd9aef65c61627efd498
Author: Jiawei
Date: Sat May 10 20:25:52 2025 +0800
RISC-V: Support RISC-V Profiles 20/22.
This patch introduces support for RISC-V Profiles RV20 and RV22 [1],
enabling developers to utilize these profiles through the -march option.
[1] https://github.com/riscv/riscv-profiles/releases/tag/v1.0
Version log:
Using lowercase letters to present Profiles.
Using '_' as divsor between Profiles and other RISC-V extension.
Add descriptions in invoke.texi.
Checking if there exist '_' between Profiles and additional extensions.
Using std::string to avoid memory problems.
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc (struct riscv_profiles): New
struct.
(riscv_subset_list::parse_profiles): New parser.
(riscv_subset_list::parse_base_ext): Ditto.
* config/riscv/riscv-subset.h: New def.
* doc/invoke.texi: New option descriptions.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/arch-49.c: New test.
* gcc.target/riscv/arch-50.c: New test.
* gcc.target/riscv/arch-51.c: New test.
* gcc.target/riscv/arch-52.c: New test.
(cherry picked from commit 43b450e3f72a53c744e77f55393962f1d349373a)
Diff:
---
gcc/common/config/riscv/riscv-common.cc | 85 ++--
gcc/config/riscv/riscv-subset.h | 2 +
gcc/doc/invoke.texi | 17 ---
gcc/testsuite/gcc.target/riscv/arch-49.c | 5 ++
gcc/testsuite/gcc.target/riscv/arch-50.c | 12 +
gcc/testsuite/gcc.target/riscv/arch-51.c | 12 +
gcc/testsuite/gcc.target/riscv/arch-52.c | 6 +++
7 files changed, 130 insertions(+), 9 deletions(-)
diff --git a/gcc/common/config/riscv/riscv-common.cc
b/gcc/common/config/riscv/riscv-common.cc
index ca14eb96b253..0fa2e21f272d 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -274,6 +274,12 @@ struct riscv_ext_version
int minor_version;
};
+struct riscv_profiles
+{
+ const char *profile_name;
+ const char *profile_string;
+};
+
/* All standard extensions defined in all supported ISA spec. */
static const struct riscv_ext_version riscv_ext_version_table[] =
{
@@ -502,6 +508,31 @@ static const struct riscv_ext_version riscv_combine_info[]
=
{NULL, ISA_SPEC_CLASS_NONE, 0, 0}
};
+/* This table records the mapping form RISC-V Profiles into march string. */
+static const riscv_profiles riscv_profiles_table[] =
+{
+ /* RVI20U only contains the base extension 'i' as mandatory extension. */
+ {"rvi20u64", "rv64i"},
+ {"rvi20u32", "rv32i"},
+
+ /* RVA20U contains the 'i,m,a,f,d,c,zicsr,zicntr,ziccif,ziccrse,ziccamoa,
+ zicclsm,za128rs' as mandatory extensions. */
+ {"rva20u64", "rv64imafdc_zicsr_zicntr_ziccif_ziccrse_ziccamoa"
+ "_zicclsm_za128rs"},
+
+ /* RVA22U contains the 'i,m,a,f,d,c,zicsr,zihintpause,zba,zbb,zbs,zicntr,
+ zihpm,ziccif,ziccrse,ziccamoa, zicclsm,zic64b,za64rs,zicbom,zicbop,zicboz,
+ zfhmin,zkt' as mandatory extensions. */
+ {"rva22u64", "rv64imafdc_zicsr_zicntr_ziccif_ziccrse_ziccamoa"
+ "_zicclsm_zic64b_za64rs_zihintpause_zba_zbb_zbs_zicbom_zicbop"
+ "_zicboz_zfhmin_zkt"},
+
+ /* Currently we do not define S/M mode Profiles in gcc part. */
+
+ /* Terminate the list. */
+ {NULL, NULL}
+};
+
static const riscv_cpu_info riscv_cpu_tables[] =
{
#define RISCV_CORE(CORE_NAME, ARCH, TUNE) \
@@ -1109,6 +1140,52 @@ riscv_subset_list::parsing_subset_version (const char
*ext,
return p;
}
+/* Parsing RISC-V Profiles in -march string.
+ Return string with mandatory extensions of Profiles. */
+std::string
+riscv_subset_list::parse_profiles (const char *arch)
+{
+ /* Checking if input string contains a Profiles.
+There are two cases use Profiles in -march option:
+
+1. Only use Profiles in '-march' as input
+2. Mixed Profiles with other extensions
+
+Use '_' to split Profiles and other extension. */
+std::string p(arch);
+const size_t p_len = p.size();
+
+for (int i = 0; riscv_profiles_table[i].profile_name != nullptr; ++i)
+{
+ const std::string& p_name = riscv_profiles_table[i].profile_name;
+ const std::string& p_str = riscv_profiles_table[i].profile_string;
+ size_t pos = p.find(p_name);
+ /* Find profile at the begin. */
+ if (pos == 0 && pos + p_name.size() <= p_len)
+ {
+ size_t after_pos = pos + p_name.size();
+ std::string after_part = p.substr(after_pos);
+
+ /* If there're only profile, return the profile_string directly. */
+ if (after_part[0] == '\0')
+ return p_str;
+
+ /* If isn't '_' after profile, need to add it and mention the user.
*/
+ if (after_part[0] != '_')
+ {
+ warning_at (m_loc, 0, "Should use \"%c
[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RISC-V Profiles 20/22.
https://gcc.gnu.org/g:acc79c4ee35c1bf84bdb31d74e132b22095bea87
commit acc79c4ee35c1bf84bdb31d74e132b22095bea87
Author: Jiawei
Date: Sat May 10 20:25:52 2025 +0800
RISC-V: Support RISC-V Profiles 20/22.
This patch introduces support for RISC-V Profiles RV20 and RV22 [1],
enabling developers to utilize these profiles through the -march option.
[1] https://github.com/riscv/riscv-profiles/releases/tag/v1.0
Version log:
Using lowercase letters to present Profiles.
Using '_' as divsor between Profiles and other RISC-V extension.
Add descriptions in invoke.texi.
Checking if there exist '_' between Profiles and additional extensions.
Using std::string to avoid memory problems.
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc (struct riscv_profiles): New
struct.
(riscv_subset_list::parse_profiles): New parser.
(riscv_subset_list::parse_base_ext): Ditto.
* config/riscv/riscv-subset.h: New def.
* doc/invoke.texi: New option descriptions.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/arch-49.c: New test.
* gcc.target/riscv/arch-50.c: New test.
* gcc.target/riscv/arch-51.c: New test.
* gcc.target/riscv/arch-52.c: New test.
(cherry picked from commit 43b450e3f72a53c744e77f55393962f1d349373a)
Diff:
---
gcc/common/config/riscv/riscv-common.cc | 85 ++--
gcc/config/riscv/riscv-subset.h | 2 +
gcc/doc/invoke.texi | 17 ---
gcc/testsuite/gcc.target/riscv/arch-49.c | 5 ++
gcc/testsuite/gcc.target/riscv/arch-50.c | 12 +
gcc/testsuite/gcc.target/riscv/arch-51.c | 12 +
gcc/testsuite/gcc.target/riscv/arch-52.c | 6 +++
7 files changed, 130 insertions(+), 9 deletions(-)
diff --git a/gcc/common/config/riscv/riscv-common.cc
b/gcc/common/config/riscv/riscv-common.cc
index ca14eb96b253..0fa2e21f272d 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -274,6 +274,12 @@ struct riscv_ext_version
int minor_version;
};
+struct riscv_profiles
+{
+ const char *profile_name;
+ const char *profile_string;
+};
+
/* All standard extensions defined in all supported ISA spec. */
static const struct riscv_ext_version riscv_ext_version_table[] =
{
@@ -502,6 +508,31 @@ static const struct riscv_ext_version riscv_combine_info[]
=
{NULL, ISA_SPEC_CLASS_NONE, 0, 0}
};
+/* This table records the mapping form RISC-V Profiles into march string. */
+static const riscv_profiles riscv_profiles_table[] =
+{
+ /* RVI20U only contains the base extension 'i' as mandatory extension. */
+ {"rvi20u64", "rv64i"},
+ {"rvi20u32", "rv32i"},
+
+ /* RVA20U contains the 'i,m,a,f,d,c,zicsr,zicntr,ziccif,ziccrse,ziccamoa,
+ zicclsm,za128rs' as mandatory extensions. */
+ {"rva20u64", "rv64imafdc_zicsr_zicntr_ziccif_ziccrse_ziccamoa"
+ "_zicclsm_za128rs"},
+
+ /* RVA22U contains the 'i,m,a,f,d,c,zicsr,zihintpause,zba,zbb,zbs,zicntr,
+ zihpm,ziccif,ziccrse,ziccamoa, zicclsm,zic64b,za64rs,zicbom,zicbop,zicboz,
+ zfhmin,zkt' as mandatory extensions. */
+ {"rva22u64", "rv64imafdc_zicsr_zicntr_ziccif_ziccrse_ziccamoa"
+ "_zicclsm_zic64b_za64rs_zihintpause_zba_zbb_zbs_zicbom_zicbop"
+ "_zicboz_zfhmin_zkt"},
+
+ /* Currently we do not define S/M mode Profiles in gcc part. */
+
+ /* Terminate the list. */
+ {NULL, NULL}
+};
+
static const riscv_cpu_info riscv_cpu_tables[] =
{
#define RISCV_CORE(CORE_NAME, ARCH, TUNE) \
@@ -1109,6 +1140,52 @@ riscv_subset_list::parsing_subset_version (const char
*ext,
return p;
}
+/* Parsing RISC-V Profiles in -march string.
+ Return string with mandatory extensions of Profiles. */
+std::string
+riscv_subset_list::parse_profiles (const char *arch)
+{
+ /* Checking if input string contains a Profiles.
+There are two cases use Profiles in -march option:
+
+1. Only use Profiles in '-march' as input
+2. Mixed Profiles with other extensions
+
+Use '_' to split Profiles and other extension. */
+std::string p(arch);
+const size_t p_len = p.size();
+
+for (int i = 0; riscv_profiles_table[i].profile_name != nullptr; ++i)
+{
+ const std::string& p_name = riscv_profiles_table[i].profile_name;
+ const std::string& p_str = riscv_profiles_table[i].profile_string;
+ size_t pos = p.find(p_name);
+ /* Find profile at the begin. */
+ if (pos == 0 && pos + p_name.size() <= p_len)
+ {
+ size_t after_pos = pos + p_name.size();
+ std::string after_part = p.substr(after_pos);
+
+ /* If there're only profile, return the profile_string directly. */
+ if (after_part[0] == '\0')
+ return p_str;
+
+ /* If isn't '_' after profile, need to add it and mention the user.
*/
+ if (after_part[0] != '_')
+ {
+ warning_at (m_loc, 0, "Should use \"%c
[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RISC-V Profiles 20/22.
https://gcc.gnu.org/g:1db0ba396dc19869ba5c32d6e94a942ecd1b8ed3
commit 1db0ba396dc19869ba5c32d6e94a942ecd1b8ed3
Author: Jiawei
Date: Sat May 10 20:25:52 2025 +0800
RISC-V: Support RISC-V Profiles 20/22.
This patch introduces support for RISC-V Profiles RV20 and RV22 [1],
enabling developers to utilize these profiles through the -march option.
[1] https://github.com/riscv/riscv-profiles/releases/tag/v1.0
Version log:
Using lowercase letters to present Profiles.
Using '_' as divsor between Profiles and other RISC-V extension.
Add descriptions in invoke.texi.
Checking if there exist '_' between Profiles and additional extensions.
Using std::string to avoid memory problems.
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc (struct riscv_profiles): New
struct.
(riscv_subset_list::parse_profiles): New parser.
(riscv_subset_list::parse_base_ext): Ditto.
* config/riscv/riscv-subset.h: New def.
* doc/invoke.texi: New option descriptions.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/arch-49.c: New test.
* gcc.target/riscv/arch-50.c: New test.
* gcc.target/riscv/arch-51.c: New test.
* gcc.target/riscv/arch-52.c: New test.
(cherry picked from commit 43b450e3f72a53c744e77f55393962f1d349373a)
Diff:
---
gcc/common/config/riscv/riscv-common.cc | 85 ++--
gcc/config/riscv/riscv-subset.h | 2 +
gcc/doc/invoke.texi | 17 ---
gcc/testsuite/gcc.target/riscv/arch-49.c | 5 ++
gcc/testsuite/gcc.target/riscv/arch-50.c | 12 +
gcc/testsuite/gcc.target/riscv/arch-51.c | 12 +
gcc/testsuite/gcc.target/riscv/arch-52.c | 6 +++
7 files changed, 130 insertions(+), 9 deletions(-)
diff --git a/gcc/common/config/riscv/riscv-common.cc
b/gcc/common/config/riscv/riscv-common.cc
index ca14eb96b253..0fa2e21f272d 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -274,6 +274,12 @@ struct riscv_ext_version
int minor_version;
};
+struct riscv_profiles
+{
+ const char *profile_name;
+ const char *profile_string;
+};
+
/* All standard extensions defined in all supported ISA spec. */
static const struct riscv_ext_version riscv_ext_version_table[] =
{
@@ -502,6 +508,31 @@ static const struct riscv_ext_version riscv_combine_info[]
=
{NULL, ISA_SPEC_CLASS_NONE, 0, 0}
};
+/* This table records the mapping form RISC-V Profiles into march string. */
+static const riscv_profiles riscv_profiles_table[] =
+{
+ /* RVI20U only contains the base extension 'i' as mandatory extension. */
+ {"rvi20u64", "rv64i"},
+ {"rvi20u32", "rv32i"},
+
+ /* RVA20U contains the 'i,m,a,f,d,c,zicsr,zicntr,ziccif,ziccrse,ziccamoa,
+ zicclsm,za128rs' as mandatory extensions. */
+ {"rva20u64", "rv64imafdc_zicsr_zicntr_ziccif_ziccrse_ziccamoa"
+ "_zicclsm_za128rs"},
+
+ /* RVA22U contains the 'i,m,a,f,d,c,zicsr,zihintpause,zba,zbb,zbs,zicntr,
+ zihpm,ziccif,ziccrse,ziccamoa, zicclsm,zic64b,za64rs,zicbom,zicbop,zicboz,
+ zfhmin,zkt' as mandatory extensions. */
+ {"rva22u64", "rv64imafdc_zicsr_zicntr_ziccif_ziccrse_ziccamoa"
+ "_zicclsm_zic64b_za64rs_zihintpause_zba_zbb_zbs_zicbom_zicbop"
+ "_zicboz_zfhmin_zkt"},
+
+ /* Currently we do not define S/M mode Profiles in gcc part. */
+
+ /* Terminate the list. */
+ {NULL, NULL}
+};
+
static const riscv_cpu_info riscv_cpu_tables[] =
{
#define RISCV_CORE(CORE_NAME, ARCH, TUNE) \
@@ -1109,6 +1140,52 @@ riscv_subset_list::parsing_subset_version (const char
*ext,
return p;
}
+/* Parsing RISC-V Profiles in -march string.
+ Return string with mandatory extensions of Profiles. */
+std::string
+riscv_subset_list::parse_profiles (const char *arch)
+{
+ /* Checking if input string contains a Profiles.
+There are two cases use Profiles in -march option:
+
+1. Only use Profiles in '-march' as input
+2. Mixed Profiles with other extensions
+
+Use '_' to split Profiles and other extension. */
+std::string p(arch);
+const size_t p_len = p.size();
+
+for (int i = 0; riscv_profiles_table[i].profile_name != nullptr; ++i)
+{
+ const std::string& p_name = riscv_profiles_table[i].profile_name;
+ const std::string& p_str = riscv_profiles_table[i].profile_string;
+ size_t pos = p.find(p_name);
+ /* Find profile at the begin. */
+ if (pos == 0 && pos + p_name.size() <= p_len)
+ {
+ size_t after_pos = pos + p_name.size();
+ std::string after_part = p.substr(after_pos);
+
+ /* If there're only profile, return the profile_string directly. */
+ if (after_part[0] == '\0')
+ return p_str;
+
+ /* If isn't '_' after profile, need to add it and mention the user.
*/
+ if (after_part[0] != '_')
+ {
+ warning_at (m_loc, 0, "Should use \"%c
[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RISC-V Profiles 20/22.
https://gcc.gnu.org/g:f2e5a82efff8ac659ccae46d927e6513c8e31307
commit f2e5a82efff8ac659ccae46d927e6513c8e31307
Author: Jiawei
Date: Sat May 10 20:25:52 2025 +0800
RISC-V: Support RISC-V Profiles 20/22.
This patch introduces support for RISC-V Profiles RV20 and RV22 [1],
enabling developers to utilize these profiles through the -march option.
[1] https://github.com/riscv/riscv-profiles/releases/tag/v1.0
Version log:
Using lowercase letters to present Profiles.
Using '_' as divsor between Profiles and other RISC-V extension.
Add descriptions in invoke.texi.
Checking if there exist '_' between Profiles and additional extensions.
Using std::string to avoid memory problems.
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc (struct riscv_profiles): New
struct.
(riscv_subset_list::parse_profiles): New parser.
(riscv_subset_list::parse_base_ext): Ditto.
* config/riscv/riscv-subset.h: New def.
* doc/invoke.texi: New option descriptions.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/arch-49.c: New test.
* gcc.target/riscv/arch-50.c: New test.
* gcc.target/riscv/arch-51.c: New test.
* gcc.target/riscv/arch-52.c: New test.
(cherry picked from commit 43b450e3f72a53c744e77f55393962f1d349373a)
Diff:
---
gcc/common/config/riscv/riscv-common.cc | 85 ++--
gcc/config/riscv/riscv-subset.h | 2 +
gcc/doc/invoke.texi | 17 ---
gcc/testsuite/gcc.target/riscv/arch-49.c | 5 ++
gcc/testsuite/gcc.target/riscv/arch-50.c | 12 +
gcc/testsuite/gcc.target/riscv/arch-51.c | 12 +
gcc/testsuite/gcc.target/riscv/arch-52.c | 6 +++
7 files changed, 130 insertions(+), 9 deletions(-)
diff --git a/gcc/common/config/riscv/riscv-common.cc
b/gcc/common/config/riscv/riscv-common.cc
index ca14eb96b253..0fa2e21f272d 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -274,6 +274,12 @@ struct riscv_ext_version
int minor_version;
};
+struct riscv_profiles
+{
+ const char *profile_name;
+ const char *profile_string;
+};
+
/* All standard extensions defined in all supported ISA spec. */
static const struct riscv_ext_version riscv_ext_version_table[] =
{
@@ -502,6 +508,31 @@ static const struct riscv_ext_version riscv_combine_info[]
=
{NULL, ISA_SPEC_CLASS_NONE, 0, 0}
};
+/* This table records the mapping form RISC-V Profiles into march string. */
+static const riscv_profiles riscv_profiles_table[] =
+{
+ /* RVI20U only contains the base extension 'i' as mandatory extension. */
+ {"rvi20u64", "rv64i"},
+ {"rvi20u32", "rv32i"},
+
+ /* RVA20U contains the 'i,m,a,f,d,c,zicsr,zicntr,ziccif,ziccrse,ziccamoa,
+ zicclsm,za128rs' as mandatory extensions. */
+ {"rva20u64", "rv64imafdc_zicsr_zicntr_ziccif_ziccrse_ziccamoa"
+ "_zicclsm_za128rs"},
+
+ /* RVA22U contains the 'i,m,a,f,d,c,zicsr,zihintpause,zba,zbb,zbs,zicntr,
+ zihpm,ziccif,ziccrse,ziccamoa, zicclsm,zic64b,za64rs,zicbom,zicbop,zicboz,
+ zfhmin,zkt' as mandatory extensions. */
+ {"rva22u64", "rv64imafdc_zicsr_zicntr_ziccif_ziccrse_ziccamoa"
+ "_zicclsm_zic64b_za64rs_zihintpause_zba_zbb_zbs_zicbom_zicbop"
+ "_zicboz_zfhmin_zkt"},
+
+ /* Currently we do not define S/M mode Profiles in gcc part. */
+
+ /* Terminate the list. */
+ {NULL, NULL}
+};
+
static const riscv_cpu_info riscv_cpu_tables[] =
{
#define RISCV_CORE(CORE_NAME, ARCH, TUNE) \
@@ -1109,6 +1140,52 @@ riscv_subset_list::parsing_subset_version (const char
*ext,
return p;
}
+/* Parsing RISC-V Profiles in -march string.
+ Return string with mandatory extensions of Profiles. */
+std::string
+riscv_subset_list::parse_profiles (const char *arch)
+{
+ /* Checking if input string contains a Profiles.
+There are two cases use Profiles in -march option:
+
+1. Only use Profiles in '-march' as input
+2. Mixed Profiles with other extensions
+
+Use '_' to split Profiles and other extension. */
+std::string p(arch);
+const size_t p_len = p.size();
+
+for (int i = 0; riscv_profiles_table[i].profile_name != nullptr; ++i)
+{
+ const std::string& p_name = riscv_profiles_table[i].profile_name;
+ const std::string& p_str = riscv_profiles_table[i].profile_string;
+ size_t pos = p.find(p_name);
+ /* Find profile at the begin. */
+ if (pos == 0 && pos + p_name.size() <= p_len)
+ {
+ size_t after_pos = pos + p_name.size();
+ std::string after_part = p.substr(after_pos);
+
+ /* If there're only profile, return the profile_string directly. */
+ if (after_part[0] == '\0')
+ return p_str;
+
+ /* If isn't '_' after profile, need to add it and mention the user.
*/
+ if (after_part[0] != '_')
+ {
+ warning_at (m_loc, 0, "Should use \"%c
[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RISC-V Profiles 20/22.
https://gcc.gnu.org/g:762080cf2d23ebf98482d17be4efe2271a5957ae
commit 762080cf2d23ebf98482d17be4efe2271a5957ae
Author: Jiawei
Date: Sat May 10 20:25:52 2025 +0800
RISC-V: Support RISC-V Profiles 20/22.
This patch introduces support for RISC-V Profiles RV20 and RV22 [1],
enabling developers to utilize these profiles through the -march option.
[1] https://github.com/riscv/riscv-profiles/releases/tag/v1.0
Version log:
Using lowercase letters to present Profiles.
Using '_' as divsor between Profiles and other RISC-V extension.
Add descriptions in invoke.texi.
Checking if there exist '_' between Profiles and additional extensions.
Using std::string to avoid memory problems.
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc (struct riscv_profiles): New
struct.
(riscv_subset_list::parse_profiles): New parser.
(riscv_subset_list::parse_base_ext): Ditto.
* config/riscv/riscv-subset.h: New def.
* doc/invoke.texi: New option descriptions.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/arch-49.c: New test.
* gcc.target/riscv/arch-50.c: New test.
* gcc.target/riscv/arch-51.c: New test.
* gcc.target/riscv/arch-52.c: New test.
(cherry picked from commit 43b450e3f72a53c744e77f55393962f1d349373a)
Diff:
---
gcc/common/config/riscv/riscv-common.cc | 85 ++--
gcc/config/riscv/riscv-subset.h | 2 +
gcc/doc/invoke.texi | 17 ---
gcc/testsuite/gcc.target/riscv/arch-49.c | 5 ++
gcc/testsuite/gcc.target/riscv/arch-50.c | 12 +
gcc/testsuite/gcc.target/riscv/arch-51.c | 12 +
gcc/testsuite/gcc.target/riscv/arch-52.c | 6 +++
7 files changed, 130 insertions(+), 9 deletions(-)
diff --git a/gcc/common/config/riscv/riscv-common.cc
b/gcc/common/config/riscv/riscv-common.cc
index ca14eb96b253..0fa2e21f272d 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -274,6 +274,12 @@ struct riscv_ext_version
int minor_version;
};
+struct riscv_profiles
+{
+ const char *profile_name;
+ const char *profile_string;
+};
+
/* All standard extensions defined in all supported ISA spec. */
static const struct riscv_ext_version riscv_ext_version_table[] =
{
@@ -502,6 +508,31 @@ static const struct riscv_ext_version riscv_combine_info[]
=
{NULL, ISA_SPEC_CLASS_NONE, 0, 0}
};
+/* This table records the mapping form RISC-V Profiles into march string. */
+static const riscv_profiles riscv_profiles_table[] =
+{
+ /* RVI20U only contains the base extension 'i' as mandatory extension. */
+ {"rvi20u64", "rv64i"},
+ {"rvi20u32", "rv32i"},
+
+ /* RVA20U contains the 'i,m,a,f,d,c,zicsr,zicntr,ziccif,ziccrse,ziccamoa,
+ zicclsm,za128rs' as mandatory extensions. */
+ {"rva20u64", "rv64imafdc_zicsr_zicntr_ziccif_ziccrse_ziccamoa"
+ "_zicclsm_za128rs"},
+
+ /* RVA22U contains the 'i,m,a,f,d,c,zicsr,zihintpause,zba,zbb,zbs,zicntr,
+ zihpm,ziccif,ziccrse,ziccamoa, zicclsm,zic64b,za64rs,zicbom,zicbop,zicboz,
+ zfhmin,zkt' as mandatory extensions. */
+ {"rva22u64", "rv64imafdc_zicsr_zicntr_ziccif_ziccrse_ziccamoa"
+ "_zicclsm_zic64b_za64rs_zihintpause_zba_zbb_zbs_zicbom_zicbop"
+ "_zicboz_zfhmin_zkt"},
+
+ /* Currently we do not define S/M mode Profiles in gcc part. */
+
+ /* Terminate the list. */
+ {NULL, NULL}
+};
+
static const riscv_cpu_info riscv_cpu_tables[] =
{
#define RISCV_CORE(CORE_NAME, ARCH, TUNE) \
@@ -1109,6 +1140,52 @@ riscv_subset_list::parsing_subset_version (const char
*ext,
return p;
}
+/* Parsing RISC-V Profiles in -march string.
+ Return string with mandatory extensions of Profiles. */
+std::string
+riscv_subset_list::parse_profiles (const char *arch)
+{
+ /* Checking if input string contains a Profiles.
+There are two cases use Profiles in -march option:
+
+1. Only use Profiles in '-march' as input
+2. Mixed Profiles with other extensions
+
+Use '_' to split Profiles and other extension. */
+std::string p(arch);
+const size_t p_len = p.size();
+
+for (int i = 0; riscv_profiles_table[i].profile_name != nullptr; ++i)
+{
+ const std::string& p_name = riscv_profiles_table[i].profile_name;
+ const std::string& p_str = riscv_profiles_table[i].profile_string;
+ size_t pos = p.find(p_name);
+ /* Find profile at the begin. */
+ if (pos == 0 && pos + p_name.size() <= p_len)
+ {
+ size_t after_pos = pos + p_name.size();
+ std::string after_part = p.substr(after_pos);
+
+ /* If there're only profile, return the profile_string directly. */
+ if (after_part[0] == '\0')
+ return p_str;
+
+ /* If isn't '_' after profile, need to add it and mention the user.
*/
+ if (after_part[0] != '_')
+ {
+ warning_at (m_loc, 0, "Should use \"%c
[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Support RISC-V Profiles 20/22.
https://gcc.gnu.org/g:7f87d18ebf76b77d9808275a2f16e89ed8df4897
commit 7f87d18ebf76b77d9808275a2f16e89ed8df4897
Author: Jiawei
Date: Sat May 10 20:25:52 2025 +0800
RISC-V: Support RISC-V Profiles 20/22.
This patch introduces support for RISC-V Profiles RV20 and RV22 [1],
enabling developers to utilize these profiles through the -march option.
[1] https://github.com/riscv/riscv-profiles/releases/tag/v1.0
Version log:
Using lowercase letters to present Profiles.
Using '_' as divsor between Profiles and other RISC-V extension.
Add descriptions in invoke.texi.
Checking if there exist '_' between Profiles and additional extensions.
Using std::string to avoid memory problems.
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc (struct riscv_profiles): New
struct.
(riscv_subset_list::parse_profiles): New parser.
(riscv_subset_list::parse_base_ext): Ditto.
* config/riscv/riscv-subset.h: New def.
* doc/invoke.texi: New option descriptions.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/arch-49.c: New test.
* gcc.target/riscv/arch-50.c: New test.
* gcc.target/riscv/arch-51.c: New test.
* gcc.target/riscv/arch-52.c: New test.
(cherry picked from commit 43b450e3f72a53c744e77f55393962f1d349373a)
Diff:
---
gcc/common/config/riscv/riscv-common.cc | 85 ++--
gcc/config/riscv/riscv-subset.h | 2 +
gcc/doc/invoke.texi | 17 ---
gcc/testsuite/gcc.target/riscv/arch-49.c | 5 ++
gcc/testsuite/gcc.target/riscv/arch-50.c | 12 +
gcc/testsuite/gcc.target/riscv/arch-51.c | 12 +
gcc/testsuite/gcc.target/riscv/arch-52.c | 6 +++
7 files changed, 130 insertions(+), 9 deletions(-)
diff --git a/gcc/common/config/riscv/riscv-common.cc
b/gcc/common/config/riscv/riscv-common.cc
index ca14eb96b253..0fa2e21f272d 100644
--- a/gcc/common/config/riscv/riscv-common.cc
+++ b/gcc/common/config/riscv/riscv-common.cc
@@ -274,6 +274,12 @@ struct riscv_ext_version
int minor_version;
};
+struct riscv_profiles
+{
+ const char *profile_name;
+ const char *profile_string;
+};
+
/* All standard extensions defined in all supported ISA spec. */
static const struct riscv_ext_version riscv_ext_version_table[] =
{
@@ -502,6 +508,31 @@ static const struct riscv_ext_version riscv_combine_info[]
=
{NULL, ISA_SPEC_CLASS_NONE, 0, 0}
};
+/* This table records the mapping form RISC-V Profiles into march string. */
+static const riscv_profiles riscv_profiles_table[] =
+{
+ /* RVI20U only contains the base extension 'i' as mandatory extension. */
+ {"rvi20u64", "rv64i"},
+ {"rvi20u32", "rv32i"},
+
+ /* RVA20U contains the 'i,m,a,f,d,c,zicsr,zicntr,ziccif,ziccrse,ziccamoa,
+ zicclsm,za128rs' as mandatory extensions. */
+ {"rva20u64", "rv64imafdc_zicsr_zicntr_ziccif_ziccrse_ziccamoa"
+ "_zicclsm_za128rs"},
+
+ /* RVA22U contains the 'i,m,a,f,d,c,zicsr,zihintpause,zba,zbb,zbs,zicntr,
+ zihpm,ziccif,ziccrse,ziccamoa, zicclsm,zic64b,za64rs,zicbom,zicbop,zicboz,
+ zfhmin,zkt' as mandatory extensions. */
+ {"rva22u64", "rv64imafdc_zicsr_zicntr_ziccif_ziccrse_ziccamoa"
+ "_zicclsm_zic64b_za64rs_zihintpause_zba_zbb_zbs_zicbom_zicbop"
+ "_zicboz_zfhmin_zkt"},
+
+ /* Currently we do not define S/M mode Profiles in gcc part. */
+
+ /* Terminate the list. */
+ {NULL, NULL}
+};
+
static const riscv_cpu_info riscv_cpu_tables[] =
{
#define RISCV_CORE(CORE_NAME, ARCH, TUNE) \
@@ -1109,6 +1140,52 @@ riscv_subset_list::parsing_subset_version (const char
*ext,
return p;
}
+/* Parsing RISC-V Profiles in -march string.
+ Return string with mandatory extensions of Profiles. */
+std::string
+riscv_subset_list::parse_profiles (const char *arch)
+{
+ /* Checking if input string contains a Profiles.
+There are two cases use Profiles in -march option:
+
+1. Only use Profiles in '-march' as input
+2. Mixed Profiles with other extensions
+
+Use '_' to split Profiles and other extension. */
+std::string p(arch);
+const size_t p_len = p.size();
+
+for (int i = 0; riscv_profiles_table[i].profile_name != nullptr; ++i)
+{
+ const std::string& p_name = riscv_profiles_table[i].profile_name;
+ const std::string& p_str = riscv_profiles_table[i].profile_string;
+ size_t pos = p.find(p_name);
+ /* Find profile at the begin. */
+ if (pos == 0 && pos + p_name.size() <= p_len)
+ {
+ size_t after_pos = pos + p_name.size();
+ std::string after_part = p.substr(after_pos);
+
+ /* If there're only profile, return the profile_string directly. */
+ if (after_part[0] == '\0')
+ return p_str;
+
+ /* If isn't '_' after profile, need to add it and mention the user.
*/
+ if (after_part[0] != '_')
+ {
+ warning_at (m_loc, 0, "Should use \"%c
