[EMAIL PROTECTED] wrote:
Here's a picture of what I'm trying to accomplish :
http://www.geocities.com/fazool1_2000/geda/sample.pdf
Switching frequency is around 500KHz - edges may be fast, but I'm not
yet sure how fast. I've been simulating with 1ns rise/fall time, but
that number isn't based
>>http://ronja.twibright.com/video/gschem.avi
I noticed, that Karel used the device attribute for the specific model
of the transistor. Is this the recommended practice? In my schematics this
I always attached this kind of specific information to the value attribute.
The device attribute would be
Hi,
On Sun, 2006-09-24 at 22:52 -0400, Ales Hvezda wrote:
> Hi,
>
> >The schematics printed with gschem used to have a very elegant and polished
> >style. Now, after having upgraded to the latest and greatest version, I
> >notice
> >that graphic lines (including component symbols) are much ligh
Greetings, gEDA-users --
Regarding the upcoming Free Dog meeting this Wednesday (Dec 6th):
Can those not in Cambridge, MA, USA participate via IRC?
Ales and I did some recon at the Cambridge Starbucks this morning.
Unfortunately, they only have evil corporate pay-through-the-nose
wireless net
Hi --
Yes, getting a new CD published is on my "to do" list. Perhaps I'll
get around to it in time for next Wednesday's Free Dog meeting?
Maybe. I won't promise.
... but I do plan on getting to it soon!
Stuart
On Sun, 3 Dec 2006, David Briscoe wrote:
Hi,
This is my first post to this
[EMAIL PROTECTED] wrote:
volts. Maybe in my design, since the drive voltage is over the max, I
can simply use resistor dividers to get the gate voltage to a reasonable
level. It may change the turn on time though.
It's not turn-on time you have to worry about it's the relationship of
when t
[EMAIL PROTECTED] wrote:
Dan, are you saying that the Cgd will allow the fast transient input to
couple to the output?
Clamps may be able to reduce some of the slewing of your 50V signal that
you'd end up with if you just used a divider. Maybe clamp each vgs to
the opposite rail ... your fet
On Sat, 2006-12-02 at 09:36 -0600, John Griessen wrote:
>
> Bill Cox wrote:
> > Hi, John.
> >
> > Here's a nearly complete first cut.
>
>
>
> Hello Bill,
>
> Here's what I've noticed so far:
>
> John Griessen
Thanks, John!
I've made your suggested changes, and checked them in. You can get
Here's a picture of what I'm trying to accomplish :
http://www.geocities.com/fazool1_2000/geda/sample.pdf
Switching frequency is around 500KHz - edges may be fast, but I'm not yet sure
how fast. I've been simulating with 1ns rise/fall time, but that number isn't
based on any hard data.
In simu
you might like to try
apt-get install geda-gschem
and other packages you want (If you use aptitude, you can see them all
geda-...)
I'm not sure about Kubuntu, but they are there in Ubuntu.
Peter Clifton
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Hi,
This is my first post to this list, even though I've been a subscriber
for around 2 years.
I have just installed Kubuntu Linux and downloaded the latest gEDA CD
from Stuart Brorson's site.
Before I attempt to install the gEDA CD, is there going to be a newer
version released in the near future?
> Is there a command in PCB that I can issue that gets back the old
> masked vias so the tin is available on the fabricated boards?
View solder mask, then 'k'.
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In older versions of PCB the vias were masked so that the via's tin was
exposed on the boards. In the latest version of PCB my vias are not masked
and thus when the boards are fabricated the vias are insulated with the
green film. Is there a command in PCB that I can issue that gets back the
Most mosfets are driven with typically 10-12V for the gate drive. I have
never seen a mosfet with a 50V gate drive requirement.
If high side drive is a concern here you may want to look at bootstrap
devices that are available to drive the high side mosfet. It's unclear to
me exactly what you
gene glick wrote:
I want to build a mosfet inverter that also translates voltages. Pretty
much standard mosfet inverter, nmos is lower transistor, pmos is upper
transistor. The upper pmosfet Vsource is +5VDC, and mosfet Vsource is
-5VDC. But, the gate voltage is +/- 50VDC.
Although the gate
On 12/3/06, gene glick <[EMAIL PROTECTED]> wrote:
I want to build a mosfet inverter that also translates voltages. Pretty
much standard mosfet inverter, nmos is lower transistor, pmos is upper
transistor. The upper pmosfet Vsource is +5VDC, and mosfet Vsource is
-5VDC. But, the gate voltage is
http://engr.smu.edu/~mitch/ftp_dir/pubs/cnf.ps
Do you know others?
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I thought about this a little more. The Vgs specs in the data sheet must be
the maximum allowed before blowing up the gate insulation. A lot of the ones I
looked at had Vgs around +/- 20, or sometimes +/-40 volts. Maybe in my design,
since the drive voltage is over the max, I can simply use r
I want to build a mosfet inverter that also translates voltages. Pretty
much standard mosfet inverter, nmos is lower transistor, pmos is upper
transistor. The upper pmosfet Vsource is +5VDC, and mosfet Vsource is
-5VDC. But, the gate voltage is +/- 50VDC.
Although the gate voltage exceeds th
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