From: Peter Clifton <[EMAIL PROTECTED]>
Subject: gEDA-user: OT: Opencores CORDIC - bugs?
Date: Sat, 10 Mar 2007 04:14:19 +
Message-ID: <[EMAIL PROTECTED]>
> Hi,
Peter,
> I was just curios if anyone on list has used the open-cores cordic VHDL.
Haven't played with that. Haven't had the need s
On Fri, Mar 09, 2007 at 08:51:37PM -0800, Ben Jackson wrote:
> On Sat, Mar 10, 2007 at 04:14:19AM +, Peter Clifton wrote:
>
> > Perhaps the best way is for me to keep the cordic operating in the
> > 0<->45 degree angle range, rather than the -45<->45 I've been using so
> > far.
>
> I thought
On Sat, Mar 10, 2007 at 04:14:19AM +, Peter Clifton wrote:
> Does anyone per chance know an efficient hardware algorithm which can
> produce the same /2 results for +ve and -ve twos complement numbers?
>
> Depending on which stage in the cordic pipeline, the shift may be up to
> one less than
On Sat, Mar 10, 2007 at 04:14:19AM +, Peter Clifton wrote:
>
> In twos complement - for the specific implementation used at least -
> which sign extends with the original MSB:
>
> -2 >> 1 == -1
> -1 >> 1 == -1
> (etc..)
>
> Clearly this is different from the behaviour
Hi,
I was just curios if anyone on list has used the open-cores cordic VHDL.
I'm using it to generate a reference waveform for a PWM generator, and
have been bashing my head against the wall with little oddities and
glitches like different results for +ve and -ve angles (which should
read the same
I've fixed the problem in rats.c; Just grab the latest
cvs.
h.
--- Seb James <[EMAIL PROTECTED]> wrote:
> In that case I have the changes you made, and I am
> still seeing the rats
> nest problem.
No need
Dan started a set of webpages about the gEDA Project's participation
in Google's Summer of Code. I finished them off and have posted them
on the main gEDA site. If you are interested in participating in the
Summer of Code, and want to work on a gEDA Project, please browse over
to:
http://geda.s
On Mar 6, 2007, at 12:04 AM, Jeff VR wrote:
I'm very interested to see how your evaluation turns out. I
watched some of the demos of TinyERP and it looks like it will meet
my needs. I'm not sure I need as much material management as your
looking for. I'm mainly looking for something to t
DJ Delorie wrote:
I think one good way to approach this would be to pitch the *file
format*, not the software...at first. The industry has proven that
it will standardize on file formats (witness Gerber RS-274X) if they
work well. Granted the Gerber format (as far as I know) really
be
On Mar 9, 2007, at 3:19 PM, David Kerber wrote:
Actually, I've often thought that we should advertise gEDA
to the big
chip guys as a method to distribute reference designs --
schematics,
layouts, and Gerbers.
I think one good way to approach this would be to pitch
the *file format*, not
On Fri, 2007-03-09 at 12:42 -0500, DJ Delorie wrote:
> > In that case I have the changes you made, and I am still seeing the rats
> > nest problem.
>
> Your clip.h looks like this?
>
> /* ---
> * prototypes
> */
>
> /* Cli
> > Actually, I've often thought that we should advertise gEDA
> to the big
> > chip guys as a method to distribute reference designs --
> schematics,
> > layouts, and Gerbers.
>
>I think one good way to approach this would be to pitch
> the *file format*, not the software...at fi
Stuart Brorson <[EMAIL PROTECTED]> wrote:
> Actually, I've often thought that we should advertise gEDA to the big
> chip guys as a method to distribute reference designs -- schematics,
> layouts, and Gerbers.
Yeah, right... When you find a chip vendor like that, please let me
know.
Anyone care
>I think one good way to approach this would be to pitch the *file
> format*, not the software...at first. The industry has proven that
> it will standardize on file formats (witness Gerber RS-274X) if they
> work well. Granted the Gerber format (as far as I know) really
> became wel
On Mar 9, 2007, at 7:33 AM, Stuart Brorson wrote:
Since it's quite common to get reference designs that include
gerbers, I
was wondering if it would be feasible to to convert these back into,
effectively, a pcb footprint.
Actually, I've often thought that we should advertise gEDA to the big
c
> In that case I have the changes you made, and I am still seeing the rats
> nest problem.
Your clip.h looks like this?
/* ---
* prototypes
*/
/* Clip X,Y to the given bounding box, plus a margin. Returns TRUE if
ther
On Fri, 2007-03-09 at 11:22 -0500, DJ Delorie wrote:
> > I forgot to ask. Why are the meetings called "freedog" meetings?
>
> Free EDA Users Group.
>
> Technically, it's freeedaug.
>
> http://www.freeedaug.org/
>
Thanks, all, for the explanations.
__
On Fri, 2007-03-09 at 11:20 -0500, DJ Delorie wrote:
> > I don't seem to be able to get this latest code from anonymous cvs - but
> > then you can only have checked it in about 6 hours ago. There used to be
> > a lag between what was available to anonymous cvs users and dev cvs
> > users on sourcef
Stuart Brorson wrote:
> * Any open-source organization can have several proposed projects for
> a Google-supported student to work on. The list of projects is being
> formulated and will be posted on the gEDA website soon. Once that's
> done, students are invited to apply to work on one or anoth
2. Under the pcblib-newlib directory, there are two locations for the
1206.fp footprint; 1) geda and 2) generic. Is this a problem and how
does PCB handle this?
PCB doesn't. When you load from the library, you specify exactly
which one you want. Once it's loaded, there'
What I do is I place all of the footprints I have reviewed in a single
directory and I only use footprints from that directory.
I have a shell script called sch2pcb which contains the lines ---
#!/bin/bash
gsch2pcb --use-files --elements-dir /local/lan/pcb/packages $@
Only footprints from the
> 1. In the schematic should I use "footprint=1206.fp" or
> "footprint=1206" ? Does the ".fp" extension designate the newer footprints?
.fp is a convention I added when I set up gedasymbols.org, as the web
server needed some standard suffix in order to add a handler for them.
So far, nothing t
> I forgot to ask. Why are the meetings called "freedog" meetings?
Free EDA Users Group.
Technically, it's freeedaug.
http://www.freeedaug.org/
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> So a possible workaround would be to get myself a 64 bit computer?
The problem is caused by the X protocol using 16 bits to hold
coordinate values.
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> I don't seem to be able to get this latest code from anonymous cvs - but
> then you can only have checked it in about 6 hours ago. There used to be
> a lag between what was available to anonymous cvs users and dev cvs
> users on sourceforge, don't know that's still true.
Likely still true.
> W
> The thumbnails are too small to see anything, and the large version
> take long time to load. Could you add a size in-between for us who
> just want to see what is going on and not measure the width of the
> PCB-tracks :-)
I recompressed them with the Gimp, they're about 1/3 the file size
for t
> The furnace controller board looks nice. Appears that the rj45 is in
> the wrong spot ??
The ethernet board is stacked on top of the gumstix, which is stacked
on top of the furnace board. The prototype (which is what you see)
has the RJ45 still on the ethernet board. The one that ends up in
Like that one John!
Just copied it into my workflow.
Thanks,
John G
John Luciani wrote:
I have a shell script called sch2pcb which contains the lines ---
#!/bin/bash
gsch2pcb --use-files --elements-dir /local/lan/pcb/packages $@
Only footprints from the directory /local/lan/pcb/packages ar
In the past we have discussed creating a utility
which would read a Gerber file and output either a .pcb or a .fp file
corresponding to the contents of the Gerber.
I know gerber is vector format, so this is possible, but how close are we to
being able to do this? Are there any first attempts at
Since gEDA is completely free (both cost-free and open source), it's a
good, neutral vehicle for chip vendors to distribute reference
designs.
In the past we have discussed creating a utility
which would read a Gerber file and output either a .pcb or a .fp file
corresponding to the contents
"daug" is more properly pronounced "dawg",
which is an American hillbilly way of pronouncing the word. But since
we're Yankees (i.e. Bostonians), we say "dog". :-)
Stuart
Those New Yorkers might say it like free-dug -- three syllables.
John Griessen
Austin TX where we might say it free
Greetings gEDA users --
I thought I'd post some information about what we're planning on doing
for Google's Summer of Code. Over the last 24 hours we have
gotten our act together to participate in the SoC.
First off, the Summer of Code works this way:
* Any open-source organization can have
On 3/9/07, Peter Baxendale <[EMAIL PROTECTED]> wrote:
> That board is the Zigbee radio board for my MSP430F169 board. The DB-9 is
> an RS-232 port (the uC board has a USB port). The T-shaped trace is a
> folded dipole
> that should match the Chipcon 2500 reference design. I do not see a TO220 ;-)
On 3/9/07, Ryan Seal <[EMAIL PROTECTED]> wrote:
I have noticed there are more than a few duplicated footprints sprinkled
throughout the footprint libraries ? I can go in and make custom
footprints for everything but that kind of defeats the purpose. Is there
a particular directory that I should
I am trying to use a "1206" smd footprint in my schematic and have the
following questions:
1. In the schematic should I use "footprint=1206.fp" or
"footprint=1206" ? Does the ".fp" extension designate the newer footprints?
2. Under the pcblib-newlib directory, there are two locations for t
This is a common problem. IIRC, you need to configure the CVS version
of PCB with the --enable-maintainer-mode flag set.
Stuart
On Fri, 9 Mar 2007, Seb James wrote:
The CVS version of pcb didn't compile for me after a cvs checkout.
After checkout I did an "autoreconf -is"
configured fine,
The CVS version of pcb didn't compile for me after a cvs checkout.
After checkout I did an "autoreconf -is"
configured fine, but make failed.
The problem was in the doc/ directory - the *.gif and *.eps and *.png
files were missing. Not a big deal; I put the files there from the
distributed versi
Hello all,
Here's a summary of the problems I'm having, with some links to
examples.
One. Crashing bug related to rats nests in lesstif version of pcb
-
The pcb file:
http://www.esfnet.co.uk/geda/pedio.pcb
for which you'll need the
> Since gEDA is completely free (both cost-free and open source), it's a
> good, neutral vehicle for chip vendors to distribute reference
> designs. Any engineer who wants to use the reference design can grab
> the tools off teh web, open the reference design file,
> and make immediate use of the
> A different point: In the past we have discussed creating a utility
> which would read a Gerber file and output either a .pcb or a .fp file
> corresponding to the contents of the Gerber. Maybe the utility could
> be instructed to know which file is associated with which PCB layer?
> In any even
Since it's quite common to get reference designs that include gerbers, I
was wondering if it would be feasible to to convert these back into,
effectively, a pcb footprint.
Actually, I've often thought that we should advertise gEDA to the big
chip guys as a method to distribute reference designs
Since it's quite common to get reference designs that include gerbers, I
was wondering if it would be feasible to to convert these back into,
effectively, a pcb footprint. I'd have thought there was enough
information in the gerber and drill files to do this - but I admit I
haven't thought it thro
Just a couple of photos from tonight's meeting...
http://www.delorie.com/photos/20070308-freedog/
I forgot to ask. Why are the meetings called "freedog" meetings?
It's the Free EDA User's Group => FreeEDAUG => Free Dog.
Acutally, this spelling of "daug" is more properly pronounced "dawg",
w
> That board is the Zigbee radio board for my MSP430F169 board. The DB-9 is
> an RS-232 port (the uC board has a USB port). The T-shaped trace is a
> folded dipole
> that should match the Chipcon 2500 reference design. I do not see a TO220 ;-)
I'd be interested to know how you copied the reference
On Thu, 2007-03-08 at 23:17 -0500, DJ Delorie wrote:
> Just a couple of photos from tonight's meeting...
>
> http://www.delorie.com/photos/20070308-freedog/
>
I forgot to ask. Why are the meetings called "freedog" meetings?
___
geda-user mailing lis
On Fri, 2007-03-09 at 00:59 -0500, DJ Delorie wrote:
> > With the advent of hid that was removed and now zooming in runs the
> > risk of overflow with its unlimited zoom capability.
>
> > Third is it's time to put proper clipping into the hid
> > drawing routines.
>
> I've re-added basic line cli
On Thu, 2007-03-08 at 16:19 -0800, Harry Eaton wrote:
> I noticed the problem is occuring during an extremely
> high zoom in. pcb used to have code to clip the zoomed
> lines to the screen in order to prevent integer
> overflow. With the advent of hid that was removed and
> now zooming in runs the
On 3/9/07, [EMAIL PROTECTED] <[EMAIL PROTECTED]> wrote:
Also, there is this intriguing board with a db-9, to-220 and some
totally elegant T-shaped trace ... what is it? Cool!
That board is the Zigbee radio board for my MSP430F169 board. The DB-9 is
an RS-232 port (the uC board has a USB port)
On Fri, 2007-03-09 at 00:59 -0500, DJ Delorie wrote:
> > With the advent of hid that was removed and now zooming in runs the
> > risk of overflow with its unlimited zoom capability.
>
> > Third is it's time to put proper clipping into the hid
> > drawing routines.
>
> I've re-added basic line cli
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