if we open a PCB file that doesn't specify an annulus min width then
the annulus min width should be set to the min width of the copper
lines.
I like the idea of expanding the vendor files to provide for the DRC
and drill mappings, making it a file that has the parameters seems
like a goo
> I am not opposed to changing it to only apply the minimum annulus test
> on holes. I think the historic reason is pcb used to only have the min
> width parameter. But now that we've had the min annulus parameter for a
> while we should probably flip the switch. Any objections?
No objectio
Ben Jackson wrote:
> On Fri, Mar 14, 2008 at 08:04:41AM -0700, Traylor Roger wrote:
>> Guys,
>> In Settings -> Sizes
>> -I have min annulus ring set to 5mil.
>> -Minimum copper width is set to 8mil.
>>
>> My vias have a 10mil drill, 21mil outer
>> diameter. This should yield a 5.5
Ahmad Sayed wrote:
> Dear all,
>
> I have an idea of a project, but actually i'm software developer rather than
> hardware designer, so i need you to help me to figure out the usability of
> it, my idea in short focus on the circuit designed to work wih computer e.g.
> computer prephierals.
> I ne
On Fri, Mar 14, 2008 at 08:04:41AM -0700, Traylor Roger wrote:
> Guys,
> In Settings -> Sizes
> -I have min annulus ring set to 5mil.
> -Minimum copper width is set to 8mil.
>
> My vias have a 10mil drill, 21mil outer
> diameter. This should yield a 5.5mil
> annular radius on
On Fri, Mar 14, 2008 at 7:16 AM, John Griessen <[EMAIL PROTECTED]> wrote:
> I came across this in a trade magazine, Chip Design, and copy excerpts
> that suggest what the "best of breed" tools can do. The author sees the
> collection of abilities
> as most valuable, and it seems not to be a copyr
Guys,
In Settings -> Sizes
-I have min annulus ring set to 5mil.
-Minimum copper width is set to 8mil.
My vias have a 10mil drill, 21mil outer
diameter. This should yield a 5.5mil
annular radius on the vias.
When doing DRC, it complains with:
"Via annular ring is too smal
Ahmad Sayed wrote:
> Dear all,
>
> Hi John,
> Larry got my idea, he interprets it correctly.
I'm feeling dense today...a PC parallel port wire's fastest speed
is ~2.7MHz with no wait state mode, so you couldn't operate
at full speed talking to a SPI bus of a microcontroller...
Larry Doolittle wr
I came across this in a trade magazine, Chip Design, and copy excerpts
that suggest what the "best of breed" tools can do. The author sees the
collection of abilities
as most valuable, and it seems not to be a copyright conflict to use a similar
collection of features,
just common sense.
The pa
Dear all,
Hi John,
Larry got my idea, he interprets it correctly.
Hi Larry,
Thank you very much for your answer, actually before starting the prototype,
i have the idea of using drivers source code, but i think about the
following scenario, if the hardware designer want to simulate his hardware
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