Re: gEDA-user: GPLv3 question

2010-10-07 Thread DJ Delorie
> Most probably, yes, when somebody supplies the toolchain; > do you think one also could argue when nobody does? It wouldn't be a major component of the operating system then. For gcc, though, the FSF themselves supply many embedded toolchains... __

Re: gEDA-user: GPLv3 question

2010-10-07 Thread Ineiev
On 10/7/10, DJ Delorie wrote: > >> Cross-compiler is not a component of the operating system >> on which the executable runs. > > Nearly every embedded OS comes *with* a cross compiler. It just > doesn't happen to run *on* the embedded OS. > > One could argue that such a cross compiler is a compo

Re: gEDA-user: Working on a tiny schematics editor

2010-10-07 Thread Steve Morss
Go for it! I think your idea is really neat. I'm a hard core Ruby programmer and have had similar experiences - you can say a lot in a little bit of space, the code is very readable, and coding goes quickly. I can think of some other useful applications for a Ruby version of gschem. A smal

Re: gEDA-user: pcb crooked traces

2010-10-07 Thread gene glick
If the tracks select as a single piece, it is just a rendering artefact due to the line not being _exactly_ 45 degrees. The gerber plot might be better when viewed in "High quality" mode in gerbv. PCB, and the lower quality gerbv modes don't render anti-aliased lines, so this is likely the sour

Re: gEDA-user: pcb crooked traces

2010-10-07 Thread Peter Clifton
On Thu, 2010-10-07 at 07:09 -0400, gene glick wrote: > I hope the attachment comes through. If not, I'll post it somewhere. > > I cannot get rid of the jagged diagonal lines on my design. There's > lots of them. The picture shows a couple of examples. I've tried > different grid sizes, line

Re: gEDA-user: My Xorg uses large amounts of CPU when using PCB

2010-10-07 Thread Peter Clifton
On Thu, 2010-10-07 at 14:41 -0700, Cory Cross wrote: > > Laptop & Desktop both run Debian unstable with Linux 2.6.32 for 686, > Xorg 1.7.7 > Laptop uses intel driver for 945GM/GMS/GME, 943/940GML Express > Desktop uses open-source radeon driver for Radeon 9250 Are you using compositing? (e.g. co

Re: gEDA-user: My Xorg uses large amounts of CPU when using PCB

2010-10-07 Thread DJ Delorie
Do you have Xinerama enabled? ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user

Re: gEDA-user: pcb crooked traces

2010-10-07 Thread Andrew Poelstra
On Thu, Oct 07, 2010 at 05:37:48PM -0600, John Doty wrote: > > On Oct 7, 2010, at 5:00 PM, kai-martin knaak wrote: > > > (Are there any plans to make inside pcb metric?) > > A couple of years ago I suggested making the fundamental units > nanometers, since that would make decimal fractions of i

Re: gEDA-user: pcb crooked traces

2010-10-07 Thread Stefan Salewski
On Thu, 2010-10-07 at 17:37 -0600, John Doty wrote: > On Oct 7, 2010, at 5:00 PM, kai-martin knaak wrote: > > > (Are there any plans to make inside pcb metric?) > > A couple of years ago I suggested making the fundamental units nanometers, > since that would make decimal fractions of inches exa

Re: gEDA-user: pcb crooked traces

2010-10-07 Thread John Doty
On Oct 7, 2010, at 5:00 PM, kai-martin knaak wrote: > (Are there any plans to make inside pcb metric?) A couple of years ago I suggested making the fundamental units nanometers, since that would make decimal fractions of inches exactly representable as integers down to 0.01 mil. 0.01 mil = 25

Re: gEDA-user: pcb crooked traces

2010-10-07 Thread Stefan Salewski
On Thu, 2010-10-07 at 16:23 -0700, Andrew Poelstra wrote: > On Fri, Oct 08, 2010 at 01:00:50AM +0200, kai-martin knaak wrote: > > > > I prefer 1 mm, sometimes 0.5 mm :-) > > (Are there any plans to make inside pcb metric?) > > > > I would vote for this. > > (But no, not that I've heard.) > >

Re: gEDA-user: pcb crooked traces

2010-10-07 Thread Rick Collins
Rather than picking an arbitrary grid I have found a happy mix of most of the small pitch metric parts (0.65 mm pitch MSOP, SSOP, TSSOP) and a 0.1625 mm grid. I typically use 6/6 space/trace design rules which most houses work with ok which is the same as my grid (give or take the metric/inch

Re: gEDA-user: pcb crooked traces

2010-10-07 Thread Andrew Poelstra
On Fri, Oct 08, 2010 at 01:00:50AM +0200, kai-martin knaak wrote: > > I prefer 1 mm, sometimes 0.5 mm :-) > (Are there any plans to make inside pcb metric?) > I would vote for this. (But no, not that I've heard.) Andrew ___ geda-user mailing lis

Re: gEDA-user: pcb crooked traces

2010-10-07 Thread kai-martin knaak
Steven Michalske wrote: > Another thought, I usuially place my parts on a 100 mil grid, > maybe on a 50 mil grid. I prefer 1 mm, sometimes 0.5 mm :-) (Are there any plans to make inside pcb metric?) ---<)kaimartin(>--- -- Kai-Martin Knaak Öffentlicher PGP-Schlüssel: http://pgp.mit.edu:11371/p

Re: gEDA-user: pcb crooked traces

2010-10-07 Thread kai-martin knaak
Dave N6NZ wrote: > I've had perfectly explainable jaggies that occur when I am > routing parallel traces. The 2nd through Nth traces of a > parallel group can be pushed up against the previous traces > as close as min-space, and therefore end up off-grid. This > is great for routing density, but

gEDA-user: My Xorg uses large amounts of CPU when using PCB

2010-10-07 Thread Cory Cross
Hi all, I don't know where to even start trying to figure out this problem. If you can give me a clue, I would very much appreciate it. I have identical builds of a recent git version pcb on my laptop and desktop and a few other machines. PCB runs just fine on everything but my desktop. On t

Re: gEDA-user: pcb crooked traces

2010-10-07 Thread Stefan Salewski
On Thu, 2010-10-07 at 18:20 +, carzr...@optonline.net wrote: > > Why do you need such a fine grid? > >Because it lets me route the 8/8 traces without excessive spaces. If you really need 1 mil grid, then there is something wrong -- with PCB or your layout process. > >When I get home

Re: gEDA-user: pcb crooked traces

2010-10-07 Thread carzrgr8
> Why do you need such a fine grid? Because it lets me route the 8/8 traces without excessive spaces. BTW, I manually make the spacing 9, but the rules are set at 8. > I think I ask you some months ago, and suggested to use larger > grid and > employ snap to pins/pads. Yes,

gEDA-user: Working on a tiny schematics editor

2010-10-07 Thread Stefan Salewski
Some weeks ago I started working on a very basic schematics editor, compatible with current gschem file format. I am writing it in Ruby, using GTK/Cairo. You may ask: Do we really need one? No, gschem works fine. You may say: That is wasting of your time. Maybe... You may say: You should bette

Re: gEDA-user: pcb crooked traces

2010-10-07 Thread Dave N6NZ
On Oct 7, 2010, at 7:50 AM, Stefan Salewski wrote: > On Thu, 2010-10-07 at 22:29 +0800, Steven Michalske wrote: I cannot get rid of the jagged diagonal lines on my design. There's lots of them. The picture shows a couple of examples. I've tried different grid sizes, line width

Re: gEDA-user: pcb crooked traces

2010-10-07 Thread Stefan Salewski
On Thu, 2010-10-07 at 22:29 +0800, Steven Michalske wrote: > >> I cannot get rid of the jagged diagonal lines on my design. There's lots > >> of them. The picture shows a couple of examples. I've tried different > >> grid sizes, line widths, but nothing fixes the problem. Redrawing them in >

Re: gEDA-user: new footprint guidelines

2010-10-07 Thread Peter TB Brett
On Fri, 01 Oct 2010 17:55:43 -0400, Rick Collins wrote: > Oh, I almost forgot, NEVER ask a PhD "anything" to design PCBs. What > the heck are you thinking??? Are you trolling, or just ignorant? Peter -- Peter Brett Remote Sensing Research Group Surrey Space Centre ___

Re: gEDA-user: pcb crooked traces

2010-10-07 Thread Steven Michalske
Another thought, I usuially place my parts on a 100 mil grid, maybe on a 50 mil grid. Steve ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user

Re: gEDA-user: physicists (Re: new footprint guidelines)

2010-10-07 Thread John Doty
On Oct 6, 2010, at 12:40 PM, Dave N6NZ wrote: > I think a lot of people confuse the difference between a theoretical > physicist and an experimental physicist. > > A theoretical uses a whiteboard and marker. He/She writes a paper. > > An experimental physicist reads the paper and goes -- "Oh,

Re: gEDA-user: pcb crooked traces

2010-10-07 Thread Steven Michalske
>> I cannot get rid of the jagged diagonal lines on my design.  There's lots of >> them.  The picture shows a couple of examples.  I've tried different grid >> sizes, line widths, but nothing fixes the problem. Redrawing them in order >> to eliminate any sections does not help.  On PCB, it shows

Re: gEDA-user: pcb crooked traces

2010-10-07 Thread Stefan Salewski
On Thu, 2010-10-07 at 07:09 -0400, gene glick wrote: > Grid space is 1 mil. > Why do you need such a fine grid? I think I ask you some months ago, and suggested to use larger grid and employ snap to pins/pads. Such a fine grid is similar to no grid at all, so I am not really surprised about you

Re: gEDA-user: pcb crooked traces

2010-10-07 Thread Steven Michalske
Are you allowing all direction lines? While if you are only drawing a straight line between 2 points there should not be a jagged line. Can you strip it down to one example trace? And send the file. Steve On Oct 7, 2010, at 7:09 PM, gene glick wrote: > I hope the attachment comes through

gEDA-user: pcb crooked traces

2010-10-07 Thread gene glick
I hope the attachment comes through. If not, I'll post it somewhere. I cannot get rid of the jagged diagonal lines on my design. There's lots of them. The picture shows a couple of examples. I've tried different grid sizes, line widths, but nothing fixes the problem. Redrawing them in orde