Oliver:
...
> ERROR: Pin(s) with pintype 'open collector': U70:2 U70:4
> are connected by net 'unnamed_net204'
> to pin(s) with pintype 'open collector': U70:2 U70:4
...
Attached patch corrects that.
Regards,
/Karl Hammar
On 2/10/2011 4:49 PM, Kai-Martin Knaak wrote:
joeft wrote:
I see that this site is flagged as containing a virus by a number of AV
programs.
I'd be surprised if this was relevant to linux users in any reasonable way.
A linux virus sighting in the wild would make a major stir in geek worldia,
s
On Feb 10, 2011, at 5:58 PM, Kai-Martin Knaak wrote:
> John Doty wrote:
>
>> Consider that gschem is a very suitable tool for chip design
>
> See the subject line. This thread is about pcb.
Indeed. The trouble with pcb is that it *isn't* well factored, so it cannot be
used to capture chip ge
On Thu, 10 Feb 2011 16:47:39 -0700
John Doty wrote:
>
> On Feb 10, 2011, at 4:40 PM, Oliver King-Smith wrote:
>
> > I am getting this error when I run the DRC2
> > ERROR: Pin(s) with pintype 'open collector': U70:2 U70:4
> > are connected by net 'unnamed_net204'
> > to pin(s) wi
I would like either the page name(s) or page number(s) (if such a
concepts exist) to be placed into the pages symbol
Oliver
__
From: Kai-Martin Knaak
To: geda-u...@seul.org
Sent: Thu, February 10, 2011 4:11:42
John Doty wrote:
> Consider that gschem is a very suitable tool for chip design
See the subject line. This thread is about pcb.
> circuit simulation,
"usable", yes. But "very suitable", no.
> symbolic circuit analysis, block diagrams, even hydraulics
> (and, of course, printed circuit boa
On 2/10/11 7:43 PM, Kai-Martin Knaak wrote:
To be pedantic, and I don't mean to be rude...Strictly speaking, this
is a mailing list, not a newsgroup.
The geda mailing lists are served by gmane.org in usenet format. According
to the header jpka sent the message with pan, which is a newsreder
joeft wrote:
> I see that this site is flagged as containing a virus by a number of AV
> programs.
I'd be surprised if this was relevant to linux users in any reasonable way.
A linux virus sighting in the wild would make a major stir in geek worldia,
since there had been none since 2002.
---<)
Dave McGuire wrote:
>To be pedantic, and I don't mean to be rude...Strictly speaking, this
> is a mailing list, not a newsgroup.
The geda mailing lists are served by gmane.org in usenet format. According
to the header jpka sent the message with pan, which is a newsreder. Whether
or not gma
Peter Clifton wrote:
> I'm not sure if the code would ignore the vias if you put the polygon on
> an "outline" or "route" layer.
It is true, there are no vias in the gerber file of the outline layer.
---<)kaimartin(>---
--
Kai-Martin Knaak
Email: k...@familieknaak.de
Öffentlicher PGP-Schlüssel:
Oliver King-Smith wrote:
> Is there a way to get the pages symbol (or other equivalent symbol) to
> automatically give the other pages it connects to?
What do you want to achieve?
---<)kaimartin(>---
--
Kai-Martin Knaak
Email: k...@familieknaak.de
Öffentlicher PGP-Schlüssel:
http://pool.sks-ke
three_jeeps wrote:
> I am considering using gEDA suite to do some design. Is the tool suite
> currently actively supported and worked on?
Yes, and very much so.
> Based on google searches, very little traffic wrt the suite has occurred over
> the last 2-3 years.
I don't know what you searched
On Feb 10, 2011, at 4:40 PM, Oliver King-Smith wrote:
> I am getting this error when I run the DRC2
> ERROR: Pin(s) with pintype 'open collector': U70:2 U70:4
> are connected by net 'unnamed_net204'
> to pin(s) with pintype 'open collector': U70:2 U70:4
> The above statement is
I am getting this error when I run the DRC2
ERROR: Pin(s) with pintype 'open collector': U70:2 U70:4
are connected by net 'unnamed_net204'
to pin(s) with pintype 'open collector': U70:2 U70:4
The above statement is absolutely correct, these two pins are both open
collector
On Feb 8, 2011, at 4:52 PM, Kai-Martin Knaak wrote:
> Stephan Boettcher wrote:
>
>>> I doubt PCB will ever be a suitable tool for chip design.
>>
>> Why?
>
> Because a jack-of-all-trades is an expert in none.
>
But the right kind of specialization leads to flexibility. Consider that gschem
On Thu, 10 Feb 2011 18:09:21 + (UTC)
three_jeeps wrote:
> Where can I find the most up to date symbol library for gschem? (Do
> ppl actively contribute to it? For example, are there libraries for
> Atmel and TI processors?)
I'd say... a lots of places. I use the mentioned gedasymbols.org, an
John:
...
> Where can I find the most up to date symbol library for gschem? (Do ppl
> actively
> contribute to it? For example, are there libraries for Atmel and TI
> processors?)
...
Have a look at http://www.gedasymbols.org/
For atmega http://www.gedasymbols.org/scripts/search.cgi?key=atmega
On Feb 10, 2011, at 10:09 AM, three_jeeps wrote:
> Hello:
> I am considering using gEDA suite to do some design. Is the tool suite
> currently actively supported and worked on?
> Based on google searches, very little traffic wrt the suite has occurred over
> the last 2-3 years.
>
> Where c
On Thu, 2011-02-10 at 10:04 +, jpka wrote:
> Hi!
> I'm currently working on advanced user grid management for pcb.
> Anyone interested in this? Or maybe want to beta-testing my code?
> Example: http://img202.imageshack.us/i/pcbgrids.jpg/
> (values are editable in this table)
> Also, currently n
On Thu, 2011-02-10 at 10:44 -0500, DJ Delorie wrote:
> > I want to define a zone for gold plating. If I put a polygon on a layer
> > it makes the layer included in all the vias.
> >
> > How do I make it not create via circles on this extra layer I defined?
>
> The only solution for these types o
On 2/10/11 1:09 PM, three_jeeps wrote:
I am considering using gEDA suite to do some design. Is the tool suite
currently actively supported and worked on?
Based on google searches, very little traffic wrt the suite has occurred over
the last 2-3 years.
gEDA and PCB are probably the most activ
> I am considering using gEDA suite to do some design. Is the tool suite
> currently actively supported and worked on?
Yes.
> Based on google searches, very little traffic wrt the suite has
> occurred over the last 2-3 years.
For some reason, google isn't indexing our mail archives.
> Where c
Hello:
I am considering using gEDA suite to do some design. Is the tool suite
currently actively supported and worked on?
Based on google searches, very little traffic wrt the suite has occurred over
the last 2-3 years.
Where can I find the most up to date symbol library for gschem? (Do ppl activ
Hi,
> -Original Message-
> From: geda-user-boun...@moria.seul.org
> [mailto:geda-user-boun...@moria.seul.org] On Behalf Of jpka
> Sent: Thursday, February 10, 2011 11:04 AM
> To: geda-u...@seul.org
> Subject: gEDA-user: Advanced grids in GTK Pcb
>
> Hi!
> I'm currently working on advanc
On 2/10/11 5:04 AM, jpka wrote:
I'm currently working on advanced user grid management for pcb.
Anyone interested in this? Or maybe want to beta-testing my code?
Example: http://img202.imageshack.us/i/pcbgrids.jpg/
(values are editable in this table)
Also, currently nobody works on grids, or i'm
A Warning!!
I see that this site is flagged as containing a virus by a number of AV
programs. The original poster should re-post from another site and
maybe someone can remove the original posting?
Joe T
On 2/10/2011 2:04 AM, jpka wrote:
Hi!
I'm currently working on advanced user grid man
Is there a way to get the pages symbol (or other equivalent symbol) to
automatically give the other pages it connects to?
Oliver
___
geda-user mailing list
geda-user@moria.seul.org
http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
> I also need help in translation my work to lesstif's pcb, i'm was
Once the core code is ready, I can help with the lesstif-specific stuff.
___
geda-user mailing list
geda-user@moria.seul.org
http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
> I want to define a zone for gold plating. If I put a polygon on a layer
> it makes the layer included in all the vias.
>
> How do I make it not create via circles on this extra layer I defined?
The only solution for these types of question is: hack pcb. Sorry.
_
jpka:
...
> Example: http://img202.imageshack.us/i/pcbgrids.jpg/
It says "Grigs" under "Increments" in the left column, probably a
misspelling.
...
> I also need help in translation my work to lesstif's pcb, i'm was
> notified that more chances to see my code in main tree if i will work on
> bo
Oliver King-Smith wrote:
> I think it would be useful to flag in the output the pin type is of
> unconnected
> pin, and or not treat it as an error.
There are special symbols nc-left.sym, nc-right.sym, nc-top.sym and
nc-bottom.sym in the default library. If you attach these symbols to
the pin
Hi!
I'm currently working on advanced user grid management for pcb.
Anyone interested in this? Or maybe want to beta-testing my code?
Example: http://img202.imageshack.us/i/pcbgrids.jpg/
(values are editable in this table)
Also, currently nobody works on grids, or i'm wrong?
I also need help in tra
Is the gEDA project going to try and participate in the Google Summer of
of Code for 2011 [1]? The time for organizations to sign up starts on
February 28th.
Robert
1. http://www.google-melange.com/gsoc/program/home/google/gsoc2011
___
geda-user ma
33 matches
Mail list logo
