gEDA-user: Creating a polygon without a pruned center

2011-02-02 Thread David Carr
r so that I can connect the "dangling" pieces to the solder side ground plane. Is there any way to do this? Thanks, David Carr ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user

gEDA-user: Hardware USB Analyzer for Rent (cheap)

2008-09-02 Thread David Carr
strued as spam, because I thought there might be some individuals out there who have run into the same predicament I did. Best, David Carr ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user

gEDA-user: 20/21 gauge dispensing needles available

2007-10-21 Thread David Carr
I only need 3 or 4. I'm glad to share them with anybody else who needs a few so that they don't have to buy an entire box like I did. These are 1/2" long and have a standard "leur" fitting. Needles are $0.75 each or 10 for $5. Shipping in the US will b

gEDA-user: Adding a hotkey to PCB

2007-09-19 Thread David Carr
Hello all, How would one go about adding a hotkey to PCB (gtk)? I tried editing gpcb-menu.res and adding an entry to Info->Key Bindings but that didn't work. I'm trying to bind the Select->Select by name->All objects item to "Ctrl-F". Th

Re: gEDA-user: PCB manufacture

2007-01-29 Thread David Carr
Lares, I believe that Gold Pheonix is board house used by Spark Fun electronics (sparkfun.com) I might also suggest Olimex. They're cheap and will panelize or combine multiple designs on a single panel for free. Just make sure you use their standard drill sizes. -DC Lares Moreau wrote:

gEDA-user: Increment drill size on 344 vias

2006-11-15 Thread David Carr
Quick question: I have a board with 344 vias that I'd like to increase in size from 20 mils to 24 mils. Is there a way to do this semi-automatically in PCB? There are other vias of different sizes on the board. Thanks, David Carr ___ geda

Re: gEDA-user: more on clipping

2006-10-12 Thread David Carr
. -David Carr Harry Eaton wrote: Levente wrote: I've tested this clipping toy for a while. I think the best thing would be if there was a way to recalculate dead areas; hence for example, if you add a via in a dead area, and in the other side if there is some GND present, the area can be

gEDA-user: Hurray for pcb-clipping

2006-10-12 Thread David Carr
to RS-274X compliance. Thanks again, David Carr ___ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user

Re: gEDA-user: Re: bf1 vs. pcb

2006-10-12 Thread David Carr
Levente, That BF532 PCB is very impressive, especially given that you fit it all on two layers. The skill of the people on the gEDA lists amazes me again and again... -David Carr Levente wrote: On Thu, 12 Oct 2006 08:32:08 -0400 Harry Eaton <[EMAIL PROTECTED]> wrote: I should

Re: gEDA-user: Re: Design changs required to mill PCBs?

2006-10-03 Thread David Carr
How did you get that pcbpool quote? I just got one for a 4 layer 50x50mm prototype and it was 143 euro which is way more than $104. I'd love to get 4 layers for $100! -DC DJ Delorie wrote: I always wanted one myself. How that I've actually used it, I think the funds could have been better u

Re: gEDA-user: CPLDs and other high-density logic chips...

2006-09-05 Thread David Carr
need some help getting it set up. -David Carr Joshua Boyd wrote: On Mon, Sep 04, 2006 at 05:16:47PM -0400, Darrell Harmon wrote: The Xilinx software is available for a specific version of Redhat Enterprise Linux on x86 machines. I am successfully running it in a 32 bit chroot on my AMD6

Re: gEDA-user: Questions on Prototyping with SMT Components

2006-06-26 Thread David Carr
Mark, I think you'll find that you'll be able to do just fine with a few tools that you mostly already have. I routinely solder 0.5mm pitch TSSOPs and 0603 packages with just a temperature controlled soldering iron, some decent tweezers, solder wick and a syringe of paste flux. In fact I use

Re: gEDA-user: illegal layer-group string

2006-06-20 Thread David Carr
It appears that the problem is on line 769 of misc.c: if (layer > LayerN + MAX (SOLDER_LAYER, COMPONENT_LAYER) || member >= LayerN + 1) goto error; groupnum[layer] = group; LayerGroup->Entries[group][member++] = layer; while (*++s &&

gEDA-user: illegal layer-group string

2006-06-19 Thread David Carr
:Tue Jun 20 01:35:45 2006 # user:david (david,,,) # host:Ferrite.lan PCB["" 60 50] Grid[1000.00 0 0 0] Cursor[1000 27000 6.00] Thermal[0.50] DRC[699 400 800 800 1500 1000] Flags(0x00d0) Groups("1,2,3,s:4,5,6,c:s:c:9:10") Thanks f

RE: gEDA-user: Help request

2006-06-16 Thread David Carr
dependency packages installed, I just did the ./autogen.sh, ./configure --prefix=/usr, make, sudo make install process for each source and everything came out fine. Hope this helps, -David Carr > Hi all, > > First, thanks you all for your response. Looks like I am the unlucky one > or som

Re: gEDA-user: Help request

2006-06-15 Thread David Carr
ng 5 700MB ISOs over a slow connection --- now thats a *complete* waste of time and bandwidth. -David Carr Stuart Brorson wrote: Hi -- 1. I don't recommend using Ubuntu to build software. Ubuntu doesn't come with the usual build tools (gcc, header files and all that) installed. Th