I've not run PCB for a couple of years. Is there a way to generate a
stencil and pick and place files for the fab shops. The fab shops seem
able to generate them from gerbers but that implies that the operator
correctly reads the silk screen and copper layers. Ian.
___
I've not run PCB for a couple of years. Is there a way to generate a
stencil and pick and place files for the fab shops. The fab shops seem
able to generate them from gerbers but that implies that the operator
correctly reads the silk screen and copper layers. Ian.
___
Working with GHDL and GTKWave is fine. Once I get the waveforms on the
screen in an order that makes sense how do I save that for the next time
I enter GTKWave? What are export VCD and LXT files? Regards Ian.
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It's a bit since I used it. Same way as you actually. I was using ghdl
to generate the waveforms file. There is (if memory right) top right a
reload tab and that brings up the new waves that I generated from ghdl.
Scrolling I'm not able to remember but a combination of view increase
decrease and
>
> You know you can choose from different Thermal types -- press SHIFT key
> when using Thermal tool.
Thanks, that's fixed it. I can even make a direct connection without a
thermal relief, just great for a screw connection. Regards Ian.
___
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Hi all,
I have some large currents and I have 0.250" mounting holes to connect
to the ground plane. I can reduce the clearance using "shift k" but I'm
not able to get a substantial thermal relief. The four traces from the
pin annulus to the ground plane are so thin that they may evaporate
This looks like a serious (big symbol) take a look at
http://www.gedasymbols.org/
Then look into DJ Delorie who has djboxsym and John Griessen has jgboxsym
and they make it easy to generate a symbol.
Regards Ian.
No virus found in this incoming message.
Checked by AVG
Okay, I've got it up and running. GNUCAP did not understand help or
tutorial, build was understood. I've read the documentation on the home
page and I'm asking ... "what do I do?" Where do I get a kick start?
Stewart Bronson's "Spice How To" seems to suggest "gnetlist Spice
sheet1.sch sheet2.sch
Gnucap is here, the lead developer is here, and cares about
gEDA.
As to the "latest vendor models" If you get the
development version, gnucap supports BSIM-4.6.2, which was just
released this summer. Gnucap had support for it about a week
after the official release from Berkeley. Can a
Hi all,
I've used MC5 since quite some time and I like it though it is
getting dated. My main hick is not supporting the latest vendor models that
use the latest spice. I can live with the win3.1 its 16 bit engine. Of
course there is the latest update at a cost that is outside my bu
I have almost finished debugging the mostly SMT part of my new board.
(I'll send DJ a photograph once fully assembled). It's going much
better than I thought it would. I have three annoyances due to missing
three traces. Backtracking to the schematic they are signals between
sheets. I used the
I seem to remember that in place of exporting gerbers export to postscript.
I think the utility ps2pdf is a standard linux thing. I hope this helps.
Ian.
Ian Chapman
ALFT Inc
302 Legget Drive
Kanata K2K-1Y5
Canada
613-287-0470 (227)
_
From: [EMAIL PROTECTED]
[mailto:[EMAIL
> In general, it is best to set the PCB size larger than the board you
> intend to make, and define the size / shape of the manufactured board by
> drawing on a layer named "outline" (name is special magic to ensure PCB
> doesn't put through-hole pads on it).
>
What I did with my last board was t
Try "man zip" or info "zip" to get the syntax.
=
What Linux application can I use to zip gerbers into that works with
4pcb.com?
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1. Installation:
- There is no way to have non-copper holes (even adding 0x08 to the
flags does not help) - forget it
==
Pin[-39800 0 7500 2000 6500 5550 "Pin_2" "2" "pin"]
Pin[21800 0 7500 2000 6500 5550 "H1" "3" "hole"]
Hole I guess goes onto the unplated drill fil
I have updated from gEDA 1.2 to 1.4 from the many tarballs. Maybe I
should have un-installed first. When I run gschem I get this error ***
gschem: error while loading shared libraries: libgeda.so.33: cannot open
shared object file: No such file or directory) *** errr 1.2 was
installed from tarbal
> Is it normal behavior? If yes, why?
Normal, but perhaps not ideal.
That's what I have found from using pcb. I also noted looking at the pcb
file with a basic editor "gedit" that there was a lock on the component and
a lock on each pin. Maybe that's a nerve end for future development err
lock
http://www.brorson.com/gEDA/
If you scan this link there is a link to land patterns pdf. This may be
what you need.
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E: nvidia-glx-new: subprocess post-removal script returned error exit
status 2
Hi, whenever I try to apt-get a dependency for pcb I get this message
from the package manager. Is it important? Regards Ian.
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On Tue, 2008-07-15 at 23:35 -0400, DJ Delorie wrote:
> It's just another library you have to find the package for and
> install. On Fedora it's in libXpm.
libxpm-dev fixed that one. now I have undefined ref to gdImageJpeg.
Both libjpeg62-dev and libgraphviz-dev failed to fix it.
__
On Tue, 2008-07-15 at 22:08 -0400, DJ Delorie wrote:
> gd.h is part of the GD library (libgd). If your distro doesn't have
> it, you can download it off the net. It's very unlikely to have been
> installed by default.
make has advanced quite a long way but /usr/bin/ld cannot find -lXpm
causing an
On Tue, 2008-07-15 at 19:54 -0400, Ian Chapman wrote:
> > That would be gtk2-devel. There's a pattern to it all :-)
> I'm not able to find that in the package manager. sudo apt-get install
> gtk2-devel returned E: Couldn't find package gtk2-devel. I've looked in
> That would be gtk2-devel. There's a pattern to it all :-)
I'm not able to find that in the package manager. sudo apt-get install
gtk2-devel returned E: Couldn't find package gtk2-devel. I've looked in
the package manager to change/add repositories but not figured that out
yet.
> It was the package manager that was open. Thanks again.
Running make the first error is
In file included from hid/gtk/gtkhid-main.c:28:
hid/gtk/gui.h36:21/:error: gtk/gtk.h: No such file or directory.
According to the package manager gtk2-engines is installed. I guess I
am missing something e
On Tue, 2008-07-15 at 22:42 +0200, Jan Wagemakers wrote:
> Ian Chapman schreef:
>
> >> I don't use ubuntu, but doesn't "apt-get install build-essential" do the
> >> job?
> > I gave it a try with and without sudo.
> > E:Could n
>
> I don't use ubuntu, but doesn't "apt-get install build-essential" do the
> job?
>
I gave it a try with and without sudo.
E:Could not open lock file /var/lib/dpkg/lock - open (11 Resource temporarily
unavailable)
E: YLbabke ti kicj tge adnubustratuib durectirt, (/var/lib/dpgk/), is
anothe p
Thanks Jan that's fixed it. It also told me that I needed flex and that
was simple. Thanks again Ian.
>
> libc6-dev
>
>
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On Tue, 2008-07-15 at 14:53 -0400, DJ Delorie wrote:
> > /usr/bin/ld: crt1.o: No such file: No such file or directory
>
> Looks like you're missing glibc-devel
That's not in the package manager for either of my systems. My AMD64
version did not give a problem when I updated February. I can get
g
On Tue, 2008-07-15 at 14:34 -0400, DJ Delorie wrote:
> > configure: failed program was:
> > /* confdefs.h. */
> > #define PACKAGE NAME "pcb" etc
>
> We really need to see the "etc" part. There's a compiler error in
> there somewhere.
Sorry that it's so big. Here it is. Regards Ian.
This fil
Hi, I am installing pcb onto Xubuntu Hardy. ./Configure tells me that
gcc is not able to create executables. config.log contains
configure: failed program was:
/* confdefs.h. */
#define PACKAGE NAME "pcb" etc
I do have gcc on this machine. Any ideas? Regards Ian.
I'm not the person to answer. My experience Gutsy use Gutsy, Hasty use
Hasty. Else you end up cleaning the disk win problem fixing style. I
suspect that these are a Ubuntu version of deb files and are not to be
confused with exe or bin stuff. They have dependencies and can be super
frustrating.
I guess that you are using Ubuntu Hardy Herron. Based on my experience
using the package manager you are at least one year behind current. Best to
do it from the tarball else you run into bugs that have been fixed. Regards
Ian.
I am in the midst of switching from FreeBSD to Linux. So happens,
On Thu, 2008-07-03 at 13:31 -0700, Ben Jackson wrote:
> On Thu, Jul 03, 2008 at 02:34:11PM -0400, Ian Chapman wrote:
> > Hi, My pcb has passed DFM at a two fab shops (4pcb and Sierra) with 5.8
> > mil spacing. When I set file/preferences/size/DRC cu space to 5 mil and
> > ru
On Thu, 2008-07-03 at 14:56 -0400, John Luciani wrote:
> On Thu, Jul 3, 2008 at 2:34 PM, Ian Chapman <[EMAIL PROTECTED]>
> wrote:
> Hi, My pcb has passed DFM at a two fab shops (4pcb and
> Sierra) with 5.8
> mil spacing. When I set file/preferences
Hi, My pcb has passed DFM at a two fab shops (4pcb and Sierra) with 5.8
mil spacing. When I set file/preferences/size/DRC cu space to 5 mil and
run pcb drc it gives me the x, y to the centre point of a highlighted
race and I'm not able to see why. Any ideas? Regards Ian.
Please excuse my post without a subject.
Hi again, how do I pull a bill of material out of the schematic? The
documentation and Google leave me wondering if it is a work in process and
which version of bom I should use.
BOM / BOM2 - Bill of Materials (-g bom and -g bom2)
*
Partslist 1,2,3 -
Hi again, how do I pull a bill of material out of the schematic? The
documentation and Google leave me wondering if it is a work in process and
which version of bom I should use.
BOM / BOM2 - Bill of Materials (-g bom and -g bom2)
*
Partslist 1,2,3 - More Bill of Materials (-g partslist[1-3])
Hi all, do you use a surface mount frontpast layer? What does fab do with
it and is it recommended for a hand solder job? Regards Ian.
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Thanks DJ that's fixed it. /,lock/ to // and /lock/ to //
On Tue, 2008-06-24 at 16:25 -0400, DJ Delorie wrote:
> Save your PCB to disk. Bring up the file in a text editor and search
> for the word "lock". Remove them if you find any. Now bring the
> board up in pcb again and everything will be
I'm not sure how to describe this. I have a blotch on one of my pads
that is causing a short to a trace. It's on the top layer red layer but
the blotch is light blue, the same light blue as my ground plane. The
ground plane is usually dark blue so I guess the grounds are
inadvertently selected b
Thanks Kai but it's not that.
On Fri, 2008-06-20 at 18:21 +, Kai-Martin Knaak wrote:
> On Fri, 20 Jun 2008 12:27:56 -0400, Ian Chapman wrote:
>
> > At some point after playing with the net window the ground
> > plane changed from dark blue to light blue.
>
>
Here are a few observations while routing my PCB. The auto route usually
works great on a limited number of short traces with a good placement. It
was also impressive on the last dozen long traces with the near empty fourth
routing layer. Sometimes it fails to route on a very simple short trace b
I have finally got the last trace onto my ambitious board and thanks for all
the help. At some point after playing with the net window the ground plane
changed from dark blue to light blue. I'm not able to darken it with
clicking the usual things. Is this significant? Regards Ian.
_
xgsch2pcb handles this all for you, and can also update new components
into a running copy of PCB. (It drops them in a pile in the top corner).
I must try Peter's xgsch2pcb but I am a wee bit wary of dropping components
onto the PCB. The pins have a nasty knack of sticking to existing traces
an
What I was looking at was the report window that opens most but not each
time I optimize rats. Thanks for all the help. I made a 3.3V symbol from a
5V symbol and failed to change the net to 3.3V:1 and that gave the ring on
that resistor and I was able to connect to ground and get the short 5V to
gn
I have a ground plane and I keep connecting 5V to it because the rats
show up as an orange ring on both. Eventually o tells me I've messed up
but it lets me advance too far and back tracking takes a lot of time.
The schematic has a mixture of +5V symbols (power 5V plus) and off page
connectors (io
Is there a GLOBAL lock to lock the entire layout so that nothing moves
as I rout the board? I know how to lock and unlock individual
components. I would just like to make sure that all is locked in place
such that a careless click does not get me into a mess. Regards Ian.
___
Here is what was in the terminal window if anyone is interested.
Regards Ian.
conditions; please see the COPYING file for more details.
Loading schematic [/home/stanley82/Artwork/Controller2/untitled_1.sch]
Loading schematic [/home/stanley82/Artwork/Controller2/Sheet03.sch]
Loading schematic [/hom
I am curious, just how heterogeneous the group of geda users and
developers is. So I thought, I'd start this little non-random sample poll
in the mailing list:
* What OS do you run geda applications on?
Ubuntu Hardy Herron AMD64 single processor
* How did you install your copy of geda apps?
In
Thanks Peter, I did something silly in that I created a new directory
Controller2 with all the CPLD files. I need to change part of the
gsch2pcb command to reflect this ~/Artwork/Controller/Sheet01.sch
Sheet01a etc to reflect controller2 oops. The added components were in
the .new.pcb okay so
I have just deleted a number of components from the schematic. After
running gsch2pcb some of them (possibly all) are still on the pcb. What
is the best way forward delete them from the pcb?
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I'm new to doing a big layout about 500 traces. What I am trying is to
route the short traces first on the top and bottom layers. Select a short
rat then "alt r" works quite nicely. I often have to un-route to do the
next trace then re-do the un-routed trace. The inner layer I am keeping for
th
Orcad layout needs a dot.mnl file and orcad capture generates a number of
formats mnl bien sure plus hdl, spice etc. There is also an alegro option I
think that is a universal format. Capture is very popular and I was told
they use alegro to export to other layout tools. I prefer gschem to orcad
Hi,
I flipped the board and started to rout on the reverse side, put the
wrong size trace signal and hit "u" (maybe "o") to change the trace to
skinny and pcb did an exit. Just reporting in case there is any
interest. Regards Ian.
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A technique that I am using is to make a footprint called outline.fp and add
that to the schematic. This way I can use a text editor to define the board
outline, the mounting holes and standard features that need to be accurate.
I then check it with PCB just like any other dot.fp before starting t
Thanks for your help John, I will do that. Ian.
On Tue, May 6, 2008 at 8:54 PM, Ian Chapman <[EMAIL PROTECTED]> wrote:
> Hi and thanks for the last helpful suggestion that got me over a hump.
>
> There are a few things that I am not clear on with symbols and
> footprints.
Hi and thanks for the last helpful suggestion that got me over a hump.
There are a few things that I am not clear on with symbols and
footprints. Example built into the 7400.sym we have
net=Vcc:14 and net-Gnd:7. Yet when I click on the symbol on the
schematic I do not see this. I am only curi
at you didn't expunge?
>
> It's not an accidental short to ground somewhere else is it? (Of
> course, the optimize rats should be whining about massive shorts if that
> were true.)
>
> -dave
>
> Ian Chapman wrote:
> > Hi, in gschem Add/component/power/+9V s
Hi, in gschem Add/component/power/+9V symbol, I modified it to read
+15V and used it to connect power to various circuits(copy past). In
PCB I am finding that many of these pins have an orange O on them when I
do optimize rats. Sometimes when I use the line tool on these pins the
netlist pops up
Crystal usually cut to + or - 100 ppm for a general use like a CPU and it
will not change too much with temperature and age. Ethernet crystals were
at one time cut to a better spec 50 ppm. Special communications crystal can
be a lot better. The mains are very good in most places for the morning
I'm okay now, I set it to 0.008", thanks for all the help. I am
planning to use http://www.4pcb.com/ Advanced Circuit's 4 layer, 30 sq
ins, 66$ special and they use 0.006" line/space unless any one has had a
bad experience with them? They were fine on a low tech two layer
through hole board. Reg
In my # release: pcb 20080202 version I have:-
DRC[2000 1000 2000 1000 1500 1000] and since they are in square brackets
that works out to be 0.020" spacing and that's fine for through hole but not
so good for TQFP with 0.5mm pad spacing. I'll change the PCB file to 5 or
10 mil if there is not a G
Hi John, I was using skinny traces for experimenting set to 5 mils width and
spacing. Other than that I am using the defaults. I'll have to read on the
docs to determine how to change the DRC?
On Fri, Apr 25, 2008 at 10:24 AM, Ian Chapman <[EMAIL PROTECTED]> wrote:
>
> * T
* Try turning of the pads and see if there is a small amount amount of
copper under the pad.
* Are your traces and pads on the same side of the board?
* Can you connect with with "auto enforce DRC clearance" off?
Hi John,
The last suggestion enabled me to connect to the pad. I guess that
Hi, I thought that I was able to connect my layout footprints without
problems. What I am finding is that with some of the smaller smt parts
that I am not able to get the trace close to the pad. I started with
TQFP100_14.fp that I pulled into my footprints from the distribution.
It has pads defin
Ian Chapman wrote:
> Thanks DJ that was exactly the problem. Regards Ian.
> On Tue, 2008-04-15 at 09:46 -0400, DJ Delorie wrote:
>> It looks like you tried to edit the footprint with pcb, but saved it
>> as a layout rather than as a footprint. Check your footprint fil
Thanks DJ that was exactly the problem. Regards Ian.
On Tue, 2008-04-15 at 09:46 -0400, DJ Delorie wrote:
> It looks like you tried to edit the footprint with pcb, but saved it
> as a layout rather than as a footprint. Check your footprint file on
> disk.
>
>
> _
What I may have done is to look at the footprint using layout in the
directory where PCB stores them. Then "save as" with the rest of my
footprints where I keep the ones that I'm using. I must get myself up to
speed with cp to re-copy the original footprint and all should be fixed.
Many thanks Ia
Here are the top few lines from PAL.pcb. It was generated using
"gsch2pcb -v -s --use-files --elements-dir ~/Artwork/Elements.fp
~/Artwork/Controller/Sheet01.sch Sheet02.sch Sheet03.sch Sheet04.sch
Sheet05.sch Sheet06.sch Sheet07.sch Sheet08.sch Sheet09.sch Sheet10.sch
Sheet11.sch Sheet12.sch She
eball test. The error ref to the line in the dot.pcb file is throwing
me off. I was reluctant to use redefs as I did not want any existing
refdes to change. Is there a DRC for schematics?
On Sun, 2008-04-13 at 22:09 -0400, John Luciani wrote:
> on Sun, Apr 13, 2008 at 10:05 PM, Ian Chapman
On Sun, 2008-04-13 at 22:45 +0100, Peter Clifton wrote:
> On Sun, 2008-04-13 at 17:14 -0400, Ian Chapman wrote:
> > Hi,
> > using PCB version 20080202 I did a fair bit of my layout and was asked
> > to make some large changes to the schematic. After updating the
> >
Hi,
using PCB version 20080202 I did a fair bit of my layout and was asked
to make some large changes to the schematic. After updating the
schematic "gschem version 1.2.1.20071231" I ran gsch2pcb a few times
after fixing my share of typos. When at last I came to load the new.pcb
file to p
On Mon, 31 Mar 2008 14:33:19 -0700, Raymond Lillard wrote:
> I still cannot figure out how to resize a component.
There is no resize in gschem. This is deliberate., as it would be
difficult to maintain consistent grid with resized symbols.
--
Hi Peter,
I am not to sure if your are asking for projects for students to
undertake or recruiting students to undertake projects? I guess I
should look up this google summer code program and find out.
If it is the former, one thing I've been thinking about starting but
not being
On Wed, 2008-03-12 at 01:05 +, Peter Clifton wrote:
> On Tue, 2008-03-11 at 20:25 -0400, Ian Chapman wrote:
> > I was learning ghdl and going through an exercise and I generated the
> > adder.vhd file per instructiions. When I run gtkwave adder.vhd I get a
> > fast fl
I was learning ghdl and going through an exercise and I generated the
adder.vhd file per instructiions. When I run gtkwave adder.vhd I get a
fast flash of what may be an interesting screen and that's it. Did I
miss something when I installed gEDA tarball? Regards Ian.
In the terminal I get:-
G
Under info/key bindings there are a number of keys defined that make
immediate action. However 't' and 'T' change the text size the next
time the text tool is used. Under
Select/change-size-of-selected-objects there is Text plus and minus
10-mil and these are immediate action. I think it would b
On Mon, 2008-02-25 at 00:18 +, Kai-Martin Knaak wrote:
> On Sun, 24 Feb 2008 17:11:09 -0500, Ian Chapman wrote:
> > Q2, Also looking in bindings I see "T" and "shift T" TextScale +
> > and - 10m. I would like to increase the size of the PCB's name.
Hi, I've seen this question asked quite a few times but I'm not able to
locate the answer. I've looked in info/keybindings and not found it
there.
Q1, How do I flip a cap from the component side and put it on the
solder side?
Q2, Also looking in bindings I see "T" and "shift T" T
Hi, I am using the footprint SQFP-50P-2280L1-2280L2-144N.fp for a
tqfp144. I've checked a printout of the gerber against an actual device
and it looks okay to me. I just need to check against the rest of the
guys for any comments? Regards Ian.
___
You might want to try a more recent PCB; this was a common problem a
while back.
Thanks JD, did the September 07 release fix it if not I'll get the Jan 08?
In recent PCBs, there are settings to force the crosshair to ignore
all text, or ignore everything except text.
Is there a gui click or is
I'm in PCB and I'm loosing component IDs. For example U101 was there
when I started layout but after positioning and moving U101 is still
there without its ID. It may return in any case if I exit PCB and
re-enter re-load etc all is restored. Is there something that I can do
to get round this? I
Hi, possibly this may be of interest. I made a minor error using
refdes_renum. I missed Sheet05.sch from the list of 13 sheets I wanted
renumbering. Sheet 5 somehow got renumbered as sheet 5 and sheet 6 was also
renumbered as sheet 5 so I had two U501 integrated circuits. The rest of
the sheets
Hi, almost thee. My Makefile generated all the dot.ps files like it
should. I generated all the dot.pdf files one at a time using ps2pdf
and they are really fine looking schematics. It failed to generate a
schematic_all_pages.ps file and went off course from then on.
Regards Ian.
Make e
Gee thanks guys. I now understand a bit about make and makefiles. I
guess when I tried to install gEDA from the tarball if you remember it
stopped as it could not find a directory. The gschem worked okay
invoked from a terminal and I have 13 pages so that was okay. I've even
got as far as impor
I have a "psmerge" script that merges
schematic*.ps into a single *.ps if you need it.
Hi DJ, Yes please I would like to have that script. Ian.
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___(Below this line)
all: schematic1.pdf schematic2.pdf schematic3.pdf <--- (List your
dependencies (in this case outputs) for "all" here)
==
I guess I need to have "all:sheet01.pdf sheet02.pdf etc" somewhere? I guess
a
I did what JD said we should do. File/Write-image to encaplulated
postscript. That worked fine and I clicked on the dot.eps file and it
looks fine using Evince Document Viewer (ubuntu default I guess) but
printing this to pdf I can only get a portrait view of the left half of
the schematic. I've
Strange, I am not able to remover all the tarball stuff. I have
Geda-gschem-1.2.0/src empty and
libgeda-1.2.1/scr also empty.
using rmdir returns "not empty" and putting them in the Ubuntu trash
(that's where I first hit the snag) is not able to empty the trash. I
got rid of most of it by sel
Hi,
I never set net and netname to any value, I just leave them the way
they are in the symbol. I do use the net attribute with
off-page-connections that is with the IO out/in symbol I set net to
sig-name:1 (invisible) and value to sig-name (visable). I wonder what the
significance is of t
I'll dual boot ubuntu 32-bit. Sorry if I have worn you
down. Manny thanks again Ian.
On Wed, 2008-01-16 at 01:48 +, Peter Clifton wrote:
> On Tue, 2008-01-15 at 19:54 -0500, Ian Chapman wrote:
> > On Tue, 2008-01-15 at 17:36 +0200, Bernd Jendrissek wrote:
> > > On Jan 1
On Tue, 2008-01-15 at 17:36 +0200, Bernd Jendrissek wrote:
> On Jan 15, 2008 5:21 PM, Ian Chapman <[EMAIL PROTECTED]> wrote:
> > This is getting to be a real adventure. Good thing I am enjoying it
> > all.
>
> I'm glad - mere mortals don't like fighting t
Fine, I'll have a go with 1.3 Regards Ian.
On Tue, 2008-01-15 at 13:50 +, Peter Clifton wrote:
> On Tue, 2008-01-15 at 08:39 -0500, Ian Chapman wrote:
> > For bash:
> > export LD_LIBRARY_PATH=/usr/local/gEDA/lib:$LD_LIBRARY_PATH
> > export PATH=/usr/local/g
This is getting to be a real adventure. Good thing I am enjoying it
all. I added the PATH stuff like Peter suggested and ran sudo make
install. It ran for ages with a screen full of asc stuff wissing by.
It ended with this not finding lgeda, any ideas?
gcc -Wall -g -O2 -o gnetlist i_vars.o g
For bash:
export LD_LIBRARY_PATH=/usr/local/gEDA/lib:$LD_LIBRARY_PATH
export PATH=/usr/local/gEDA/bin:${PATH}
export PKG_CONFIG_PATH=/usr/local/gEDA/lib/pkgconfig:$PKG_CONFIG_PATH
I have to do something with the above? Do I just past it into the
command line one at a time and bash remembe
On Tue, 2008-01-15 at 09:01 +, Kai-Martin Knaak wrote:
> On Mon, 14 Jan 2008 21:24:53 -0500, Ian Chapman wrote:
>
> > I have looked into glib a bit and
> > http://linux.softpedia.com/get/Programming/Libraries/GLib2-2653.shtml
> > has a number of different versions of
ories /usr/local/geda/bin, and
> /usr/local/geda/lib, respectively.
>
> Cheers,
>
> Stuart
>
>
>
>
>
> On Mon, 14 Jan 2008, Ian Chapman wrote:
>
> >
> > On Mon, 2008-01-14 at 14:54 +, Peter Clifton wrote:
> >>> So lets g
under apps/education but it's still dead. So I un-installed
the Ubuntu gEDA, Looking at google for glib at
http://linux.softpedia.com/get/Programming/Libraries/GLib2-2653.shtml
is this what is needed?
On Mon, 2008-01-14 at 22:22 +, Peter TB Brett wrote:
> On Monday 14 January 2008
nd
> /usr/local/geda/lib, respectively.
Again please excuse me but where and how do I do that. Do I need to
edit an rc file? Sorry to be new to linux Regards Ian.
>
> Cheers,
>
> Stuart
>
>
>
>
>
> On Mon, 14 Jan 2008, Ian Chapman wrote:
>
> >
&
On Mon, 2008-01-14 at 07:27 +, Peter TB Brett wrote:
> On Monday 14 January 2008 04:01:46 Ian Chapman wrote:
> > I am in the process of updating my gschem tools to 1.2.0
> > stable. ./configure reported guile not found so I got guile 1.6 from
> > the ubuntu package m
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