On 2/10/2011 4:49 PM, Kai-Martin Knaak wrote:
joeft wrote:
I see that this site is flagged as containing a virus by a number of AV
programs.
I'd be surprised if this was relevant to linux users in any reasonable way.
A linux virus sighting in the wild would make a major stir in geek wo
A Warning!!
I see that this site is flagged as containing a virus by a number of AV
programs. The original poster should re-post from another site and
maybe someone can remove the original posting?
Joe T
On 2/10/2011 2:04 AM, jpka wrote:
Hi!
I'm currently working on advanced user grid man
Kai-Martin Knaak wrote:
> On Fri, 02 Oct 2009 16:47:39 +0100, Gareth Edwards wrote:
>
>> I guess it depends what your goal is. Kai-Martin's assumed goal was to
>> produce a (photo?-)realistic depiction of the layout/assembly.
>
> This is the goal, I assumed Peters 3D trials were aiming at ;-)
>
Dan,
I've found this tool useful in the past and was really glad to see the
CPW model (which I really needed last week!).
A couple questions:
- what are the units for electrical length?
- the Options and Window pull downs don't seem to contain anything - is
there supposed to be something there
Peter Clifton wrote:
> On Fri, 2009-02-20 at 16:20 -0500, Rob Butts wrote:
>> I have a pcb mounted power jack with rectangular bendable tabs. Since
>>I'm going to try to make this pcb at home I'd like to put these holes
>>in the layout as they are and not round holes with the diameter
>>
Hadn't tried gerbv on windows yet, but I just installed 2.0.1 and it is
quite zippy (in any rendering mode). But I notice one thing that
doesn't look right:
1) I seem to remember that when using the measure tool it would draw a
rubber band line from the reference point to the current cursor
posi
You probably already have them. It used to be the case that the
aperture list was a separate file, but PCB includes the aperture list at
the top of each gerber file.
Look at the file, once you get past some header info, about 10 lines in
and you should see some lines that look like this:
%AD
Ian Chapman wrote:
> Please excuse my post without a subject.
>
> Hi again, how do I pull a bill of material out of the schematic? The
> documentation and Google leave me wondering if it is a work in process
> and which version of bom I should use.
>
> BOM / BOM2 - Bill of Materials (-g bom a
Ben Jackson wrote:
> On Tue, Mar 11, 2008 at 08:39:31AM -0800, Dave N6NZ wrote:
>> Steve Meier wrote:
>>> I am also interested in why you would want a thermal for connecting a
>>> via onto a pad in which the via is sitting.
>> ?? OK, I'm still under-caffeinated, but I don't parse your question.
>>
Peter Clifton wrote:
> On Tue, 2008-03-04 at 12:17 +, Kai-Martin Knaak wrote:
>
>> Now that gschem knows about [ctrl-c] and [ctrl-v]. Why not also support
>> save with [ctrl-s]?
>>
>
> Surely is should be ":w" ;)
>
> Send a patch, and if no-one objects I'll push it.
>
>
Hmmm. Wh
>Now, to generalize to things other than simulation netlists..
>
>To represent a layout, "types" might say whether it is a via,
>trace, fill block, footprint by name. The attributes are
>length, width, forms, scaling. The connections are physical
>locations. This is the same info that is in
David Griffith wrote:
>Does anyone have footprints for USB jacks?
>
>
>
I see that John has already chimed in, but here's another option:
Please also keep in mind the necessity for proper grounding and RFI
performance. There are app notes from Intel and Cypress which offer
some guidance. (s
Ben Jackson wrote:
>On Sat, Oct 20, 2007 at 10:32:57AM -0700, joe tarantino wrote:
>
>
>>On 10/20/07, Ben Jackson <[EMAIL PROTECTED]> wrote:
>>
>>
>>>1) If you move a line or its endpoint: For purposes of rubberbanding,
>>>it is considered connected to all of the line segments whose ends o
Kai-Martin Knaak wrote:
>Rubber band mode is (still) much too sloppy about the decision which
>segment endpoints to move.
>
>Imagine a short segment between longer ones like I constantly get because
>of the metric/imperial nuisance. Thes almost never rubber move in a
>decent way. Suppose a tra
Dave N6NZ wrote:
>DJ Delorie wrote:
>
>
>>>Imagine, that you have a 431 pin BGA. Would you include 431 times
>>>the same padstack in the footprint? I think one should bother with
>>>the whatever shape, and size of the stencil, copper, mask, paste
>>>layers. Those are just "pads". Then we could
This question has come up in the past. Dig back in the archives and
look for a posting from David Rowe. He generated a script which can do
footprint replacement in certain situations. It may be available from
his web site. I have used it with success with a number of surface
mount footprin
Steven Michalske wrote:
>On Sep 11, 2007, at 2:49 PM, andrewm wrote:
>
>
>
>>Steve,
>>
>>Sure I can do a bug/feature request on this (after I
>>read up how too).
>>
>>Just want to make sure that it is something wrong or
>>something people want.
>>
>>Should the two pins same-named be treated as a
Jason Elder wrote:
.
Conclusion -
1. OpenSUSE works well, the development packs need to be installed
post-install (I opened the software installer and selected every
package that had development in the name).
2. Slackware - This distro should work well...I think that if you
choose full
Stuart Brorson wrote:
My experience has been that if you are missing some system
dependencies, the first expect session will always fail, whether
running as root or not. This may be unique to the openSuSe
distributions, but I don't think so. It is more likely just an issue
exposed by the fa
Igor2 wrote:
On Sun, 18 Mar 2007, al davis wrote:
* Finally, how should PCB behave with a hierarchical
schematic?
Right click on a symbol, select "go inside", and another drawing
opens up showing what's inside. gschem also should act this
way.
I like this idea very much. I
Stuart Brorson wrote:
On Sun, 18 Mar 2007, Jason Elder wrote:
Hi, I'm having trouble with the installation, but I don't know if
this should be posted hereI just downloaded the new version
20070221 of gEDA and I was wondering how I can install it as root.
Do not install as root. If you
C P Tarun wrote:
Do not install as root. If you install as root, and you need to
install system-wide dependencies, the installer becomes confused when
it tries to fire up an expect session as root.
Now I'm confused. In all these years of working on Unix, I've always
thought packages need to
Seb James wrote:
On Mon, 2007-03-12 at 14:10 +, Seb James wrote:
On Sat, 2007-03-10 at 17:38 +, Seb James wrote:
On Fri, 2007-03-09 at 19:14 -0800, Harry Eaton wrote:
I've fixed the problem in rats.c; Just grab the latest
cvs.
h.
Thanks Harry. I'll have a loo
Werner Hoch wrote:
Hi Ben,
On Saturday 10 March 2007 22:47, Ben Jackson wrote:
On Sat, Mar 10, 2007 at 09:53:07AM +0100, Werner Hoch wrote:
I'm currently drafting a better spice integration into gschem.
Maybe that could be a project, too.
Anyone who is thinking of improving a
DJ Delorie wrote:
I think one good way to approach this would be to pitch the *file
format*, not the software...at first. The industry has proven that
it will standardize on file formats (witness Gerber RS-274X) if they
work well. Granted the Gerber format (as far as I know) really
be
Al Hooton wrote:
This is on a vanilla install of Mandriva 2007.0. I have looked through
the list archives, the INSTALL information and googled around, but I'm
stuck. Hopefully somebody here has the answer as to why the installer
just suddenly gives up near the beginning of things.
DJ Delorie wrote:
We've used the EXB-28V series on several boards. With some feedback
from one of our board stuffers the footprint solders very repeatably.
What was the feedback, if we may ask?
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Michael Sokolov wrote:
Dan McMahill <[EMAIL PROTECTED]> wrote:
take a look in the ~panasonic library for footprints like
PANASONIC_EXB14V. Those are the panasonix EXB series of SMT resistor
arrays.
Thank you Dan, that's exactly what I was looking for! And they are M4
footprints, y
DJ Delorie wrote:
I added the code needed to make text on the copper, silk, and pinout
be constrained according to the right DRC rule (min line, min silk, or
none).
Now text on the screen looks just like text on the board.
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DJ Delorie wrote:
This bug has been there for several months. I looked through the code
and figured out that it is related to the code that "flips" the view to
the solder side. I believe it is only broken in the GTK hid. I
submitted a bug report but I don't think anyone has looked at it yet
KURT PETERS wrote:
I'm sure someone else has noticed this. I'm using one of the latest
CVS releases (December-ish) and noticed that the grid dots only show
up on one side of the board. Does anyone else notice this? Is this
on the "bug list"?
Regards,
Kurt
This bug has been there for sev
ludovic smadja wrote:
Hi,
I've lost some sch file (which are now garbaged) but netlist are ok.
Is there a way to convert a netlist to a schema (a basic schema) ?
regards,
--
Cordialement,
Ludovic SMADJA
You may be out of luck. The netlist only contains a small subset of the
information th
DJ Delorie wrote:
What's a good size ferrite to use on an rs232 line? I've got a spot
for a set of 0603 ferrites on my serial console lines, but I have no
idea what size (uH) ferrite to use.
The ferrite bead impedances are usually specified by a graph showing
both the resistive and reactive
Harry Eaton wrote:
--- DJ Delorie <[EMAIL PROTECTED]> wrote:
1) Long lines do funny things if zoomed in a lot.
I've recently seen short lines and arcs get exploded
in the lesstif
version too, but haven't tracked it down yet.
The "new" GUI drawing code simply scales the line a
Kai-Martin Knaak wrote:
On Wed, 17 Jan 2007 11:20:00 -0500, DJ Delorie wrote:
3) Auto router and manual line drawing tool interpret line clearance
differently. If clearance is set to 10 mil for a particular route style,
the auto routed lines will punch a 10 mil gap into polygons. With manua
David Kuehling wrote:
Hi,
reading through the manufacturer's design rules, I cannot find any
comments on how much distance silk text should keep from vias. Just
wondering, whether there problems one should be aware of (like silk
detaching and geting to places it doesn't belong?) Or can vias
Dan McMahill wrote:
joeft wrote:
DJ Delorie wrote:
I find this semi fork disconnecting.
I partly agree. One of the ideas behind HID is that you can have two
GUIs that *act* differently, not just *look* differently. That way,
each GUI could respect the rules of its usability guide
i586-suse-linux"...Using host libthread_db
library "/lib/tls/libthread_db.so.1".
(gdb) r
Starting program: /usr/local/bin/pcb-bin
[Thread debugging using libthread_db enabled]
[New Thread 1082867936 (LWP 7233)]
write to pipe "cat - >
'/home/joeft/projects/db8b/highlight_n
Ostheller, Joel A. wrote:
I finished a layout, but decided that I really should change one of my
footprints. Is there a way to update my .pcb for all updated
footprints without having to redo placement and hand routing? //
A while back David Rowe posted a perl script to this list to
autom
DJ Delorie wrote:
I find this semi fork disconnecting.
I partly agree. One of the ideas behind HID is that you can have two
GUIs that *act* differently, not just *look* differently. That way,
each GUI could respect the rules of its usability guide. So some
differences are to be expecte
DJ Delorie wrote:
I'm curious to know what the "not a great" reason is.
The pinout window uses the same routing to draw the pin numbers. We
just need some way of knowing when it's appropriate to grow the silk,
and when it isn't, which probably means adding a parameter to all the
text dra
DJ Delorie wrote:
Is there a way to change the default line thickness used by the default
font without increasing the font size itself?
Set the minimum silk width in the "board sizes" dialog. It will emit
gerbers with the right size, even if it shows up thinner on the screen
(yes, there'
Stuart Brorson wrote:
I would be interested in
hearing experiences of other distro users.
I tried the install on a SuSe 9.3. A previous installation has been done
on this system so many of the "system" packages were already present.
Here's what I found --
12/14/06
- Having the instal
Ales Hvezda wrote:
* An idea was tossed out to make PCB's default build/run mode be set
to Lesstif, as the Lesstif PCB is more configurable at runtime.
DJ noted that Lesstif has an active developer (DJ) whereas gtk+ is
more in "maintenance" and could use a gtk+ expert to push it forward.
St
John Griessen wrote:
joeft wrote:
DJ Delorie wrote:
DJ,
More info on this problem (hopefully useful to others)
I'm not sure why but there were some missing links in /usr/lib to
some of the required shared libraries. In particular, there was no
/usr/lib/libXm.so.
There is ho
DJ Delorie wrote:
Perhaps you had an old Xaw version of pcb installed, and its
pcb-menu.res is overriding the built-in lesstif version?
I don't recall ever having the Xaw version on this machine, although
I've had the GTK version installed for quite a while. Where do I look
to see if ther
DJ Delorie wrote:
#2 0x40127026 in XmStringCreateLocalized (text=0x0) at XmString.c:4427
This looks suspicious. I'll investigate when I get a chance.
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Karel Kulhavy wrote:
Do you know at which voltage a typical red LED breaks down in reverse? 100V?
No, more like 5v or so. LEDs are not designed for high reverse
breakdown voltages.
What happens when the diode is charged slowly with a current source of say
0.5mA until it breaks down and i
I understand. I'm thinking that it used to "work" however. Is my
memory failing me?
Joe T
DJ Delorie wrote:
I think you've explained the behavior I've viewed as a bug.
Yes, it's a bug. My explanation was why it's not an easy (i.e. fixed
already) bug.
DJ
I think you've explained the behavior I've viewed as a bug. The pin
numbering code should allow narrow lines for readability while you are
editing - this is good. However, the silkscreen text must be drawn with
accurate width in the editor so that it can be placed to prevent their
landi
I would suggest that "Y" be used for crystals rather than "X", which
might prevent collisions when someone uses their netlist for SPICE
simulations that have subcircuits.
Some lesser used prefixes I've seen:
F Fuse
and some two letter prefixes (if you can deal with more than one letter
prefixe
I've observed this same behavior on a Suse installation (also w/ GTK
hid). Maybe stealing focus is not the issue? My first impresstion when
I had it happen was that the event generated by the mouse click (as when
drawing lines) came back saying the right button rather than the left
button h
John Griessen wrote:
Dan McMahill wrote:
Does this need to be a feature?
I'm not an expert in PCB layout tools but it seems worthy
I think it is important but I'm not sure when I'll have time. I
wonder if maybe just a "nopaste" flag for pins/pads is enough.
If we could show it
John Griessen wrote:
DJ Delorie wrote:
Choose via tool the usual way. Now PCB is ready to act on a left
button down event. In comes a scroll wheel event. Now PCB suspends
polling the mouse for an instant, and reponding to the new event,
changes the value of ViaDrillingHole up a mil for th
Harold,
You were right the first time.
There *was* a thread about this issue a couple of weeks ago. The thread
got diverted to a discussion of an install problem and the original
issue with the missing grid was never addressed. Other people have
noticed that the grid disappears in certain
Peter,
I don't believe these small segments are due to the autoroute process.
I see them a lot and I've never used the auto-router. I believe they
can occur when:
You add a line containing several segments with snap to pins and pads
turned on. This can put a short (< 1 grid long) segment i
While not entirely about choosing the best FETs, there is a good general
article about class D audio amplifier design in the most recent issue of
Analog Dialog (from Analog Devices).
http://www.analog.com/library/analogDialogue/archives/issues/vol40n2.pdf
Joe
gene glick wrote:
Can anyone h
Harry -
These are very welcome additions to PCB. (6) especially will save me
literally hours of manual checking.
Thanks!
Joe T
Harry Eaton wrote:
Unfortunately, I have family commitments so I won't be able to
participate in the code sprint.
I have been sprinting on my own quite a bit re
Stuart,
I've done this by hand and had a shop do this kind of thing. Good luck.
Most fab shops can route spaces between boards (in a panel) or parts of
a board. Many (most?) are not set up to mill partially through a
panel. They may not have the machine(s) or tooling to do it. Control
of
Phil,
You didn't mention whether this was "incidental" silkscreen like a
"ElementLine" that overlapped the pad or something related to the pad
itself.. A previous version of pcb would in some cases generate
silkscreen rectangles in the gerber output on some surface mount pads.
I was never
Dan's suggestions are similar to what I've received from one of our
suppliers:
Use a .050" diameter copper circle with .100" solder mask opening in 4
places. Making the part as a pin may include a drilled hole (which you
don't want). What I did was make a part with one surface mount pad of
Hugo,
Thanks for filling in some other cases that the DRC might handle
better. In fact, we ran across the last case you describe below on this
same design.
Joe
Hugo Elias wrote:
> We've just completed a board which had us scratching our heads when
we ran the DRC. We also found problems i
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