Fiducials and Keepouts --
The last mfg I dealt with recommended that the fiducial be
a copper circle with a diameter between 0.5mm and 3.5mm and
that the solder mask diameter be three times larger than the
copper. I made a single 1mm pad footprint with
the 3mm clearance. IIRC the
John Griessen wrote:
Bob Paddock wrote:
Not sure. I know our CM loves that I put fuducials on the QFN
So these footprint fiducials are outboard of the part so they show in a
vision system as the part is being placed? Do you put silk outline outside
them or some silk circles around each one
On Feb 24, 2010, at 4:59 PM, Bob Paddock wrote:
On Wed, Feb 24, 2010 at 7:47 PM, Steven Michalske > wrote:
On Feb 24, 2010, at 1:41 PM, Bob Paddock wrote:
To DJ's comment. We usually do go with pre-programmed parts
eventually. Solder jumpers
are a really bad idea when doing anything more
On Wed, Feb 24, 2010 at 7:47 PM, Steven Michalske wrote:
>
> On Feb 24, 2010, at 1:41 PM, Bob Paddock wrote:
>
>> To DJ's comment. We usually do go with pre-programmed parts
>> eventually. Solder jumpers
>> are a really bad idea when doing anything more than few boards. Even
>> zero ohm resist
> So these footprint fiducials are outboard of the part so they show in a
> vision system as the part is being placed? Do you put silk outline outside
> them or some silk circles around each one to clue
> the CM about what they are good for, or does that just need some notes and
> documentation an
On Feb 24, 2010, at 1:41 PM, Bob Paddock wrote:
To DJ's comment. We usually do go with pre-programmed parts
eventually. Solder jumpers
are a really bad idea when doing anything more than few boards. Even
zero ohm resisters jumpers
cost real money.
I believe it was my comment that referen
> don't even consider ordering boards without loading up the photoplot files
> into something like gerbv and doing some sanity checks. This advice applies
> to a design done with any layout tool and not just pcb. A minimal list would
> be:
>
> - From 20,000 feet, does each layer look right or are
gene glick wrote:
After a very long time, I am just about ready to send out 3 different
boards for fab. I would appreciate any advice to improve my chances of
success. So far here's what has been done:
1. Run DRC on all PCBs with no issues..
2. Checked schematics.
3. Checked schematic matche
On Wed, 24 Feb 2010 15:22:54 -0600, John Griessen wrote:
> So these footprint fiducials are outboard of the part so they show in a
> vision system as the part is being placed? Do you put silk outline
> outside them or some silk circles around each one to clue the CM about
> what they are good for
On Tue, Feb 23, 2010 at 10:01 PM, gene glick
<[1]carzr...@optonline.net> wrote:
> After a very long time, I am just about ready to send out 3
different boards
> for fab. ?I would appreciate any advice to improve my chances of
success.
Don't send all three at once.
On Wed, Feb 24, 2010 at 04:41:35PM -0500, Bob Paddock wrote:
> > I would have just ensured that my AVR image didn't contain any sequences
> > that trigger the problem.
>
> How? Its a crap shoot as to know if any particular image will
> generate the bad sequence.
> Then you waste time trying to fi
> I would have just ensured that my AVR image didn't contain any sequences
> that trigger the problem.
How? Its a crap shoot as to know if any particular image will
generate the bad sequence.
Then you waste time trying to figure out how to get around it.
To DJ's comment. We usually do go with p
> I would have just ensured that my AVR image didn't contain any
> sequences that trigger the problem. It might be possible to just
> modify AVRdude to detect such sequences and modify the programming
> sequence to avoid them. Sort of like bit stuffing with NRZI.
"I'm sorry, you cannot program
Bob Paddock wrote:
On Wed, Feb 24, 2010 at 3:24 PM, Larry Doolittle
wrote:
Have you put Fudicuals on components, such as tiny QFN packages, or
even massive TQFP and BGAs.
I don't think you said what you wanted to say.
Not sure. I know our CM loves that I put fuducials on the QFN
acceleromet
On Feb 24, 2010, at 1:07 PM, Bob Paddock wrote:
On Wed, Feb 24, 2010 at 3:24 PM, Larry Doolittle
wrote:
Hi -
On Wed, Feb 24, 2010 at 02:40:50PM -0500, Bob Paddock wrote:
I'm making the assumption you will have a contractor build
quantities someday,
in automated equipment. These will (at l
On Wed, Feb 24, 2010 at 04:07:13PM -0500, Bob Paddock wrote:
>
> I've learned most of this by working at a large CM, and 'The Hard Way'
> of doing it wrong.
>
> For example the job today is 5,000 boards. When you get into
> quantities, you start to do things
> differently. See the note at the b
On Wed, Feb 24, 2010 at 3:24 PM, Larry Doolittle
wrote:
> Hi -
>
> On Wed, Feb 24, 2010 at 02:40:50PM -0500, Bob Paddock wrote:
>> I'm making the assumption you will have a contractor build quantities
>> someday,
>> in automated equipment. These will (at least should) lower production costs:
>
>
Hi -
On Wed, Feb 24, 2010 at 02:40:50PM -0500, Bob Paddock wrote:
> I'm making the assumption you will have a contractor build quantities someday,
> in automated equipment. These will (at least should) lower production costs:
Although OT, I appreciate and try to learn from discussions like this.
On Tue, Feb 23, 2010 at 10:01 PM, gene glick wrote:
> After a very long time, I am just about ready to send out 3 different boards
> for fab. I would appreciate any advice to improve my chances of success.
I'm making the assumption you will have a contractor build quantities someday,
in automate
On Tue, 23 Feb 2010 22:18:02 -0500, gene glick wrote:
> I'll have to order up a bunch of
> parts to make it happen but that's ok.
This is an important part of the check. It is too easy to misread some
aspect of the physical dimensions in the data sheet. Think SO16 vs SO16-
wide. This has hit me
On Tue, Feb 23, 2010 at 10:01:55PM -0500, gene glick wrote:
> what else? Any suggestions?
Check your hole dimensions, especially on connectors - a correctly-routed
board is not much use if your connector pins won't fit through the
holes...
--
David SmithWork Email: dave.sm...@st.com
On Tue, 23 Feb 2010 22:18:02 -0500
gene glick wrote:
> DJ Delorie wrote:
> > Print out your surface copper layers and put the parts on the printout
> > to make sure they match.
> >
> that's a really good idea, thanks! It'll delay things some, but yeah,
> sounds like the conservative way to go.
On Tue, Feb 23, 2010 at 8:01 PM, gene glick wrote:
> After a very long time, I am just about ready to send out 3 different boards
> for fab. I would appreciate any advice to improve my chances of success.
> So far here's what has been done:
>
> 1. Run DRC on all PCBs with no issues..
> 2. Checke
John Luciani wrote:
Check the gerbers and drill files using gerbv.
I use a script that zips and renames all the files for the fab house.
I take the zip file that is created, unzip it and check those files
with gerbv.
For a system of boards that plug into each I might panelize them
Check the gerbers and drill files using gerbv.
I use a script that zips and renames all the files for the fab house.
I take the zip file that is created, unzip it and check those files
with gerbv.
For a system of boards that plug into each I might panelize them
so that they all al
DJ Delorie wrote:
Print out your surface copper layers and put the parts on the printout
to make sure they match.
that's a really good idea, thanks! It'll delay things some, but yeah,
sounds like the conservative way to go. I'll have to order up a bunch
of parts to make it happen but that's
Print out your surface copper layers and put the parts on the printout
to make sure they match.
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After a very long time, I am just about ready to send out 3 different
boards for fab. I would appreciate any advice to improve my chances of
success. So far here's what has been done:
1. Run DRC on all PCBs with no issues..
2. Checked schematics.
3. Checked schematic matches layout.
4. In pro
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