Re: [j-nsp] Mixing v4/v6 neighbors in BGP groups

2018-07-01 Thread Sebastian Becker
Hi Rob, We keep the configs separate per address-family. — Sebastian Becker ___ juniper-nsp mailing list juniper-nsp@puck.nether.net https://puck.nether.net/mailman/listinfo/juniper-nsp

Re: [j-nsp] MX480

2018-06-19 Thread Sebastian Becker
Right, got the message just some minutes ago: JUNOS 16.1R7.7 has deployed https://www.juniper.net/techpubs/en_US/junos16.1/information-products/topic-collections/release-notes/16.1/index.html — Sebastian Becker > Am 18.06.2018 um 16:33 schrieb Sebastian Wiesinger : > > * Vince

Re: [j-nsp] MX480

2018-06-17 Thread Sebastian Becker
The ETA for GA was 31-MAY-2018. So hopefully only a matter of days. — Sebastian Becker > Am 17.06.2018 um 23:11 schrieb craig washington > : > > It's not released yet as far as I know. > I know it was supposed to be at least per our SE at Juniper. > Hopefully will h

Re: [j-nsp] MX480

2018-06-17 Thread Sebastian Becker
16.1R7 is a golden release. — Sebastian Becker > Am 16.06.2018 um 19:49 schrieb Chris Hale : > > Wait for a golden release, ask JTAC about the next golden release coming > out. Maybe 17.3R2 or R3. They will be highly tested and classified as very > safe for production

Re: [j-nsp] MX480

2018-06-16 Thread Sebastian Becker
16.1R4 is deployed in the moment. 16.1R7 is a recommendation from Juniper to us. — Sebastian Becker s...@lab.dtag.de > Am 16.06.2018 um 13:33 schrieb Ian Goodall : > > > Hi All > > Were looking to upgrade JUNOS on some of our older PE MX480/960 running pre > 15 code. We&

Re: [j-nsp] Upgrading from RE-S-2000-4096-S/SCB-MX960-S to RE-S-1800X4-32G-S/SCBE2-MX-S

2018-01-17 Thread Sebastian Becker
thing is that you have the old SBE and RE for any fallback almost untouched at the side. — Sebastian Becker s...@lab.dtag.de > Am 17.01.2018 um 11:15 schrieb James Bensley : > > On 17 January 2018 at 09:32, Niall Donaghy wrote: >> Hi Craig, >> >> Indeed Misak's r

Re: [j-nsp] [c-nsp] Meltdown and Spectre

2018-01-09 Thread Sebastian Becker
use with the next software update a fixed version. But we have no need to hurry are any reason for panic. — Sebastian Becker s...@lab.dtag.de > Am 08.01.2018 um 18:11 schrieb Chuck Anderson : > > > Umm, you type the password into the box, right? The box stores that password &g

Re: [j-nsp] [c-nsp] Meltdown and Spectre

2018-01-08 Thread Sebastian Becker
boxes simply do not run other code than that what is delivered by the vendors. — Sebastian Becker s...@lab.dtag.de > Am 08.01.2018 um 09:32 schrieb Thilo Bangert : > > Den 06-01-2018 kl. 19:49 skrev Sebastian Becker: >> Same here. User that have access are implicit trusted. &

Re: [j-nsp] [c-nsp] Meltdown and Spectre

2018-01-06 Thread Sebastian Becker
Same here. User that have access are implicit trusted. So no need for panic. — Sebastian Becker s...@lab.dtag.de > Am 06.01.2018 um 12:58 schrieb Gert Doering : > > Hi, > > On Sat, Jan 06, 2018 at 12:04:22PM +0100, james list wrote: >> For cve related to Meltdown and Spe

Re: [j-nsp] Poll Question (VRF scale on MX)

2017-12-21 Thread Sebastian Becker
given values are single scaled. So make sure you test that in a multiscale enviroment. — Sebastian Becker s...@lab.dtag.de > Am 21.12.2017 um 13:24 schrieb Jason Lixfeld : > > Hey there, > > General question - MX204-IR, for example, claims no RIB/FIB scale > restrictions. W

Re: [j-nsp] Experience with Junos 15.1 on MX960?

2017-12-12 Thread Sebastian Becker
I recommend Junos 16.1R4 as minimum. They have done some improvements to the software quality. We are on 16.1R4-S6.3 and it looks good so far. — Sebastian Becker > Am 12.12.2017 um 10:52 schrieb Karl Gerhard : > > > Hello > > we've had very bad experience with Jun

Re: [j-nsp] Enhanced MX480 Midplane?

2017-12-11 Thread Sebastian Becker
Yes, this is true for the MX960. — Sebastian Becker s...@lab.dtag.de > Am 09.12.2017 um 18:34 schrieb Aaron Gould : > > > Is this true about MX960? Does it have a midplane also ? > > -Aaron > > ___ juniper-nsp

Re: [j-nsp] Enhanced MX480 Midplane?

2017-12-08 Thread Sebastian Becker
480G - now 340G So even the MPC7-10G will have a performace penalty on both midplanes in the redundancy mode. — Sebastian Becker > Am 17.11.2017 um 17:38 schrieb Eduard Schornig : > > Hi, > > Sebastian is correct, MPC7-MRATE has a performance penalty on old &g

Re: [j-nsp] Enhanced MX480 Midplane?

2017-11-16 Thread Sebastian Becker
Hi Tobias, this is the information out of the "Juniper Tech Club" in Cologne in June 2016. So not only provided to us. If needed I can verify that with Juniper. — Sebastian Becker > Am 15.11.2017 um 16:07 schrieb Tobias Heister : > > > Hi, > > Am 15.11.201

Re: [j-nsp] Enhanced MX480 Midplane?

2017-11-15 Thread Sebastian Becker
redundant switching fabric so we have to calculate with these limitations. — Sebastian Becker > Am 14.11.2017 um 23:35 schrieb Tobias Heister : > > > Hi, > > Am 14.11.2017 um 13:27 schrieb Sebastian Becker: >> The enhanced midplane allows you already to use higher bandwidt

Re: [j-nsp] Enhanced MX480 Midplane?

2017-11-14 Thread Sebastian Becker
. Same for the MPC5E-40G10G and the Q-Versions of these cards. Otherwise you overbook the midplane. — Sebastian Becker > Am 14.11.2017 um 11:38 schrieb Olivier Benghozi : > > > While I don't care about SONET/SDH in 2017 (sorry...), the enhanced midplane > (in the MX240/4

Re: [j-nsp] ACX5048 - 40 gbps ER 40 km optic

2017-10-04 Thread Sebastian Becker
Look at the receive power … there’s no light. Cable??? Juniper may has to update their support matrix then if they support that optic in this box! ;-) Tell them! — Sebastian Becker s...@lab.dtag.de > Am 04.10.2017 um 16:00 schrieb Aaron Gould : > > Lane 0 >Laser

Re: [j-nsp] ACX5048 - 40 gbps ER 40 km optic

2017-10-04 Thread Sebastian Becker
topics/reference/specifications/transceiver-t1600-t640-40gbase-optical-specifications.html#jd0e389 <https://www.juniper.net/documentation/en_US/release-independent/junos/topics/reference/specifications/transceiver-t1600-t640-40gbase-optical-specifications.html#jd0e389> — Seba

Re: [j-nsp] MX480 MS-MPC-128G CHASSISD_SNMP_TRAP10 jnxFruOfflineReason 8 but no button press

2017-02-08 Thread Sebastian Becker
Hi Dave, We had such an issue with the PTX and it turned out they had some bad quality of the buttons so that the normal shaking from the fan trays can lead to a button press. You need to go to the JTAC for further investigation. -- Sebastian Becker s...@lab.dtag.de > Am 08.02.2017 um 22

Re: [j-nsp] RE-S-X6-64G & ISSU?

2016-11-14 Thread Sebastian Becker
Hi Aaron, but this is almost the other way round as you need another box where the virtual machine will run that steers both chassis. Running the master vm one one of the chassis will give you no additional redundancy at all. -- Sebastian Becker s...@lab.dtag.de > Am 14.11.2016 um 16

Re: [j-nsp] RE-S-X6-64G & ISSU?

2016-11-11 Thread Sebastian Becker
Same here. Clearly the new RE will help (how good is still in evaluation) in software issues but failing hardware is not covered so there is still the need for a dual RE setup. -- Sebastian Becker s...@lab.dtag.de > Am 11.11.2016 um 07:44 schrieb Mark Tinka : > > > > >

Re: [j-nsp] Junos to IOS translation

2016-06-06 Thread Sebastian Becker
Be aware that this is not like translating word by word to get the same functionality. The same will apply if you compare Google Translator against a real studied translator in person. -- Sebastian Becker s...@lab.dtag.de > Am 05.06.2016 um 17:51 schrieb Mark Tinka : > > > >

Re: [j-nsp] EX4600: Splitting up one QSFP+ port into four SFP+ ports?

2016-03-19 Thread Sebastian Becker
Same here … -- Sebastian Becker s...@lab.dtag.de > Am 18.03.2016 um 16:58 schrieb Jared Mauch : > > We’ve seen varying quality of the MPO breakout cables where some > lanes/channels are 2dB or more weaker based on vendor when connected to the > QSFP-40G-PLR4 style optic

Re: [j-nsp] Optimizing the FIB on MX

2016-02-18 Thread Sebastian Becker
Hi Ytti, I meant 9001 to 9010 and mx104 to mx240. cpu to cpu works, but than there is the software you mentioned. Back to Juniper. ;-) -- Sebastian Becker s...@lab.dtag.de > Am 18.02.2016 um 16:39 schrieb Saku Ytti : > > > On 18 February 2016 at 17:29, Sebastian Becker wro

Re: [j-nsp] Optimizing the FIB on MX

2016-02-18 Thread Sebastian Becker
/9010 have a different cpu architecture as MX104 and MX240/480/960 the comparison is not easy just by the type of the cpu itself. -- Sebastian Becker s...@lab.dtag.de > Am 18.02.2016 um 16:06 schrieb Saku Ytti : > > > On 18 February 2016 at 16:21, Colton Conor wrote: >