When we know that we're running inside of a KVM guest, we don't have to
worry about synchronizing timebases between different CPUs, since the
host already took care of that.
This fixes CPU overcommit scenarios where vCPUs could hang forever trying
to sync each other while not being scheduled.
Rep
From: Scott Wood
This gives us a place to put load/put actions that correspond to
code that is booke-specific but not specific to a particular core.
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/44x.c |3 +++
arch/powerpc/kvm/booke.c |8
arch/
From: Scott Wood
Keeping two separate headers for e500-specific things was a
pain, and wasn't even organized along any logical boundary.
There was TLB stuff in despite the existence of
arch/powerpc/kvm/e500_tlb.h, and nothing in needed
to be referenced from outside arch/powerpc/kvm.
Signed-of
This is Scott's e500mc RFC patch set rebased, berobbed of its pt_regs
parts and fixed for bisectability. On top of them, I addressed all the
comments that I had on the code and that came up in his code as FIXMEs.
I verified that this patch set works just fine on e500mc and doesn't
break e500v2, so
From: Scott Wood
The PID handling is e500v1/v2-specific, and is moved to e500.c.
The MMU sregs code and kvmppc_core_vcpu_translate will be shared with
e500mc, and is moved from e500.c to e500_tlb.c.
Partially based on patches from Liu Yu .
Signed-off-by: Scott Wood
[agraf: fix bisectability]
From: Scott Wood
This is in preparation for merging in the contents of
arch/powerpc/include/asm/kvm_e500.h.
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/e500.c |2 +-
arch/powerpc/kvm/{e500_tlb.h => e500.h} |6 +++---
arch/powerpc/kvm/e5
From: Scott Wood
We'll use it on e500mc as well.
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/include/asm/kvm_book3s.h |3 ++
arch/powerpc/include/asm/kvm_booke.h |3 ++
arch/powerpc/include/asm/kvm_ppc.h|5
arch/powerpc/kvm/book3s_64_mmu_hv.c
From: Scott Wood
Move vcpu to the beginning of vcpu_e500 to give it appropriate
prominence, especially if more fields end up getting added to the
end of vcpu_e500 (and vcpu ends up in the middle).
Remove gratuitous "extern" and add parameter names to prototypes.
Signed-off-by: Scott Wood
[agra
From: Scott Wood
e500mc will want to do lpid allocation/deallocation here.
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/44x.c |9 +
arch/powerpc/kvm/booke.c |9 -
arch/powerpc/kvm/e500.c |9 +
3 files changed, 18 insertion
From: Scott Wood
tlbilx is the new, preferred invalidation instruction. It is not
found on e500 prior to e500mc, but there should be no harm in
supporting it on all e500.
Based on code from Ashish Kalra .
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/e500.h
From: Scott Wood
DO_KVM will need to identify the particular exception type.
There is an existing set of arbitrary numbers that Linux passes,
but it's an undocumented mess that sort of corresponds to server/classic
exception vectors but not really.
Signed-off-by: Scott Wood
Signed-off-by: Alex
When setting MSR for an e500mc guest, we implicitly always set MSR_GS
to make sure the guest is in guest state. Since we have this implicit
rule there, we don't need to explicitly pass MSR_GS to set_msr().
Remove all explicit setters of MSR_GS.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm
When one vcpu wants to kick another, it can issue a special IPI instruction
called msgsnd. This patch emulates this instruction, its clearing counterpart
and the infrastructure required to actually trigger that interrupt inside
a guest vcpu.
With this patch, SMP guests on e500mc work.
Signed-off-
Instead of checking whether we should reschedule only when we exited
due to an interrupt, let's always check before entering the guest back
again. This gets the target more in line with the other archs.
Also while at it, generalize the whole thing so that eventually we could
have a single kvmppc_p
When using exit timing stats, we clobber r9 in the NEED_EMU case,
so better move that part down a few lines and fix it that way.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/bookehv_interrupts.S |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/kv
The semantics of BOOKE_IRQPRIO_MAX changed to denote the highest available
irqprio + 1, so let's reflect that in the code too.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/booke.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powe
The CONFIG_KVM_E500 option really indicates that we're running on a V2 machine,
not on a machine of the generic E500 class. So indicate that properly and
change the config name accordingly.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/Kconfig|8
arch/powerpc/kvm/Makefile
Instead if doing
#ifndef CONFIG_64BIT
...
#else
...
#endif
we should rather do
#ifdef CONFIG_64BIT
...
#else
...
#endif
which is a lot easier to read. Change the bookehv implementation to
stick with this rule.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/bookehv_int
The SET_VCPU macro is a leftover from times when the vcpu struct wasn't
stored in the thread on vcpu_load/put. It's not needed anymore. Remove it.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/bookehv_interrupts.S |8
1 files changed, 0 insertions(+), 8 deletions(-)
diff --git
From: Scott Wood
Add processor support for e500mc, using hardware virtualization support
(GS-mode).
Current issues include:
- No support for external proxy (coreint) interrupt mode in the guest.
Includes work by Ashish Kalra ,
Varun Sethi , and
Liu Yu .
Signed-off-by: Scott Wood
Signed-off-b
From: Scott Wood
Chips such as e500mc that implement category E.HV in Power ISA 2.06
provide hardware virtualization features, including a new MSR mode for
guest state. The guest OS can perform many operations without trapping
into the hypervisor, including transitions to and from guest userspac
When during guest execution we get a machine check interrupt, we don't
know how to handle it yet. So let's add the error printing code back
again that we dropped accidently earlier and tell user space that something
went really wrong.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/booke.c |
We need to make sure that no MAS updates happen automatically while we
have the guest MAS registers loaded. So move the disabling code a bit
higher up so that it covers the full time we have guest values in MAS
registers.
The race this patch fixes should never occur, but it makes the code a
bit mo
From: Scott Wood
Split e500 (v1/v2) and e500mc/e5500 to allow optimization of feature
checks that differ between the two.
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/include/asm/cputable.h | 12
1 files changed, 8 insertions(+), 4 deletions(-)
diff
The comment for program interrupts triggered when using bookehv was
misleading. Update it to mention why MSR_GS indicates that we have
to inject an interrupt into the guest again, not emulate it.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/booke.c | 10 --
1 files changed, 8 ins
For BookE HV the guest visible MSR is shared->msr and is identical to
the MSR that is in use while the guest is running, because we can't trap
reads from/to MSR.
So shadow_msr is unused there. Indicate that with a comment.
Signed-off-by: Alexander Graf
---
arch/powerpc/include/asm/kvm_host.h |
When reinjecting an interrupt into the host interrupt handler after we're
back in host kernel land, we need to tell the kernel where the interrupt
happened. We can't tell it that we were in guest state, because that might
lead to random code walking host addresses. So instead, we tell it that
we ca
There was some unused code in the exit code path that must have been
a leftover from earlier iterations. While it did no harm, it's superfluous
and thus should be removed.
Signed-off-by: Alexander Graf
---
v2 -> v3:
- fix commit message
- also remove "lwzr9, VCPU_KVM(r4)" which was as
When during guest context we get a performance monitor interrupt, we
currently bail out and oops. Let's route it to its correct handler
instead.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/booke.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm
The tlbncfg registers should be populated with their respective TLB's
values. Fix the obvious typo.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/e500_tlb.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kvm/e500_tlb.c b/arch/powerpc/kvm/e500_tlb.c
When we get a performance monitor interrupt, we need to make sure that
the host receives it. So reinject it like we reinject the other host
destined interrupts.
Signed-off-by: Alexander Graf
---
v2 -> v3:
- call regs sync directly
---
arch/powerpc/include/asm/hw_irq.h |1 +
arch/powerpc
So far, we've always called prepare_to_enter even when all we did was return
to the host. This patch changes that semantic to only call prepare_to_enter
when we actually want to get back into the guest.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/booke.c | 18 ++
1 files
If we hit any exception whatsoever in the restore path and r1/r2 aren't the
host registers, we don't get a working oops. So it's always a good idea to
restore them as early as possible.
This time, it actually has practical reasons to do so too, since we need to
have the host page fault handler fix
We can't run e500v2 kvm on e500mc kernels, so indicate that by
making the 2 options mutually exclusive in kconfig.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/Kconfig |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kcon
From: Scott Wood
e500mc has a normal PPC FPU, rather than SPE which is found
on e500v1/v2.
Based on code from Liu Yu .
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/include/asm/system.h |1 +
arch/powerpc/kvm/booke.c | 44
From: Scott Wood
Rather than invalidate everything when a TLB1 entry needs to be
taken down, keep track of which host TLB1 entries are used for
a given guest TLB1 entry, and invalidate just those entries.
Based on code from Ashish Kalra
and Liu Yu .
Signed-off-by: Scott Wood
Signed-off-by: Al
When we fail to emulate an instruction for the guest, we better go in and
tell it that we failed to emulate it, by throwing an illegal instruction
exception.
Please beware that we basically never get around to telling the guest that
we failed thanks to the debugging code right above it. If user sp
The e500mc patches left some debug code in that we don't need. Remove it.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/booke.c |5 -
1 files changed, 0 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 9fcc760..17d5318 100644
---
There's always a chance we're unable to read a guest instruction. The guest
could have its TLB mapped execute-, but not readable, something odd happens
and our TLB gets flushed. So it's a good idea to be prepared for that case
and have a fallback that allows us to fix things up in that case.
Add f
From: Scott Wood
Currently 32-bit only cares about this for choice of exception
vector, which is done in core-specific code. However, KVM will
want to distinguish as well.
Signed-off-by: Scott Wood
Signed-off-by: Alexander Graf
---
arch/powerpc/include/asm/cputable.h |5 +++--
1 files ch
On 02/28/2012 05:03 AM, Alexander Graf wrote:
>
> On 27.02.2012, at 20:28, Scott Wood wrote:
>
>> If there is a signal pending and MSR[WE] is set, we'll loop forever
>> without reaching this check.
>
> Good point. How about something like this on top (will fold in later)?
>
> diff --git a/arch/
On 27.02.2012, at 20:28, Scott Wood wrote:
> On 02/24/2012 08:26 AM, Alexander Graf wrote:
>> -void kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
>> +int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
>> {
>> unsigned long *pending = &vcpu->arch.pending_exceptions;
>> unsigne
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