On Wed, 2016-12-14 at 20:26 +0200, Marcel Apfelbaum wrote:
> > > The Root complex includes the PCI bus, some configuration
> > > registers if
> > > needed, provides access to the configuration space, translates
> > > relevant CPU
> > > reads/writes to PCI(e) transactions...
> >
> > Do those config
On Tue, 2016-12-13 at 14:25 +0200, Marcel Apfelbaum wrote:
> > > Hrm, the suggestion of providing both a vanilla-PCI and PCI-E host
> > > bridge came up before. I think one of us spotted a problem with that,
> > > but I don't recall what it was now. I guess one is how libvirt would
> > > map it's
On Fri, 2016-12-02 at 16:50 +1100, David Gibson wrote:
>
> Uh.. I don't entirely follow you. From the host point of view there
> are multiple iommu groups (PEs), but from the guest point of view
> there's only one. On the guest side iommu granularity is always
> per-vPHB.
Ok so the H_PUT_TCE ca
On Fri, 2016-12-02 at 15:18 +1100, David Gibson wrote:
> But if you pass through multiple groups, things get weird. On q35,
> you'd generally expect physically separate (different slot) devices to
> appear under separate root complexes. Whereas on pseries they'll
> appear as siblings on a virtual
