Oh Sorry I misunderstood, you are right.
After checking Ampere is "0xc0"
I will correct it in v2.
https://llvm.org/doxygen/Host_8cpp_source.html
Thanks again.
On Fri, Sep 23, 2022 at 9:17 PM Martin Kletzander wrote:
>
> On Fri, Sep 23, 2022 at 06:35:52PM +0800, Zhenyu Zhang wrote:
> >Of course
On Fri, Sep 23, 2022 at 06:35:52PM +0800, Zhenyu Zhang wrote:
Of course, you can check Neoverse N1 core "0xd0c" from the link
below. Also do you think I should add the values for neoverse n2
and v1 at the same time?
Might just as well.
https://developer.arm.com/documentation/100616/0301/regi
Of course, you can check Neoverse N1 core "0xd0c" from the link
below. Also do you think I should add the values for neoverse n2
and v1 at the same time?
https://developer.arm.com/documentation/100616/0301/register-descriptions/aarch64-system-registers/midr-el1--main-id-register--el1
On Tue, Sep
On Tue, Sep 13, 2022 at 10:10:02PM -0400, Zhenyu Zhang wrote:
Add Neoverse-N1 as a supported cpu model.
I would like to review this patch, but I could not find the vendor ID in
any official documentation. I know I am bad at searching, but the only
thing I could find was that Ampere vendor use
Add Neoverse-N1 as a supported cpu model.
Signed-off-by: Zhang Zhenyu
---
src/cpu_map/arm_neoverse-n1.xml | 6 ++
src/cpu_map/arm_vendors.xml | 1 +
src/cpu_map/index.xml | 3 +++
src/cpu_map/meson.build | 1 +
4 files changed, 11 insertions(+)
create mode 100644 src/c
From: root
Add Neoverse-N1 as a supported cpu model.
Signed-off-by: root
---
src/cpu_map/arm_neoverse-n1.xml | 6 ++
src/cpu_map/arm_vendors.xml | 1 +
src/cpu_map/index.xml | 3 +++
src/cpu_map/meson.build | 1 +
4 files changed, 11 insertions(+)
create mode 100644
From: root
Add Neoverse-N1 as a supported cpu model.
Signed-off-by: root
---
src/cpu_map/arm_neoverse-n1.xml | 6 ++
src/cpu_map/arm_vendors.xml | 1 +
src/cpu_map/index.xml | 3 +++
src/cpu_map/meson.build | 1 +
4 files changed, 11 insertions(+)
create mode 100644
