> -Original Message-
> From: Peter Krempa [mailto:pkre...@redhat.com]
> Sent: Thursday, May 12, 2016 4:31 PM
> To: Ren, Qiaowei
> Cc: libvir-list@redhat.com; berra...@redhat.com
> Subject: Re: [libvirt] [PATCH 1/1] perf: add support to perf event for MBM
>
> On
On Thu, May 12, 2016 at 14:55:16 +0800, Qiaowei Ren wrote:
> Some Intel processor families (e.g. the Intel Xeon processor E5 v3
> family) introduced some RDT (Resource Director Technology) features
> to monitor or control shared resource. Among these features, MBM
> (Memory Bandwidth Monitoring), w
Some Intel processor families (e.g. the Intel Xeon processor E5 v3
family) introduced some RDT (Resource Director Technology) features
to monitor or control shared resource. Among these features, MBM
(Memory Bandwidth Monitoring), which is build on the CMT (Cache
Monitoring Technology) infrastructu
On Wed, May 11, 2016 at 17:09:01 +0800, Qiaowei Ren wrote:
> MBM (Memory Bandwidth Monitoring) is a new feature introduced in some
> Intel processor families. MBM is build on the CMT (Cache Monitoring
> Technology) infrastructure to allow monitoring of bandwidth from one
> level of the cache hierar
MBM (Memory Bandwidth Monitoring) is a new feature introduced in some
Intel processor families. MBM is build on the CMT (Cache Monitoring
Technology) infrastructure to allow monitoring of bandwidth from one
level of the cache hierarchy to the next. With current perf framework,
this patch adds suppo
