Re: [libvirt] [PATCH 4/5] conf: include x86 microcode version in virsh capabilities

2018-01-04 Thread Jiri Denemark
On Thu, Jan 04, 2018 at 16:25:49 +0100, Peter Krempa wrote: > On Thu, Jan 04, 2018 at 15:58:11 +0100, Jiri Denemark wrote: > > From: Paolo Bonzini > > > > A microcode update can cause the CPUID bits to change; an example > > from the past was the update that disabled TSX on several Haswell and >

Re: [libvirt] [PATCH 4/5] conf: include x86 microcode version in virsh capabilities

2018-01-04 Thread Peter Krempa
On Thu, Jan 04, 2018 at 15:58:11 +0100, Jiri Denemark wrote: > From: Paolo Bonzini > > A microcode update can cause the CPUID bits to change; an example > from the past was the update that disabled TSX on several Haswell and > Broadwell machines. > > In order to track the x86 microcode version i

[libvirt] [PATCH 4/5] conf: include x86 microcode version in virsh capabilities

2018-01-04 Thread Jiri Denemark
From: Paolo Bonzini A microcode update can cause the CPUID bits to change; an example from the past was the update that disabled TSX on several Haswell and Broadwell machines. In order to track the x86 microcode version in the QEMU capabilities, we have to fetch it and store it in the host CPU.