The code to write the ADMA descriptor into memory is repeated several
times throughout sdhci_adma_table_pre, and thus should be moved into a
common function. This will also be useful if the patch to make the write
more efficient is accepted.
Signed-off-by: Ben Dooks
---
drivers/mmc/host/sdhci.c
The sdhci_set_adma_desc is using byte-writes to write data in a specified
order into memory. Change to using __le16 for the two byte and __le32 for
the four byte cases and use the cpu_to_{le16,le32} to do the conversion
before writing.
This will reduce the size of the code and the number of writes
ADMA code cleanps for SDHCI driver. Makes the code shorter and more efficient.
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On Thu, Jan 28, 2010 at 10:50:38AM +0900, Thomas Abraham wrote:
> This patch enables ADMA feature in S3C SDHCI controller driver. This patch
> depends on the following patch.
>
> [PATCH] sdhci: Add new quirk in sdhci driver and update ADMA descriptor build.
>
> Signed-off-by: Thomas Abraham
Acke
On Thu, Jan 28, 2010 at 10:50:22AM +0900, Thomas Abraham wrote:
> The s3c6410 sdhci controller does not support the 'End' attribute and
> NOP attribute in the same 8-Byte ADMA descriptor. This patch adds a
> new quirk to identify sdhci host contollers with such behaviour.
> In addition to this, for
This patch enables ADMA feature in S3C SDHCI controller driver. This patch
depends on the following patch.
[PATCH] sdhci: Add new quirk in sdhci driver and update ADMA descriptor build.
Signed-off-by: Thomas Abraham
---
drivers/mmc/host/sdhci-s3c.c |7 +--
1 files changed, 1 insertions(
The s3c6410 sdhci controller does not support the 'End' attribute and
NOP attribute in the same 8-Byte ADMA descriptor. This patch adds a
new quirk to identify sdhci host contollers with such behaviour.
In addition to this, for controllers using the new quirk, the last
entry in the ADMA descritor t
The patch titled
sdio: add quirk to clamp byte mode transfer
has been added to the -mm tree. Its filename is
sdio-add-quirk-to-clamp-byte-mode-transfer.patch
Before you just go and hit "reply", please:
a) Consider who else should be cc'ed
b) Prefer to cc a suitable mailing list a
Just to be clear, my post was in response to the reported problems
with enabling sdio irqs with this patch:
http://patchwork.kernel.org/patch/69122/
The patch originator reported good results but others reported
complete failure. My hack fixed the problem for me. I believe this
much more modest
It is hard to comment on what is happening here without a patch. Is it a
performance issue or that SDIO functionality failure with PM enabled?
The MMC controller supports wakeup capability on the dat1 line using a GPIO
for a SDIO interrupt. I guess that should help.
Regards,
Madhu
> -Origina
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