On some Samsung SoCs not all SDHCI controllers have card detect (CD)
line. For some embedded designs it is not even needed, because ususally
the device (like SDIO flash memory or wifi controller) is permanently
wired to the controller. There are also systems which have a card detect
line connected
S3C SDHCI host controller can change the source for generating mmc clock.
By default host bus clock is used, what causes some problems on machines
with 133MHz bus, because the SDHCI divider cannot be as high get proper
clock value for identification mode. This is not a problem for the
controller, b
Signed-off-by: Marek Szyprowski
Signed-off-by: Kyungmin Park
---
drivers/mmc/host/sdhci-s3c.c | 20
1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
index af21792..ad30f07 100644
--- a/drivers/mmc/h
Hello,
This series includes various fixes to sdhci-s3c driver as well as a
major feature enhancement. This patch series is prepared to get complete
sdhci support on Samsung Aquila board.
A quick overview on the patches:
#1 - add missing sdhci_s3c_driver_remove() function
#2 - introduce new sdhci
This patch add support for SDHCI blocks on Samsung Aquila board. The
following host controllers are defined:
1. Internal MoviNAND device (permanently wired to the controller)
2. Internal WiFI SDIO device (card is activated by power regualor)
3. External MMC/SD socket (card detection is provided by
On some Samsung SoCs not all SDHCI controllers have card detect (CD)
line. For some embedded designs it is not even needed, because ususally
the device (like SDIO flash memory or wifi controller) is permanently
wired to the controller. There are also systems which have a card detect
line connected
Hello,
This series includes various fixes to sdhci-s3c driver as well as a
major feature enhancement. This patch series is prepared to get complete
sdhci support on Samsung Aquila board.
A quick overview on the patches:
#1 - add support for various methods of notifying the host driver about
Deal all,
Now I got test the btrfs with discard option on MMC (implemented
discard request).
but I can't test the iozone benchmark test program with I/O error.
Of course I disabled the discard option. it works well. and discard
handling is tested with VFAT well.
So I think BTRFS discard request s
The patch titled
sdhci: 8-bit data transfer width support
has been added to the -mm tree. Its filename is
sdhci-8-bit-data-transfer-width-support.patch
Before you just go and hit "reply", please:
a) Consider who else should be cc'ed
b) Prefer to cc a suitable mailing list as well
The patch titled
sdhci: don't assign mmc->caps at SDHCI directly
has been added to the -mm tree. Its filename is
sdhci-dont-assign-mmc-caps-at-sdhci-directly.patch
Before you just go and hit "reply", please:
a) Consider who else should be cc'ed
b) Prefer to cc a suitable mailing
The patch titled
sdhci: remove useless set_clock() check
has been added to the -mm tree. Its filename is
sdhci-remove-useless-set_clock-check.patch
Before you just go and hit "reply", please:
a) Consider who else should be cc'ed
b) Prefer to cc a suitable mailing list as well
On Tue, Jun 15, 2010 at 08:27:48PM +0900, Kukjin Kim wrote:
> From: Lee Hyuk
>
> S5PV210 HSMMC host controller doesn't have the WP pin which should be
> connnected with SDMMC card WP pin. So if there are the cfg_wp and get_ro
> in pdata, configure the WP pin and replace get_ro function in sdhci w
On Tue, Jun 15, 2010 at 08:27:46PM +0900, Kukjin Kim wrote:
> From: Lee Hyuk
>
> This patch adds the members of platdata which are cfg_wp and get_ro.
> The cfg_wp is the function for setting the specific GPIO for WP pin
> and get_ro is the function for getting data from the assigned GPIO.
Why no
On Tue, Jun 15, 2010 at 08:27:47PM +0900, Kukjin Kim wrote:
> From: Lee Hyuk
>
> S5PV210 HSMMC host controller doesn't have the Write Protection pin which
> should be connnected with SDMMC card WP pin. So allocated a GPIO in order to
> get the data from SDMMC card WP pin with EXT_INT and implemen
Op 15-06-10 13:27, Kukjin Kim schreef:
> From: Lee Hyuk
>
> S5PV210 HSMMC host controller doesn't have the Write Protection pin which
> should be connnected with SDMMC card WP pin. So allocated a GPIO in order to
> get the data from SDMMC card WP pin with EXT_INT and implement get_ro and
> cfg_wp
On Tue, Jun 15, 2010 at 8:27 PM, Kukjin Kim wrote:
> From: Lee Hyuk
>
> S5PV210 HSMMC host controller doesn't have the Write Protection pin which
> should be connnected with SDMMC card WP pin. So allocated a GPIO in order to
> get the data from SDMMC card WP pin with EXT_INT and implement get_ro
From: Lee Hyuk
S5PV210 HSMMC host controller doesn't have the WP pin which should be
connnected with SDMMC card WP pin. So if there are the cfg_wp and get_ro
in pdata, configure the WP pin and replace get_ro function in sdhci with
get_ro function in pdata.
Signed-off-by: Hyuk Lee
Signed-off-by:
From: Lee Hyuk
S5PV210 HSMMC host controller doesn't have the Write Protection pin which
should be connnected with SDMMC card WP pin. So allocated a GPIO in order to
get the data from SDMMC card WP pin with EXT_INT and implement get_ro and
cfg_wp function.
Signed-off-by: Hyuk Lee
Signed-off-by:
From: Lee Hyuk
This patch adds the members of platdata which are cfg_wp and get_ro.
The cfg_wp is the function for setting the specific GPIO for WP pin
and get_ro is the function for getting data from the assigned GPIO.
Signed-off-by: Hyuk Lee
Signed-off-by: Kukjin Kim
---
arch/arm/plat-samsu
This patch adds support SDMMC write protection pin on SMDKV210.
Note: Depends on following patch set
[PATCH 1/2] ARM: SAMSUNG: Add device definition for HSMMC3
[PATCH 2/2 RE-SEND] ARM: S5PV210: Add support HSMMC on Samsung SMDKV210
And this patch set includes the following patches:
[PATCH 1/3]
From: Kishore Kadiyala
This patch improves low speeds for SD cards.
OMAP-MMC controller's can support maximum bus width of '8'.
when bus width is mentioned as "8" in controller data,the SD
stack will check whether bus width is "4" and if not it will
set bus width to "1" and there by degrading per
Sorry its Line wrapped and please drop this, Will be reposting the same.
Regards,
Kishore
On Mon, Jun 14, 2010 at 9:40 PM, kishore kadiyala
wrote:
> This patch improves low speeds for SD cards.
> OMAP-MMC controller's can support maximum bus width of '8'.
> when bus width is mentioned as "8" in
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