Hi Philip,
> -Original Message-
> From: Philip Rakity [mailto:prak...@marvell.com]
> Sent: Saturday, March 05, 2011 10:27 AM
> To: Nath, Arindam
> Cc: c...@laptop.org; zhangfei@gmail.com; subha...@codeaurora.org;
> linux-mmc@vger.kernel.org; Su, Henry; Lu, Aaron; anath@gmail.com
>
On Mar 4, 2011, at 3:32 AM, Arindam Nath wrote:
> As per Host Controller spec v3.00, we reset SDCLK before setting
> High Speed Enable, and then set it back to avoid generating clock
> gliches.
>
> Signed-off-by: Arindam Nath
> ---
> drivers/mmc/host/sdhci.c | 25 ++---
> 1
Split-up accesses into smaller chunks, to improve
lifespan, by using 8K reliable writes into 8K Buffer A,
instead of 4MB Buffer B, reducing number of 4MB write-erase
cycles. Upper and lower bounds should be experimentally
found to match the desired performance/reliability
characteristics.
Signed-o
Lets a card specific quirk affect how MMC requests are made.
Necessary for Toshiba block-splitting part reliability workaround.
Signed-off-by: Andrei Warkentin
---
drivers/mmc/card/blk.h |9 ++---
drivers/mmc/card/block-quirks.c |5 ++---
drivers/mmc/card/block.c|
These cards show abysmal write performance when
writes < 12K that are 8K unaligned cross an 8K barrier.
Signed-off-by: Andrei Warkentin
---
drivers/mmc/card/Kconfig|8
drivers/mmc/card/block-quirks.c | 22 ++
2 files changed, 30 insertions(+), 0 deletio
Quirks are card-specific workarounds. Usually they involve
tuning mmcblk parameters at mmc_blk_probe time.
Signed-off-by: Andrei Warkentin
---
drivers/mmc/card/Kconfig|7
drivers/mmc/card/Makefile |1 +
drivers/mmc/card/blk.h | 70 +++
Adjust unaligned write accesses spanning preferred align
size into two accesses - an unaligned and an aligned access.
This is meant to be used for card quirks, and is off
by default. A limiting value in transfer size
for this adjustment is available, as on some cards there is a
perf decrease for la
This is a second version of the patch set that adds MMC block
quirks as well as two workarounds for Toshiba 32nm part issues.
It incorporates feedback from Arnd.
Table of Contents:
[[RFC] 1/5] MMC: Adjust unaligned write accesses.
[[RFC] 2/5] MMC: Add block quirks support.
[[RFC] 3/5] MMC: Toshib
Hi Philip,
> -Original Message-
> From: Philip Rakity [mailto:prak...@marvell.com]
> Sent: Saturday, March 05, 2011 12:04 AM
> To: Nath, Arindam
> Cc: c...@laptop.org; zhangfei@gmail.com; subha...@codeaurora.org;
> linux-mmc@vger.kernel.org; Su, Henry; Lu, Aaron; anath@gmail.com
>
Hi Philip,
> -Original Message-
> From: Philip Rakity [mailto:prak...@marvell.com]
> Sent: Friday, March 04, 2011 11:58 PM
> To: Nath, Arindam
> Cc: c...@laptop.org; zhangfei@gmail.com; subha...@codeaurora.org;
> linux-mmc@vger.kernel.org; Su, Henry; Lu, Aaron; anath@gmail.com
> S
On Mar 4, 2011, at 3:32 AM, Arindam Nath wrote:
> Host Controller needs tuning during initialization to operate SDR50
> and SDR104 UHS-I cards. Whether SDR50 mode actually needs tuning is
> indicated by bit 45 of the Host Controller Capabilities register.
> A new command CMD19 has been defined in
On Mar 4, 2011, at 3:32 AM, Arindam Nath wrote:
> Host Controller needs tuning during initialization to operate SDR50
> and SDR104 UHS-I cards. Whether SDR50 mode actually needs tuning is
> indicated by bit 45 of the Host Controller Capabilities register.
> A new command CMD19 has been defined in
Hi Chris,
> -Original Message-
> From: Chris Ball [mailto:c...@laptop.org]
> Sent: Friday, March 04, 2011 8:47 PM
> To: Nath, Arindam
> Cc: zhangfei@gmail.com; prak...@marvell.com;
> subha...@codeaurora.org; linux-mmc@vger.kernel.org; Su, Henry; Lu,
> Aaron; anath@gmail.com
> Subj
On Fri, 2011-03-04 at 14:25 +0900, Jaehoon Chung wrote:
> Hi..
>
> I agreed Chris's opinion..If use CONFIG_MMC_UNSAFE_RESUME, you can know to
> occur some problem..so mentions to "DANGEROUS"
> If card can be removed during suspend, i think we have too many cases.
> So this configuration...i think
Hi Arindam,
On Fri, Mar 04 2011, Arindam Nath wrote:
> V2
Thanks very much for sending this! Since you mentioned you aren't
seeing compiler warnings, here's the set I see here:
drivers/mmc/core/sd.c: In function ‘mmc_sd_init_card’:
drivers/mmc/core/sd.c:584:21: warning: ‘current_limit’ may be u
Hi Wolfram,
> -Original Message-
> From: Wolfram Sang [mailto:w.s...@pengutronix.de]
> Sent: Friday, March 04, 2011 5:18 PM
> To: Nath, Arindam
> Cc: c...@laptop.org; zhangfei@gmail.com; prak...@marvell.com;
> subha...@codeaurora.org; linux-mmc@vger.kernel.org; Su, Henry; Lu,
> Aaron;
> + if (host->version >= SDHCI_SPEC_300)
> + caps[1] = sdhci_readl(host, SDHCI_CAPABILITIES_1);
Now caps[1] can be uninitialized (didn't the compiler warn about this?)
Maybe
caps[1] = host->version... ? sdhci_readl() : 0
(or simply an else branch)?
Regards,
Wolfram
Host Controller v3.00 can support retuning modes 1,2 or 3 depending on
the bits 46-47 of the Capabilities register. Also, the timer count for
retuning is indicated by bits 40-43 of the same register. We initialize
timer_list for retuning after successfull UHS-I initialization. Since
retuning mode 1
Host Controller v3.00 supports programmable clock mode as an optional
feature. The support for this mode is indicated by non-zero value in
bits 48-55 of the Capabilities register. If supported, the actual
value of Clock Multiplier is one more than the value provided in the
bit fields. We only set C
According to the Host Controller spec v3.00, setting Preset Value Enable
in the Host Control2 register lets SDCLK Frequency Select, Clock Generator
Select and Driver Strength Select to be set automatically by the Host
Controller based on the UHS-I mode set. This patch enables this feature.
We also
Host Controller needs tuning during initialization to operate SDR50
and SDR104 UHS-I cards. Whether SDR50 mode actually needs tuning is
indicated by bit 45 of the Host Controller Capabilities register.
A new command CMD19 has been defined in the Physical Layer spec
v3.01 to request the card to send
Since only UHS-I cards respond with S18A set in response to ACMD41,
we set the card as ultra-high-speed after successfull initialization.
We can have SDHC or SDXC UHS-I cards, so we need to decide based on
C_SIZE field of CSDv2.0 register. According to Physical Layer spec
v3.01, the minimum value o
We decide on the current limit to be set for the card based on the
Capability of Host Controller to provide current at 1.8V signalling,
and the maximum current limit of the card as indicated by CMD6
mode 0. We then set the current limit for the card using CMD6 mode 1.
Signed-off-by: Arindam Nath
This patch adds support for setting UHS-I bus speed mode during UHS-I
initialization procedure. Since both the host and card can support
more than one bus speed, we select the highest speed based on both of
their capabilities. First we set the bus speed mode for the card using
CMD6 mode 1, and then
As per Host Controller spec v3.00, we reset SDCLK before setting
High Speed Enable, and then set it back to avoid generating clock
gliches.
Signed-off-by: Arindam Nath
---
drivers/mmc/host/sdhci.c | 25 ++---
1 files changed, 22 insertions(+), 3 deletions(-)
diff --git a/d
This patch adds support for setting driver strength during UHS-I
initialization prcedure. Since UHS-I cards set S18A (bit 24) in
response to ACMD41, we use this as a base for UHS-I initialization.
We modify the parameter list of mmc_sd_get_cid() so that we can
save the ROCR from ACMD41 to check whe
SD cards which conform to Physical Layer Spec v3.01 can support
additional Bus Speed Modes, Driver Strength, and Current Limit
other than the default values. We use CMD6 mode 0 to read these
additional card functions. The values read here will be used
during UHS-I initialization steps.
Signed-off-
Host Controller v3.00 adds another Capabilities register. Apart
from other things, this new register indicates whether the Host
Controller supports SDR50, SDR104, and DDR50 UHS-I modes. The spec
doesn't mention about explicit support for SDR12 and SDR25 UHS-I
modes, so the Host Controller v3.00 sho
Host Controller v3.00 and later support Auto CMD23 in the Transfer
Mode register. Since Auto CMD23 can be used with or without DMA,
and if used with DMA, it should _only_ be ADMA, we check against
SDHCI_USE_SDMA not being set. This flag is reset when SDHCI_USE_ADMA
is set.
A new definition for SDH
V2
[01/12]: Make saved_abort_cmd part of struct sdhci_host rather
than global variable.
[01/12]: Clear SDHCI_USE_SDMA _iff_ SDHCI_USE_ADMA is set.
[01/12]: Set either Auto CMD23 or Auto CMD12, but not both, in
the Transfer Mode register.
[02/12]: Check host controller version
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