Hi Stephen,
On Mon, Jan 06 2014, Stephen Warren wrote:
> From: Stephen Warren
>
> Tegra124's MMC controller is very similar to earlier SoC generations,
> and can be supported by the same driver.
>
> However, there are some non-backwards-compatible HW differences, and
> hence a new DT compatible v
From: Dinh Nguyen
RESEND: Apologies, resending to all appropriate ml's.
Hi,
This is v8 of the patch series to enable SD/MMC on the SOCFPGA platform.
V8 differences from v7:
* For the sdmmc_clk's clk-phase binding property, use the actually degree
for the clock's phase shift.
Dinh Nguyen (4):
From: Dinh Nguyen
The clk-phase property is used to represent the 2 clock phase values that is
needed for the SD/MMC driver. Add a prepare function to the clk_ops, that will
use the syscon driver to set sdmmc_clk's phase shift that is located in the
system manager.
Signed-off-by: Dinh Nguyen
Ac
From: Dinh Nguyen
Use the "snps,dw-mshc" binding to enable the dw_mmc driver.
Add the "syscon" binding to the "altr,sys-mgr" node. The clock
driver can use the syscon driver to toggle the register for the SD/MMC
clock phase shift settings.
Signed-off-by: Dinh Nguyen
---
v8: none
v7: Use the sta
From: Dinh Nguyen
Enables the dw_mmc driver for SOCFPGA.
Signed-off-by: Dinh Nguyen
---
v8: none
v7: none
v6: none
v5: Add dw_mmc driver into socfpga_defconfig
v4: none
v3: none
v2: none
---
arch/arm/configs/socfpga_defconfig |2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/co
From: Dinh Nguyen
It turns now that the only really platform specific code that is needed for
SOCFPGA is using the SDMMC_CMD_USE_HOLD_REG in the prepare_command function.
Since the Rockchip already has this functionality, re-use the code that is
already in dw_mmc-pltfm.c.
Signed-off-by: Dinh Ngu
From: Stephen Warren
Tegra124's MMC controller is very similar to earlier SoC generations,
and can be supported by the same driver.
However, there are some non-backwards-compatible HW differences, and
hence a new DT compatible value must be used to describe the HW. This
patch updates the driver
On Fri, Dec 20, 2013 at 05:35:53PM +, Balaji T K wrote:
> Add pbias regulator node as a child of system control
> module - syscon.
>
> Signed-off-by: Balaji T K
> ---
> arch/arm/boot/dts/dra7.dtsi | 18 ++
> arch/arm/boot/dts/omap2430.dtsi | 18 ++
> a
On Fri, Dec 20, 2013 at 05:35:51PM +, Balaji T K wrote:
> pbias register controls internal power supply to sd card i/o pads
> in most OMAPs (OMAP2-5, DRA7).
> Control bits for selecting voltage level and
> enabling/disabling are in the same PBIAS register.
>
> Signed-off-by: Balaji T K
> ---
Hi Chris,
On Wed, Dec 18, 2013 at 10:42:29AM +0100, Michal Simek wrote:
> Hi Chris,
>
> Soren and I are trying to reach you regarding Arasan driver we sent to
> mailing list
> for review. There are no complains about this version 3 that's why I have
> added
> to our repo and sending you this pu
On 12/02/2013 08:45 PM, Michal Simek wrote:
> On 12/02/2013 07:02 PM, Soren Brinkmann wrote:
>> Add nodes for the Arasan SDHCI controller to Zynq dts files.
>>
>> Signed-off-by: Soren Brinkmann
>> ---
>> v2:
>> - update compatibilty string according to changes in 1/2 (append
>>'-8.9a' IP vers
On Mon, Jan 06, 2014 at 09:26:48AM +0900, Joonsoo Kim wrote:
> On Fri, Jan 03, 2014 at 03:54:04PM +0100, Ludovic Desroches wrote:
> > Hi,
> >
> > On Tue, Dec 24, 2013 at 03:38:37PM +0900, Joonsoo Kim wrote:
> >
> > [...]
> >
> > > > > > > > I think that this commit may not introduce a bug. This
12 matches
Mail list logo
