mmc_host is used the "host" in core.c.
To be consistent, change the variable name from "mmc" to "host".
(Minor fixing)
Signed-off-by: Jaehoon Chung
---
drivers/mmc/core/core.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/mmc/core/core.c
Acked-by: Jaehoon Chung
On 01/10/2014 06:31 AM, dingu...@altera.com wrote:
> From: Dinh Nguyen
>
> Enables the dw_mmc driver for SOCFPGA.
>
> Signed-off-by: Dinh Nguyen
> ---
> v9: none
> v8: none
> v7: none
> v6: none
> v5: Add dw_mmc driver into socfpga_defconfig
> v4: none
> v3: none
> v2:
Acked-by: Jaehoon Chung
On 01/10/2014 06:31 AM, dingu...@altera.com wrote:
> From: Dinh Nguyen
>
> Use the "snps,dw-mshc" binding to enable the dw_mmc driver.
> Add the "syscon" binding to the "altr,sys-mgr" node. The clock
> driver can use the syscon driver to toggle the register for the SD/MM
Acked-by: Jaehoon Chung
On 01/10/2014 06:31 AM, dingu...@altera.com wrote:
> From: Dinh Nguyen
>
> It turns now that the only really platform specific code that is needed for
> SOCFPGA is using the SDMMC_CMD_USE_HOLD_REG in the prepare_command function.
> Since the Rockchip already has this fun
Acked-by: Jaehoon Chung
On 01/10/2014 06:31 AM, dingu...@altera.com wrote:
> From: Dinh Nguyen
>
> The clk-phase property is used to represent the 2 clock phase values that is
> needed for the SD/MMC driver. Add a prepare function to the clk_ops, that will
> use the syscon driver to set sdmmc_c
This patchset looks good to me.
Acked-by: Jaehoon Chung
Best Regards,
Jaehoon Chung
On 01/09/2014 11:35 PM, Zhangfei Gao wrote:
> v7:
> 0002:
> use undefined local value in suspend/resume
>
> v6:
> 0002:
> Jaehoon pointed HIGHSPEED cap can be omitted if supports-highspeed is defined.
> Seungwo
From: Dinh Nguyen
The clk-phase property is used to represent the 2 clock phase values that is
needed for the SD/MMC driver. Add a prepare function to the clk_ops, that will
use the syscon driver to set sdmmc_clk's phase shift that is located in the
system manager.
Signed-off-by: Dinh Nguyen
Ac
From: Dinh Nguyen
Enables the dw_mmc driver for SOCFPGA.
Signed-off-by: Dinh Nguyen
---
v9: none
v8: none
v7: none
v6: none
v5: Add dw_mmc driver into socfpga_defconfig
v4: none
v3: none
v2: none
---
arch/arm/configs/socfpga_defconfig |2 ++
1 file changed, 2 insertions(+)
diff --git a/ar
From: Dinh Nguyen
It turns now that the only really platform specific code that is needed for
SOCFPGA is using the SDMMC_CMD_USE_HOLD_REG in the prepare_command function.
Since the Rockchip already has this functionality, re-use the code that is
already in dw_mmc-pltfm.c.
Signed-off-by: Dinh Ngu
From: Dinh Nguyen
Use the "snps,dw-mshc" binding to enable the dw_mmc driver.
Add the "syscon" binding to the "altr,sys-mgr" node. The clock
driver can use the syscon driver to toggle the register for the SD/MMC
clock phase shift settings.
Signed-off-by: Dinh Nguyen
---
v9: none
v8: none
v7: Us
From: Dinh Nguyen
Hi,
This is v9 of that patch series to enable SD/MMC on the SOCFPGA platform.
V9 differences from v8:
* Update the Makefile to remove the SOCFPGA DW platform specific build.
Thanks,
Dinh
Dinh Nguyen (4):
clk: socfpga: Add a clk-phase property to the "altr,socfpga-gate-clk
On Thu, Jan 09, 2014 at 08:20:58PM +0530, Balaji T K wrote:
> pbias register controls internal power supply to sd card i/o pads
> in most OMAPs (OMAP2-5, DRA7).
> Control bits for selecting voltage level and
> enabling/disabling are in the same PBIAS register.
Acked-by: Mark Brown
signature.asc
On Thu, 2014-01-09 at 12:41 +0900, Jaehoon Chung wrote:
> Dear, Dinh
>
> On 01/08/2014 11:12 PM, Dinh Nguyen wrote:
> >
> > On 1/7/14 6:37 PM, Jaehoon Chung wrote:
> >> Hi, Dinh.
> >>
> >> Sorry for replying too late.
> >>
> >> ..[snip]..
> > +sdr_timing[1] = ddr_timing[1] = 1;
>
Hi,
On Thu, Jan 09, 2014 at 08:20:56PM +0530, Balaji T K wrote:
> Use devm_regulator API, while at it use
> devm_regulator_get_optional for optional vmmc_aux supply
>
> Signed-off-by: Balaji T K
> Acked-by: Tony Lindgren
> ---
> drivers/mmc/host/omap_hsmmc.c |6 ++
> 1 files changed, 2
On Thursday 09 January 2014, Zhangfei Gao wrote:
> Add dw_mmc-k3.c for k3v2, support sd/emmc
>
> Signed-off-by: Zhangfei Gao
> Signed-off-by: Zhigang Wang
This looks basically, sorry for taking so long for the review.
I thought there were a couple of tricky bugs in there, but
discussing them on
In DT case, PBAIS registers are programmed via regulator,
use regulator APIs to control PBIAS.
Signed-off-by: Balaji T K
---
drivers/mmc/host/omap_hsmmc.c | 39 +++
1 files changed, 39 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c
Enable REGULATOR_PBIAS needed for SD card on most OMAPs.
Signed-off-by: Balaji T K
---
arch/arm/configs/omap2plus_defconfig |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/configs/omap2plus_defconfig
b/arch/arm/configs/omap2plus_defconfig
index bfa80a1..f67baa
Use devm_regulator API, while at it use
devm_regulator_get_optional for optional vmmc_aux supply
Signed-off-by: Balaji T K
Acked-by: Tony Lindgren
---
drivers/mmc/host/omap_hsmmc.c |6 ++
1 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/driv
handle vcc and vcc_aux independently to reduce indent.
Signed-off-by: Balaji T K
Acked-by: Tony Lindgren
---
drivers/mmc/host/omap_hsmmc.c | 54 +++--
1 files changed, 25 insertions(+), 29 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/m
Few cleanups to reduce code indent,
Add pbias_regulator support and adapt omap_hsmmc to use pbias regulator
to configure required voltage on mmc1 pad(SD card) i/o rails on OMAP SoCs.
Balaji T K (7):
mmc: omap_hsmmc: use devm_regulator API
mmc: omap_hsmmc: handle vcc and vcc_aux independently
remove pbias workaround
Signed-off-by: Balaji T K
Acked-by: Tony Lindgren
---
drivers/mmc/host/omap_hsmmc.c | 20 +---
1 files changed, 1 insertions(+), 19 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 0a390f8..0f0aa5d 100644
--
pbias register controls internal power supply to sd card i/o pads
in most OMAPs (OMAP2-5, DRA7).
Control bits for selecting voltage level and
enabling/disabling are in the same PBIAS register.
Signed-off-by: Balaji T K
Acked-by: Tony Lindgren
---
.../bindings/regulator/pbias-regulator.txt
Add pbias regulator node as a child of system control
module - syscon.
Signed-off-by: Balaji T K
Acked-by: Tony Lindgren
---
arch/arm/boot/dts/dra7.dtsi | 18 ++
arch/arm/boot/dts/omap2430.dtsi | 18 ++
arch/arm/boot/dts/omap3.dtsi| 18 +
On Thursday 09 January 2014, Zhangfei Gao wrote:
> Suggest by Arnd: abstract mmc tuning as clock behavior,
> also because different soc have different tuning method and registers.
> hi3620_mmc_clks is added to handle mmc clock specifically on hi3620.
>
> Signed-off-by: Zhangfei Gao
Acked-by: Arn
Suggest by Arnd: abstract mmc tuning as clock behavior,
also because different soc have different tuning method and registers.
hi3620_mmc_clks is added to handle mmc clock specifically on hi3620.
Signed-off-by: Zhangfei Gao
---
.../bindings/arm/hisilicon/hisilicon.txt | 14 ++
.../de
Suggested by Jaehoon: Use slot-gpio to handle cd-gpio
Add function dw_mci_of_get_cd_gpio to check "cd-gpios" from dts.
mmc_gpio_request_cd and mmc_gpio_get_cd are used to handle cd pin
Signed-off-by: Zhangfei Gao
Acked-by: Jaehoon Chung
---
drivers/mmc/host/dw_mmc.c | 48 +
Add dw_mmc-k3.c for k3v2, support sd/emmc
Signed-off-by: Zhangfei Gao
Signed-off-by: Zhigang Wang
---
.../devicetree/bindings/mmc/k3-dw-mshc.txt | 60 +
drivers/mmc/host/Kconfig | 10 ++
drivers/mmc/host/Makefile |1 +
d
On Thursday 09 January 2014, Zhangfei Gao wrote:
> Suggested by Jaehoon: Use slot-gpio to handle cd-gpio
> Add function dw_mci_of_get_cd_gpio to check "cd-gpios" from dts.
> mmc_gpio_request_cd and mmc_gpio_get_cd are used to handle cd pin
>
> Signed-off-by: Zhangfei Gao
> Acked-by: Jaehoon Chung
v7:
0002:
use undefined local value in suspend/resume
v6:
0002:
Jaehoon pointed HIGHSPEED cap can be omitted if supports-highspeed is defined.
Seungwon mentioned clk operation should be called after suspend.
Remove k3_dwmmc_caps
V5:
0002:
Follow advice from Arnd,
Update dt descirption and use of
Hi all,
I wrote some sdio driver with enabling sdio interrupt. But sched_rt.c
give the kernel_warning "sched: RT throttling activated" after one app
runs for a while.
I'm not clear about RT sheduling, and I don't understand what this
warning means.
My sdio driver and that app interactive like this:
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