[PATCH v2 6/6] ARM: shmobile: lager: Enable UHS-I SDR-50

Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,2}. Signed-off-by: Ben Hutchings --- arch/arm/boot/dts/r8a7790-lager.dts | 18 -- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.

[PATCH v2 5/6] ARM: shmobile: lager: Set clock rates for SDHI

From: Ian Molton Set the input clocks to the highest supported speeds. Signed-off-by: Ben Hutchings --- arch/arm/boot/dts/r8a7790-lager.dts | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index aaa4f258e279..5

[PATCH v2 4/6] mmc: sh_mobile_sdhi: Add UHS-I mode support

Implement voltage switch, supporting modes up to SDR-50. Based on work by Shinobu Uehara, Rob Taylor, William Towle and Ian Molton. Signed-off-by: Ben Hutchings --- drivers/mmc/host/sh_mobile_sdhi.c | 60 +++ 1 file changed, 60 insertions(+) diff --git a/dri

[PATCH v2 2/6] pinctrl: sh-pfc: Add set_mux operation to struct sh_pfc_function

In some cases a change of function requires changes in more than just the GPSR/IPSR registers. In particular, changing the SDHI between 3.3V and 1.8V signalling also requires modifying IOCTRL6. Add this optional operation so that such special cases can be handled in each SoC's code. Signed-off-b

[PATCH v2 3/6] pinctrl: sh-pfc: r8a7790: Add separate functions for SDHI 1.8V operation

All the SHDIs can operate with either 3.3V or 1.8V signals, depending on negotiation with the card. Add separate functions for the 1.8V mode, and implement the set_mux operation on all SDHI functions to configure the voltage for each group of pins. Signed-off-by: Ben Hutchings --- drivers/pinct

[PATCH v2 1/6] mmc: tmio: Add UHS-I mode support

Based on work by Shinobu Uehara and Ben Dooks. This adds the voltage switch operation needed for all UHS-I modes, but not the tuning needed for SDR-104 which will come later. The card_busy implementation is a bit of a guess, but works for me on an R8A7790 chip. Signed-off-by: Ben Hutchings ---

[PATCH v2 0/6] UHS-I support for sh_mobile_sdhi

This series adds support for UHS-I in sh_mobile_sdhi, partly implemented in tmio_mmc. This does not yet include tuning for SDR-104, but SDR-50 now works on the R8A7790 Lager board and another development board. The pfc block needs to be reconfigured from 3.3V to 1.8V signalling on the pins wired

Re: [PATCH 1/2] drivers: mmc: add quirk SDHCI_QUIRK_CLOCK_DIV_ZERO_BROKEN

Hi, On 06/09/2015 04:31 PM, Suneel Garapati wrote: > adds quirk for controllers whose clock divider zero is broken, > sdhci_set_clock function will incorporate this modification. > > Signed-off-by: Suneel Garapati > --- > drivers/mmc/host/sdhci.c | 4 > drivers/mmc/host/sdhci.h | 2 ++ > 2

[PATCH 2/2] drivers: mmc: add quirks for broken clock base

adding SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,SDHCI_QUIRK2_PRESET_VALUE_BROKEN flags for arasan sdhc. Signed-off-by: Suneel Garapati --- drivers/mmc/host/sdhci-of-arasan.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c i

[PATCH 1/2] drivers: mmc: add quirk SDHCI_QUIRK_CLOCK_DIV_ZERO_BROKEN

adds quirk for controllers whose clock divider zero is broken, sdhci_set_clock function will incorporate this modification. Signed-off-by: Suneel Garapati --- drivers/mmc/host/sdhci.c | 4 drivers/mmc/host/sdhci.h | 2 ++ 2 files changed, 6 insertions(+) diff --git a/drivers/mmc/host/sdhci

[PATCH 0/2] adds quirk SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN

This quirk will support controllers whose clock divider zero is broken and if the calculation results to zero, forcing the divider to next value. This is tested on zynq ep108 and enables support for UHS cards where formatting cards fail. Added few quirks to arasan platform driver as the base clock