On Tue, 2015-06-23 at 20:44 -0400, nick wrote:
>
> On 2015-06-23 08:40 PM, Joe Perches wrote:
> > On Wed, 2015-06-24 at 00:24 +, Kuninori Morimoto wrote:
> >> Hi Joe, Nick
> >>
> >> This adds a cast to the variables,slave_id_rx and slave_id_rx
> >> to uintptr_t before casting to void*
On Wed, 2015-06-24 at 00:24 +, Kuninori Morimoto wrote:
> Hi Joe, Nick
>
> > >>> This adds a cast to the variables,slave_id_rx and slave_id_rx
> > >>> to uintptr_t before casting to void* in order to avoid build
> > >>> warning on 64bit platforms for the function, sh_mmcif_request_dma_one.
> >
Hi Joe, Nick
> >>> This adds a cast to the variables,slave_id_rx and slave_id_rx
> >>> to uintptr_t before casting to void* in order to avoid build
> >>> warning on 64bit platforms for the function, sh_mmcif_request_dma_one.
> > []
> >>> diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host
On Wed, 2015-06-24 at 08:54 +0900, Kuninori Morimoto wrote:
> Can you please teach us about status of this patch ?
> > This adds a cast to the variables,slave_id_rx and slave_id_rx
> > to uintptr_t before casting to void* in order to avoid build
> > warning on 64bit platforms for the function, sh_m
Hi Ulf
Can you please teach us about status of this patch ?
> This adds a cast to the variables,slave_id_rx and slave_id_rx
> to uintptr_t before casting to void* in order to avoid build
> warning on 64bit platforms for the function, sh_mmcif_request_dma_one.
> Signed-off-by: Nicholas Krause
>
i.MX7D support eMMC HS400 mode, this mode can run in 8 bit,200MHZ
DDR mode. So the I/O speed improve a lot compare to SD3.0
The default burst length is 8, if we don't change this value, in
HS400 mode, when we do eMMC read operation, we can find that the
clock signal will stop for a period of time.
Patch 1 add imx7d support, and also add HS400 mode support.
Patch 2 add tuning-step, which can be get from dts.
Patch 3 and Patch 4 do some small fixes.
Haibo Chen (4):
mmc: sdhci-esdhc-imx: add imx7d support and support HS400
mmc: sdhci-esdhc-imx: add tuning-step seting support
mmc: sdhci-e
Currently we find that if a usdhc is choosed to boot system, then ROM
code will set the burst length enable bit of this usdhc as 0.
This will make performance drop a lot if this usdhc's burst length is
16. So this patch set back the burst_length_enable bit as 1, which is
the default value, and mea
The imx7d usdhc is derived from imx6sx, the difference is that
imx7d support HS400.
So introduce a new compatible string for imx7d and add HS400
support for imx7d usdhc.
Signed-off-by: Haibo Chen
---
drivers/mmc/host/sdhci-esdhc-imx.c | 66 ++
1 file changed,
tuning-step is the delay cell steps in tuning procedure. The default value
of tuning-step is 1. For imx6 series usdhc, tuning procedure can be passed
when the tuning-step value is 1. But imx7d usdhc need the tuning-step value
as 2, otherwise it can't pass the tuning procedure.
This patch add the t
On Thu, Jun 18, 2015 at 05:47:50PM +0530, Sudip Mukherjee wrote:
> While building with mn10300 it failed with:
> error: expected identifier before '(' token
> #define __SYSREG(ADDR, TYPE) (*(volatile TYPE *)(ADDR))
> note: in expansion of macro '__SYSREG'
> #define DCR __SYSREG(0xc030, u16)
In the (not so unlikely) case that the mmc controller timeout budget is
enough for exactly one erase-group, the simplification of allowing one
sector has an enormous performance penalty. We optimize this special case
by introducing a flag that prohibits erase-group boundary crossing, so
that we can
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