* Tony Lindgren [150831 14:02]:
>
> And I must have tested next-20150827 instead of next-20150828. Or
> else it does not happen on every boot. In any case, I'm now getting
> the following on next-20150831 most of the time:
>
> [9.493133] omap_hsmmc 4809c000.mmc: using
hsmmc driver instead for
now or revert some patches to remove the dependency and get things working.
And I must have tested next-20150827 instead of next-20150828. Or
else it does not happen on every boot. In any case, I'm now getting
the following on next-20150831 most of the time:
[9.493133]
From: Douglas Anderson
This adds logic to the MMC core to set VQMMC. This is expected to be
called by MMC drivers like dw_mmc as part of (or instead of) their
start_signal_voltage_switch() callback.
A few notes:
* When setting the signal voltage to 3.3V we do our best to make VQMMC
and VMMC
From: Alexandru M Stan
Add ciu_drv, ciu_sample clocks and default-sample-phase. This will later
be used by tuning code.
We do not touch ciu_drive (and by extension define default-drive-phase).
Drive phase is mostly used to define minimum hold times, while one could
write some code to determine w
From: Douglas Anderson
Let's use DIV_ROUND_CLOSEST for rounding, not just truncating
division. This lets us get closer to the right rate.
Before this:
set_phase(86) delay_nums=26 reg[0xf000420c]=0x468 actual_degrees=83
set_phase(89) delay_nums=27 reg[0xf000420c]=0x46c actual_degrees=86
Aft
This allows the tuning code to run and use higher speeds on capable cards.
Signed-off-by: Heiko Stuebner
---
arch/arm/boot/dts/rk3288-veyron-sdmmc.dtsi | 7 ++-
arch/arm/boot/dts/rk3288-veyron.dtsi | 6 ++
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot
From: Douglas Anderson
We've introduced a new helper in the MMC core:
mmc_regulator_set_vqmmc(). Let's use this in dw_mmc. Using this new
helper has some advantages:
1. We get the mmc_regulator_set_vqmmc() behavior of trying to match
VQMMC and VMMC when the signal voltage is 3.3V. This ens
From: Alexandru M Stan
This algorithm will try 1 degree increments, since there's no way to tell
what resolution the underlying phase code uses. As an added bonus, doing
many tunings yields better results since some tests are run more than once
(ex: if the underlying driver uses 45 degree increme
From: Douglas Anderson
Because of the inexact nature of the extra MMC delay elements (it's
not possible to keep the phase monotonic and to also make phases (mod
90) > 70), we previously only allowed phases (mod 90) of 22.5, 45,
and 67.5.
But it's not the end of the world if the MMC clock phase g
From: Alexandru M Stan
The drive/sample clocks can be phase shifted. The drive clock
could be used in a future patch to adjust hold times. The sample
clock is used for tuning.
Signed-off-by: Alexandru M Stan
Signed-off-by: Heiko Stuebner
---
arch/arm/boot/dts/rk3288.dtsi | 20 --
This series resurrects and adapts some individual patches whose sum
enable the dw_mmc hosts on Rockchip socs to tune clock phases using
the generic phase api (rk3288 and following have this capability).
The changes to the original mmc-phase clocks are expanded by further
findings resulting from de
I tested this with the latest (4.2 RC8) but the controller is not working.
Is there something I can do?
Thanks.
Marco Ferrari
Email: ferrari.ma...@gmail.com
Website: ferrarimarco.info
On Sun, Dec 22, 2013 at 11:30 PM, Marco Ferrari wrote:
> Hi list,
> this is the my first bug report for kerne
On 28 August 2015 at 16:01, Shawn Lin wrote:
> From: Jialing Fu
>
> The following panic is captured in ker3.14, but the issue still exists
> in latest kernel.
> -
> [ 20.738217] c0 3136 (Compiler) Unable to handle kernel NULL p
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