Hi Yalin,
On Wed, Nov 11, 2015 at 9:53 AM, yalin wang wrote:
> Use kmalloc instead of kzalloc, zero the memory is not needed.
>
why you want to do this? what problem you faces, and how this resolves the same?
> Signed-off-by: yalin wang
> ---
> drivers/mmc/card/block.c | 2 +-
> 1 file changed
but looks like across cold/warm reboot and across
suspend/resume cycles, eMMC card still works in hs200/hs400 mode.
Feel free to add:
Tested-by: Alim Akhtar
>
> Regards
> Adrian
> --
> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
> the body of a
On 10/22/2015 09:04 PM, Doug Anderson wrote:
Krzysztof,
On Wed, Oct 21, 2015 at 6:43 PM, Krzysztof Kozlowski
wrote:
I think at least one platform may be affected because it used
mmc-pwrseq-emmc and gpio-restart.
Look at rk3288-veyron.dtsi.
Both of restart handlers had the priority of 129 w
MC hw is reset before a system reboot.
Signed-off-by: Javier Martinez Canillas
Tested-by: Markus Reichl
Tested-by: Anand Moon
Reviewed-by: Alim Akhtar
---
Hello,
This patch was needed since a recent series from Alim [0] added
syscon reboot and poweroff support to Exynos SoCs and removed
the reset
Hi Jaehoon
On 10/21/2015 04:19 PM, Jaehoon Chung wrote:
> According to DesignWare DoC file, CardThreshold bit should be
> bit[27:16].
> So it's correct to use (0xFFF << 16), not (0x1FFF << 16).
>
> Signed-off-by: Jaehoon Chung
>
Looks good.
Reviewed-by: Ali
.
>
> Signed-off-by: Jaehoon Chung
>
Looks good to me,
Reviewed-by: Alim Akhtar
Tested on peach board with some additional dt changes, works well.
so, Tested-by: Alim Akhtar
> ---
> drivers/mmc/host/dw_mmc.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/dri
Hi Michal,
On Mon, Aug 17, 2015 at 8:25 PM, Michal Suchanek wrote:
> Hello,
>
> On 17 August 2015 at 16:42, Alim Akhtar wrote:
>> HI
>>
>> On Mon, Aug 17, 2015 at 4:56 PM, Jaehoon Chung
>> wrote:
>>> On 08/17/2015 02:52 PM, Michal Suchanek wrote:
>
HI
On Mon, Aug 17, 2015 at 4:56 PM, Jaehoon Chung wrote:
> On 08/17/2015 02:52 PM, Michal Suchanek wrote:
>> Hello,
>>
>> On 17 August 2015 at 03:55, Jaehoon Chung wrote:
>>> Hi, Michal.
>>>
>>> On 08/12/2015 09:23 PM, Michal Suchanek wrote:
The driver has open-coded test for SDIO cards. Us
Hi Shawn
On Thu, Aug 6, 2015 at 12:14 PM, Shawn Lin wrote:
> DesignWare MMC Controller can supports two types of DMA
> mode: external dma and internal dma. We get a RK312x platform
> integrated dw_mmc and ARM pl330 dma controller. This patch add
> edmac ops to support these platforms. I've tested
gt; ---
Anyway, patch looks good so,
Reviewed-by: Alim Akhtar
Tested on exynos5800, no functionality changes, so
Tested-by: Alim Akhtar
> drivers/mmc/host/dw_mmc.c | 34 +-
> include/linux/mmc/dw_mmc.h | 1 -
> 2 files changed, 13 insertions(+), 22
Hi Jaehoon
On Thu, Aug 6, 2015 at 12:53 PM, Jaehoon Chung wrote:
>
> When num-slots is lower than 1, it's right that should be returned -ENODEV.
>
make sense.
> Signed-off-by: Jaehoon Chung
Reviewed-by: Alim Akhtar
Tested-by: Alim Akhtar
> ---
> drivers/mmc/host/dw
Hi Doug,
On peach-pi, I got a hung task once in 4 cold boot as [1].
And every time got a hung task [2] on suspend/resume, triggered
exactly from this change. I have a debug print at $SUBJECT change.
[1]:
on boot:
[ 240.197190] INFO: task kworker/u16:1:50 blocked for more than 120
Gentle Ping !!
On Wed, Mar 18, 2015 at 4:50 PM, Alim Akhtar wrote:
> From: Seungwon Jeon
>
> HS400 timing values are added for SMDK5420, exynos5420-peach-pit
> and exynos5800-peach-pi boards.
> This also adds RCLK GPIO line, this gpio should be in pull-down
> state.
> Th
Hi Doug,
On Fri, Mar 20, 2015 at 11:30 PM, Doug Anderson wrote:
> We've already seen that it causes failures if we try to send the
> "SDMMC_CMD_UPD_CLK" command when power is off to the system. Here's
> another case where we were doing it: we were sending an
> SDMMC_CMD_UPD_CLK to set the clock
to controller.
Signed-off-by: Seungwon Jeon
Signed-off-by: Alim Akhtar
[Alim: addressed review comments]
Acked-by: Jaehoon Chung
---
Changes in V7:
Add back bus1 pin, which was removed during rebase in v6
as rightly pointed out by Javier[1].
Changes in V6:
Rebased on
to controller.
Signed-off-by: Seungwon Jeon
Signed-off-by: Alim Akhtar
[Alim: addressed review comments]
Acked-by: Jaehoon Chung
---
Changes in V6:
Rebased on kukjin's for-next branch[0]
(commit: 77105c8 Merge branch 'v4.0-samsung-fixes-2' into for-
Thanks Kukjin for looking into this.
I will rebase on top of your for-next and send again.
On Tue, Mar 17, 2015 at 7:42 AM, Kukjin Kim wrote:
> Alim Akhtar wrote:
>>
>> Ping?
>>
> Alim,
>
> Can you please re-send it based on latest my tree?
> It would be helpf
Ping?
On Wed, Feb 25, 2015 at 12:05 PM, Jaehoon Chung wrote:
> Hi, Alim.
>
> Acked-by: Jaehoon Chung
>
> Best Regards,
> Jaehoon Chung
>
> On 01/29/2015 11:41 AM, Alim Akhtar wrote:
>> From: Seungwon Jeon
>>
>> HS400 timing values are added for SMDK54
until march 9th,
hope you can take care of such changes.
> Thanks!
>
> Best Regards,
> Jaehoon Chung
>
> On 01/29/2015 11:41 AM, Alim Akhtar wrote:
>> From: Seungwon Jeon
>>
>> Implements HS400 mode support for exynos host driver.
>> This also include s
Hi Doug,
On Fri, Feb 20, 2015 at 5:19 AM, Doug Anderson wrote:
> Alim and Addy,
>
> On Sun, Feb 15, 2015 at 3:28 PM, Alim Akhtar wrote:
>> Hi Addy,
>>
>> On Sat, Feb 14, 2015 at 11:47 AM, Addy Ke wrote:
>>> As show in mmc_power_up(), in MMC_POWER_UP state,
dw_mci_setup_bus(slot, false);
> + if (ios->power_mode != MMC_POWER_UP)
> + dw_mci_setup_bus(slot, false);
>
This looks a HACK to me.
If stabilizing host voltage regulator is the problem, can you try out
below patch, and see if this resolve your issue?
=======
[PATCH] mmc: dw_mmc:
On Thu, Feb 12, 2015 at 4:40 PM, Andrzej Hajda wrote:
> On 02/12/2015 03:28 AM, addy ke wrote:
>> Hi Andrzej and Alim
>>
>> On 2015/2/12 07:20, Alim Akhtar wrote:
>>> Hi Andrzej,
>>>
>>> On Wed, Feb 11, 2015 at 5:28 PM, Andrzej Hajda wrote:
>
Hi Andrzej,
On Thu, Feb 12, 2015 at 4:43 PM, Andrzej Hajda wrote:
> On 02/12/2015 12:20 AM, Alim Akhtar wrote:
>> Hi Andrzej,
>>
>> On Wed, Feb 11, 2015 at 5:28 PM, Andrzej Hajda wrote:
>>> Hi Alim,
>>>
>>> On 02/11/2015 03:57 AM, Addy wr
Hi Andrzej,
On Wed, Feb 11, 2015 at 5:28 PM, Andrzej Hajda wrote:
> Hi Alim,
>
> On 02/11/2015 03:57 AM, Addy wrote:
>>
>> On 2015/02/10 23:22, Alim Akhtar wrote:
>>> Hi Addy,
>>>
>>> On Mon, Feb 9, 2015 at 12:55 PM, Addy Ke wrote:
>>>&
Hi Addy,
On Mon, Feb 9, 2015 at 12:55 PM, Addy Ke wrote:
> Because of some uncertain factors, such as worse card or worse hardware,
> DAT[3:0](the data lines) may be pulled down by card, and mmc controller
> will be in busy state. This should not happend when mmc controller
> send command to upda
Hi Andrzej,
On Tue, Feb 10, 2015 at 7:59 PM, Andrzej Hajda wrote:
> According to specs for version 250A, status register should be
> tested before clock update. Otherwise in case MMC card is missing
> mci_send_cmd timeouts and subsequent CTYPE registry write causes system hang.
> This behavior ha
This adds HS400 mode support for exynos dw_mmc host controller.
Currently tested on Exynos5800-peach-pi and Exyons7 platform for HS400 mode.
Tested HS200 mode with this series applied, HS200 still works.
Appreciate testing on other exynos5/7 platform which supports emmc5.0
Changes in V5:
to controller.
Signed-off-by: Seungwon Jeon
Signed-off-by: Alim Akhtar
[Alim: addressed review comments]
---
arch/arm/boot/dts/exynos5420-peach-pit.dts |4 +++-
arch/arm/boot/dts/exynos5420-pinctrl.dtsi |7 +++
arch/arm/boot/dts/exynos5420-smdk5420.dts |4 +++-
arch/arm/boot
From: Seungwon Jeon
Implements HS400 mode support for exynos host driver.
This also include some updates as new mode is added.
Signed-off-by: Seungwon Jeon
Signed-off-by: Alim Akhtar
[Alim: addressed review comments]
---
.../devicetree/bindings/mmc/exynos-dw-mshc.txt |7 +
drivers
Hi Jaehoon,
Thanks for review.
On Thu, Jan 22, 2015 at 11:28 AM, Jaehoon Chung wrote:
> Hi.
>
> On 01/21/2015 11:12 PM, Alim Akhtar wrote:
>> Hi Jaehoon
>>
>> On Wed, Jan 21, 2015 at 4:32 AM, Jaehoon Chung
>> wrote:
>>> Hi,
>>>
>>>
Hi Jaehoon
On Wed, Jan 21, 2015 at 4:32 AM, Jaehoon Chung wrote:
> Hi,
>
> This patch can be separated.
> When i tested on my board, it's not working fine.
> I think it depends on my timing, so i will check after change the timing.
>
> On 01/14/2015 07:30 PM, Alim Akhta
send separate patch to enable hs400, as of now
I am not sure if all the 5800-peach-pi boards are populated with
emmc5.0 device or not. So I will enable HS400 after confirming this
point.
> On 01/14/2015 07:30 PM, Alim Akhtar wrote:
>> From: Seungwon Jeon
>>
>> HS400 t
From: Seungwon Jeon
Implements HS400 mode support for exynos host driver.
This also include some updates as new mode is added.
Signed-off-by: Seungwon Jeon
Signed-off-by: Alim Akhtar
[Alim: addressed review comments]
---
.../devicetree/bindings/mmc/exynos-dw-mshc.txt |7 +
drivers
From: Seungwon Jeon
HS400 timing values are added for SMDK5420, exynos5420-peach-pit
and exynos5800-peach-pi boards.
This also adds RCLK GPIO line, this gpio should be in pull-down
state.
Signed-off-by: Seungwon Jeon
Signed-off-by: Alim Akhtar
[Alim: addressed review comments]
---
arch/arm
This adds HS400 mode support for exynos dw_mmc host controller.
Currently tested on Exynos5800-peach-pi platform for HS400 mode.
Tested HS200 mode with this series applied, HS200 still works.
Appreciate testing on other exynos5/7 platform which supports emmc5.0
Changes in V4:
* drop the
Hi Jaehoon,
On Thu, Jan 8, 2015 at 7:06 AM, Jaehoon Chung wrote:
> Hi,
>
> On 12/31/2014 03:43 PM, Alim Akhtar wrote:
>> From: Seungwon Jeon
>>
>> ciu_div may not be common value for all speed mode.
>> So, it needs to be attached to CLKSEL timing.
>> Th
Hi Doug,
On Tue, Jan 6, 2015 at 6:37 AM, Doug Anderson wrote:
> Alim,
>
> On Sun, Jan 4, 2015 at 2:43 PM, Alim Akhtar wrote:
>>> You are breaking backward compatibility here. If your change is
>>> merged then all old boards will instantly break. Since the &quo
Hi Jaehoon,
On Thu, Jan 8, 2015 at 7:16 AM, Jaehoon Chung wrote:
> On 12/31/2014 03:43 PM, Alim Akhtar wrote:
>> From: Seungwon Jeon
>>
>> Implements HS400 support for exynos host driver.
>> And this patch includes some updates as new mode is added.
>>
>>
Hi Doug,
Thanks for looking into this series.
On Fri, Jan 2, 2015 at 10:28 PM, Doug Anderson wrote:
> Alim,
>
> On Tue, Dec 30, 2014 at 10:43 PM, Alim Akhtar wrote:
>> From: Seungwon Jeon
>>
>> ciu_div may not be common value for all speed mode.
>> So, it need
Hi Doug / Sonny
New year greetings!!
On Sat, Jan 3, 2015 at 4:37 AM, Doug Anderson wrote:
> Alim,
>
> On Mon, Dec 22, 2014 at 4:12 AM, Alim Akhtar wrote:
>> From: Seungwon Jeon
>>
>> Even though 1MB is reserved for descriptor table in IDMAC,
>> the dw_mmc host
From: Seungwon Jeon
HS400 timing value set is added for SMDK5420, peach-pit and
exynos5800 peach-pi.
And GPIO line for RCLK should be pull-down state.
Signed-off-by: Seungwon Jeon
Signed-off-by: Alim Akhtar
---
arch/arm/boot/dts/exynos5420-peach-pit.dts |5 -
arch/arm/boot/dts
From: Seungwon Jeon
As dw-mshc-ciu-div is strongly close to timing property,
it is merged with each timing property.
Signed-off-by: Seungwon Jeon
Signed-off-by: Alim Akhtar
---
arch/arm/boot/dts/exynos3250-monk.dts |5 ++---
arch/arm/boot/dts/exynos3250-rinato.dts
From: Seungwon Jeon
Implements HS400 support for exynos host driver.
And this patch includes some updates as new mode is added.
Signed-off-by: Seungwon Jeon
Signed-off-by: Alim Akhtar
---
.../devicetree/bindings/mmc/exynos-dw-mshc.txt |6 +
drivers/mmc/host/dw_mmc-exynos.c
From: Seungwon Jeon
ciu_div may not be common value for all speed mode.
So, it needs to be attached to CLKSEL timing.
This also introduce a new compatibale 'dw-mshc-hs200-timing'
for selecting hs200 timing value
Signed-off-by: Seungwon Jeon
Signed-off-by: Alim Akhtar
---
.../
This serise is second part of [1] which was posted by Seungwon Jeon few months
back.
This adds HS400 mode support for exynos dw_mmc host controller.
Currently tested on Exynos5800-peach-pi platform and exynos7 platform for HS400
mode.
Appreciate testing on other exynos5 platform which supports
iant, since it's the only one which
> support the dw_mmc's ->execute_tuning() callback.
>
> Signed-off-by: Ulf Hansson
> ---
>
yes, this works fine now, with the other patch which add STOP command,
and I don't need to modify DT timing values. So,
Reviewed-by: Alim Akh
Hi Ulf,
On Mon, Dec 22, 2014 at 8:11 PM, Ulf Hansson wrote:
> On 20 December 2014 at 14:18, Alim Akhtar wrote:
>> Hi Ulf,
>>
>> On Mon, Dec 8, 2014 at 3:40 PM, Ulf Hansson wrote:
>>> On 6 December 2014 at 13:43, Alim Akhtar wrote:
>>>> Hi Ulf,
>
From: Seungwon Jeon
Move exynos related definition to header file. And this
also changes some of the registers name to match the standard
naming convention.
Signed-off-by: Seungwon Jeon
Acked-by: Jaehoon Chung
[Alim: updated the commit message]
Signed-off-by: Alim Akhtar
---
drivers/mmc
found that the performance
is improved with the increased the max_blk_count.
Signed-off-by: Seungwon Jeon
Acked-by: Jaehoon Chung
Signed-off-by: Alim Akhtar
---
drivers/mmc/host/dw_mmc.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers
This series is part of [1] which are send by Seungwon jeon few months back.
when he attempted to add HS400 support for exynos dw_mmc host controller.
Since then these patches are just sitting idle.
This is my attempt to land some of the changes which are generic, and
performance
booter on dw_mmc h
From: Seungwon Jeon
Add checking whether the clock is valid.
Signed-off-by: Seungwon Jeon
Acked-by: Jaehoon Chung
Signed-off-by: Alim Akhtar
---
drivers/mmc/host/dw_mmc-exynos.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/host/dw_mmc
Hi Jaehoon
On Mon, Dec 15, 2014 at 10:18 AM, Jaehoon Chung wrote:
> Hi, Alim.
>
> On 12/13/2014 12:13 AM, Jaehoon Chung wrote:
>> Hi.
>>
>> On 12/10/2014 06:30 AM, Alim Akhtar wrote:
>>> Hi Ulf
>>>
>>> On Mon, Dec 8, 2014 at 3:40 PM, Ulf
Hi Ulf,
On Mon, Dec 8, 2014 at 3:40 PM, Ulf Hansson wrote:
> On 6 December 2014 at 13:43, Alim Akhtar wrote:
>> Hi Ulf,
>>
>> On Fri, Dec 5, 2014 at 5:29 PM, Ulf Hansson wrote:
>>> Instead of having a local hack taking care of sending the tuning
>>> com
Hi Ulf
On Mon, Dec 8, 2014 at 3:40 PM, Ulf Hansson wrote:
> On 6 December 2014 at 13:43, Alim Akhtar wrote:
>> Hi Ulf,
>>
>> On Fri, Dec 5, 2014 at 5:29 PM, Ulf Hansson wrote:
>>> Instead of having a local hack taking care of sending the tuning
>>> com
Hi Ulf,
On Fri, Dec 5, 2014 at 5:29 PM, Ulf Hansson wrote:
> Instead of having a local hack taking care of sending the tuning
> command and as well to verify the response pattern, let's convert to
> the common mmc_send_tuning() API.
>
> This change affects the Exynos variant, since it's the only
Hi Shawn,
On Sun, Nov 23, 2014 at 9:00 PM, Shawn Guo wrote:
> Hi Alim,
>
> On Sat, Nov 22, 2014 at 06:56:46PM +0530, Alim Akhtar wrote:
>> Hi Shawn,
>>
>> On Sat, Nov 22, 2014 at 5:01 AM, Shawn Guo wrote:
>> > Seungwon, Jaehoon,
>> >
>> &g
Hi Shawn,
On Sat, Nov 22, 2014 at 5:01 AM, Shawn Guo wrote:
> Seungwon, Jaehoon,
>
> On Fri, Nov 21, 2014 at 02:39:10PM +0800, Shawn Guo wrote:
>> Commit f1d2736c8156 ("mmc: dw_mmc: control card read threshold")
>> introduces a regression for use case where PIO mode is used, i.e.
>> CONFIG_MMC_DW
Hi Ulf,
On Tue, Sep 9, 2014 at 12:21 PM, Ulf Hansson wrote:
> On 29 August 2014 12:24, Alim Akhtar wrote:
>> There are upcoming ARM64 SoCs with dw_mmc host controller.
>>
>> Signed-off-by: Alim Akhtar
>> ---
>> drivers/mmc/host/Kconfig |2 +-
>> 1 f
Hi Jaehoon,
As 64bit dependent patch for dw_mmc is already merged.
Do you have any comments on this patch?
This patch still apply cleanly on ulf's next and v3.18-rc4 kernel.
Regards,
Alim
On Tue, Oct 21, 2014 at 1:50 PM, Vivek Gautam wrote:
> On Tue, Oct 21, 2014 at 1:47 PM, Vivek Gautam
> wr
gamuthu
Thanks!!
This looks good now and ready to go in.
Reviewed-by: Alim Akhtar
and you already have Tested-by from Vivek.
Jaehoon / Seungwon, any other thoughts from your side? Can this patch
gets an ACK now? As other exynos7 dw_mmc patches are blocked on this
one.
Thanks!
> -
Hi Doug,
On Wed, Oct 22, 2014 at 10:06 PM, Doug Anderson wrote:
> Hi,
>
> On Sun, Oct 19, 2014 at 8:23 PM, Jaehoon Chung wrote:
>> Hi.
>>
>> On 10/17/2014 09:44 PM, Alim Akhtar wrote:
>>> Hi Doug,
>>>
>>> On Thu, Oct 16, 2014 at 9:40 PM,
Hi Doug,
On Thu, Oct 16, 2014 at 9:40 PM, Doug Anderson wrote:
> Alim,
>
> On Thu, Oct 16, 2014 at 5:57 AM, Alim Akhtar wrote:
>> Hi Doug,
>>
>> On Tue, Oct 14, 2014 at 10:03 PM, Doug Anderson
>> wrote:
>>> The dw_mmc driver had a bunch of code th
>
> We tested this on an Exynos 5800 with HS200 and didn't notice any
> difference in sequential read throughput.
>
> Signed-off-by: Sonny Rao
> Signed-off-by: Doug Anderson
> Tested-by: Doug Anderson
This looks fine.
Reviewed-by: Alim Akhtar
> ---
> drive
Hi Doug,
On Tue, Oct 14, 2014 at 10:03 PM, Doug Anderson wrote:
> The dw_mmc driver had a bunch of code that ran whenever a card was
> ejected and inserted. However, this code was old and crufty and
> should be removed. Some evidence that it's really not needed:
>
> 1. Is is supposed to be lega
Hi Doug,
On Tue, Oct 14, 2014 at 9:57 PM, Doug Anderson wrote:
> Alim,
>
> On Tue, Oct 14, 2014 at 5:02 AM, Alim Akhtar wrote:
>>> --- a/drivers/mmc/host/dw_mmc.c
>>> +++ b/drivers/mmc/host/dw_mmc.c
>>> @@ -1075,7 +1075,7 @@ static int dw_mci_switch_volta
Hi Doug,
On Tue, Oct 14, 2014 at 10:21 PM, Doug Anderson wrote:
> Hi,
>
> On Thu, Oct 9, 2014 at 5:36 PM, Doug Anderson wrote:
>> Alim,
>>
>> On Thu, Oct 9, 2014 at 3:19 PM, Alim Akhtar wrote:
>>> Thats fine, I think every vendor (most of them) has a cust
Hi Prahu,
Thanks for a quick re-spin o the patch.
One last comment, this is more of a information seek.
On Thu, Oct 9, 2014 at 1:09 PM, Prabu Thangamuthu wrote:
> Synopsys DW_MMC IP core supports Internal DMA Controller with 64-bit address
> mode from IP version 2.70a onwards.
> Updated the drive
Hi Doug,
On Sat, Oct 11, 2014 at 9:46 AM, Doug Anderson wrote:
> In (28f92b5 mmc: core: Try other signal levels during power up) we can
> see that there are times when it's valid to try several signal
> voltages. Don't print an ugly error in the logs when that happens.
>
> Signed-off-by: Doug An
Hi Eddie,
On Thu, Oct 9, 2014 at 7:43 PM, Eddie Cai(蔡枫) wrote:
> Hi Alim
>
> 2014年10月8日 上午4:28于 "Alim Akhtar" 写道：
>
>
>>
>> Hi Sonny/Doug,
>>
>> On Mon, Oct 6, 2014 at 11:23 PM, Sonny Rao wrote:
>> > We've already got a reset of DM
in DW_MMC core v2.70a and v2.40a with HAPS-51 setup and
> driver is working fine.
>
> Signed-off-by: Prabu Thangamuthu
> ---
With a minor nit below, this looks good to me.
So, Reviewed-by: Alim Akhtar
Have tested this on exynos7 platform which has dw_mmc controller version 2.70a,
Hav
Hi Sonny/Doug,
On Mon, Oct 6, 2014 at 11:23 PM, Sonny Rao wrote:
> We've already got a reset of DMA after it's done. Add one before we
> start DMA too. This fixes a data corruption on Rockchip SoCs which
> will get bad data when doing a DMA transfer after doing a PIO transfer.
>
> We tested thi
Hi Jaehoon
On Wed, Sep 17, 2014 at 8:06 AM, Jaehoon Chung wrote:
> Hi, Alim.
>
> On 09/17/2014 07:27 AM, Alim Akhtar wrote:
>> Hi Jaehoon,
>>
>> On Mon, Sep 15, 2014 at 3:56 PM, Jaehoon Chung
>> wrote:
>>> Almost all case is selected to 0.
>>&g
Hi Jaehoon,
On Mon, Sep 15, 2014 at 3:56 PM, Jaehoon Chung wrote:
> Almost all case is selected to 0.
> (It's not correct sample-clock value.)
> Since it set to wrong value, HS200 mode don't work fine.
Can you please explain what problem you are facing here?
It is not clear from your patch descri
Hi Ulf,
On Tue, Sep 9, 2014 at 12:21 PM, Ulf Hansson wrote:
> On 29 August 2014 12:24, Alim Akhtar wrote:
>> There are upcoming ARM64 SoCs with dw_mmc host controller.
>>
>> Signed-off-by: Alim Akhtar
>> ---
>> drivers/mmc/host/Kconfig |2 +-
>> 1 f
Hi Chrish, Ulf, Arnd
Any comments/suggestions?
On Fri, Aug 29, 2014 at 3:54 PM, Alim Akhtar wrote:
> There are upcoming ARM64 SoCs with dw_mmc host controller.
>
> Signed-off-by: Alim Akhtar
> ---
> drivers/mmc/host/Kconfig |2 +-
> 1 file changed, 1 insertion(+), 1 de
There are upcoming ARM64 SoCs with dw_mmc host controller.
Signed-off-by: Alim Akhtar
---
drivers/mmc/host/Kconfig |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index a43295c..72dd6c2 100644
--- a/drivers/mmc/host
Hi Andrew,
On Thu, Aug 14, 2014 at 10:15 PM, Andrew Bresticker
wrote:
> There are upcoming MIPS SoCs with dw_mmc hosts.
>
> Signed-off-by: Andrew Bresticker
Reviewed-by: Alim Akhtar
> ---
> drivers/mmc/host/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-
gt;
> Signed-off-by: Andrew Bresticker
> ---
Reviewed-by: Alim Akhtar
> drivers/mmc/host/Kconfig | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
> index a565254..385674b 100644
> --- a/drivers/
Hi Andrew,
On Wed, Aug 13, 2014 at 11:02 PM, Andrew Bresticker
wrote:
> The dw_mmc host may also be present on non-ARC/ARM SoCs (e.g. MIPS)
> and the driver itself does not appear to depend on any particular
> architecture(s).
>
> Signed-off-by: Andrew Bresticker
> ---
> drivers/mmc/host/Kconfi
Hi Yuvaraj,
On Mon, Mar 24, 2014 at 10:12 AM, Yuvaraj Kumar wrote:
> On Mon, Mar 24, 2014 at 9:59 AM, Jaehoon Chung wrote:
>> Hi, Yuvaraj.
>>
>> NACK. we can use "mmc_of_parese()".
> Thanks Jaehoon for the pointer.I will use "mmc_of_parse()".
Are you planning to re-spin this patch? Now Jaehoon's
s 0x0088
>
> ...and they think something is wrong with their hardware.
>
> Remove the printouts. We'll leave it up to a higher level to report
> about errors.
>
> Signed-off-by: Doug Anderson
This looks reasonable
Reviewed-by: Alim Akhtar
> ---
> drivers/mmc/host/dw
Hi Ulf
On Thu, Dec 19, 2013 at 12:04 PM, Ulf Hansson wrote:
> There are no reason to why the use of a non-volatile internal eMMC
> cache should be controlled by a host cap. Instead let's just enable it
> if the eMMC card supports it.
>
> Signed-off-by: Ulf Hansson
> Acked-by: Seungwon Jeon
> --
he one I posted.
>
> I think it's simple and good way.
> It would be better to add error message when happened.
Do you mean check for HLE in interrupt handler and print error message?
If so, do you want me to respin this patch?
>
> Thanks,
> Seungwon Jeon
>
>>
&g
=23010
Can we have some conclusion about how to handle HLE?
Thanks!!!
On Thu, Oct 10, 2013 at 4:31 PM, Alim Akhtar wrote:
> Hi Jaeohoon,
>
> On Mon, Oct 7, 2013 at 2:00 AM, ALIM AKHTAR wrote:
>> Hi Jaeohoon,
>> Thanks for quick review.
>>>--- Original Messa
Hi Jaeohoon,
On Mon, Oct 7, 2013 at 2:00 AM, ALIM AKHTAR wrote:
> Hi Jaeohoon,
> Thanks for quick review.
>>--- Original Message ---
>>Sender : Jaehoon Chung S4/Engineer/System S/W
>>Lab./Samsung Electronics
>>Date : Oct 07, 2013 17:36 (GMT+09:00)
>>
;Hi, Alim.
>On 10/07/2013 05:21 PM, ALIM AKHTAR wrote:
>>
>>
>>> --- Original Message ---
>>> Sender : Jaehoon Chung S4/Engineer/System S/W Lab./Samsung Electronics
>>> Date : Oct 07, 2013 13:34 (GMT+09:00)
>>> Title : Re: [PATCH] mmc: dw_
>--- Original Message ---
>Sender : Jaehoon Chung S4/Engineer/System S/W
>Lab./Samsung Electronics
>Date : Oct 07, 2013 13:34 (GMT+09:00)
>Title : Re: [PATCH] mmc: dw_mmc: Add hardware lock error (HLE) to the CMD
>error flag
>On 10/07/2013 01:22 PM, ALIM AKHTAR
Hi Jaehoon,
>--- Original Message ---
>Sender : Jaehoon Chung S4/Engineer/System S/W
>Lab./Samsung Electronics
>Date : Oct 06, 2013 17:28 (GMT+09:00)
>Title : Re: [PATCH] mmc: dw_mmc: Add hardware lock error (HLE) to the CMD
>error flag
>Hi Alim,
>On 10/03/20
From: Alim Akhtar
Hardware locked error set when the dw_mmc controller cannot load a
command issued by software. When software sets the start_cmd bit in the
CMD register, the controller tries to load the command. If the command
buffer is already filled with a command, this error is raised
r this patch
>> add a quirk for SMU -> configure SMU in exynos5420
>>
>> changes since V1:
>> 1.avoid code duplication by calling dw_mci_exynos_priv_init in
>> resume path.
>>
>> Signed-off-by: Yuvaraj Kumar C D
>> Signed-off-by
74 insertions(+), 36 deletions(-)
Tested this serise on exynos5420.
Tested-by: Alim Akhtar
>
> --
> 1.7.9.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-mmc" in
> the body of a message to majord...@vger.kernel.org
> More majordomo info
Hi Yuvaraj
On Mon, Aug 19, 2013 at 12:06 PM, Yuvaraj Kumar C D
wrote:
> Exynos5420 Mobile Storage Host controller has Security Management Unit
> (SMU) for channel 0 and channel 1 (mainly for eMMC).This patch adds a
> quirk to bypass SMU as it is not being used yet.
>
> This patch is on top of the
Hi,
On Tue, Feb 19, 2013 at 6:04 PM, Dongjin Kim wrote:
> Hello Seungwon,
>
> Thank you for reviewing and I understand what you mean.
>
> I agree that Exynos5250 and Exynos4412 are not same, no idea how much
> they are different because no Exynos5250 spec on my hand. But at least
> I assumed that
Hi Sachin,
On Thu, Feb 14, 2013 at 8:55 PM, Sachin Kamat wrote:
> On 07/02/2013, Sachin Kamat wrote:
>> Added compatibility string for Exynos4412 SoC.
>>
>> Cc: Thomas Abraham
>> Signed-off-by: Sachin Kamat
>
> Any comments on this patch?
>
>> ---
>> drivers/mmc/host/dw_mmc-exynos.c |2 ++
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