r not can be distinguished by the
bit20 of Capability Register(offset 0x40) in FSL eSDHC module.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci-esdhc-imx.c | 45 +--
1 files changed, 42 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/sdhci-
e.
Up to now, only MX51/MX53 set the ADMA2 supported bit(Bit20) in the
Capability Register.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci-esdhc-imx.c | 34 --
1 files changed, 32 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx
e.
Up to now, only MX51/MX53 set the ADMA2 supported bit(Bit20) in the
Capability Register.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci-esdhc-imx.c | 36 +++-
1 files changed, 31 insertions(+), 5 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-
e.
Up to now, only MX51/MX53 set the ADMA2 supported bit(Bit20) in the
Capability Register.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci-esdhc-imx.c | 36 +++-
1 files changed, 31 insertions(+), 5 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-
Eanble the ADMA mode on freescale esdhc imx driver,
tested on MX51 and MX53.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci-esdhc-imx.c | 40 ++-
1 files changed, 34 insertions(+), 6 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b
fix it.
Signed-off-by: Richard Zhu
Signed-off-by: Richard Zhao
---
drivers/mmc/host/sdhci-esdhc-imx.c | 42
1 files changed, 42 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc/host/sdhci-esdhc-imx.c
index 67a
Add one flag to indicate the GPIO CD/WP is enabled or not
on imx platforms, and reuse the writel/readl as the general
APIs for imx SOCs.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci-esdhc-imx.c | 44 ++-
drivers/mmc/host/sdhci-pltfm.h |2 +-
2
Add the abort CMDTYPE bits definition of command register (offset 0xE)
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 6e0969e..25e8bde 100644
--- a/drivers
sdhci-esdhc-imx does not need SDHCI_QUIRK_NO_CARD_NO_RESET. Make it OF-specific.
Signed-off-by: Richard Zhu
Tested-by: Wolfram Sang
---
drivers/mmc/host/sdhci-esdhc.h|3 +--
drivers/mmc/host/sdhci-of-esdhc.c |3 ++-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a
Add the abort CMDTYPE bits definition of command register (offset 0xE)
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 6e0969e..25e8bde 100644
--- a/drivers
One comment is missing addressed in the previous review round,
complement it into this review round.
[PATCH V7 1/4] mmc: sdhci-esdhc: remove SDHCI_QUIRK_NO_CARD_NO_RESET from
ESDHC_DEFAULT_QUIRKS
[PATCH V7 2/4] mmc: add the abort CMDTYE bits definition
[PATCH V7 3/4] m
Add one flag to indicate the GPIO CD/WP is enabled or not
on imx platforms, and reuse the writel/readl as the general
APIs for imx SOCs.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci-esdhc-imx.c | 39 +--
drivers/mmc/host/sdhci-pltfm.h |2 +-
2
fix it.
Signed-off-by: Richard Zhu
Signed-off-by: Richard Zhao
---
drivers/mmc/host/sdhci-esdhc-imx.c | 42
1 files changed, 42 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc/host/sdhci-esdhc-imx.c
index 372
sdhci-esdhc-imx does not need SDHCI_QUIRK_NO_CARD_NO_RESET. Make it OF-specific.
Signed-off-by: Richard Zhu
Tested-by: Wolfram Sang
---
drivers/mmc/host/sdhci-esdhc.h|3 +--
drivers/mmc/host/sdhci-of-esdhc.c |3 ++-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a
fix it.
Signed-off-by: Richard Zhu
Signed-off-by: Richard Zhao
---
drivers/mmc/host/sdhci-esdhc-imx.c | 42
1 files changed, 42 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc/host/sdhci-esdhc-imx.c
index f31
Add one flag to indicate the GPIO CD/WP is enabled or not
on imx platforms, and reuse the writel/readl as the general
APIs for imx SOCs.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci-esdhc-imx.c | 42 ++--
drivers/mmc/host/sdhci-pltfm.h |2 +-
2
Add the abort CMDTYPE bits definition of command register (offset 0xE)
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 6e0969e..25e8bde 100644
--- a/drivers
sdhci-esdhc-imx does not need SDHCI_QUIRK_NO_CARD_NO_RESET. Make it OF-specific.
Signed-off-by: Richard Zhu
Tested-by: Wolfram Sang
---
drivers/mmc/host/sdhci-esdhc.h|3 +--
drivers/mmc/host/sdhci-of-esdhc.c |3 ++-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a
One comment is missing addressed in the previous review round,
complement it into this review round.
[PATCH V7 1/4] mmc: sdhci-esdhc: remove SDHCI_QUIRK_NO_CARD_NO_RESET from
ESDHC_DEFAULT_QUIRKS
[PATCH V7 2/4] mmc: add the abort CMDTYE bits definition
[PATCH V7 3/4] mmc: sdhci-esdhc: make the wr
fix it.
Signed-off-by: Richard Zhu
Signed-off-by: Richard Zhao
---
drivers/mmc/host/sdhci-esdhc-imx.c | 42
1 files changed, 42 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc/host/sdhci-esdhc-imx.c
index a55
Add one flag to indicate the GPIO CD/WP is enabled or not
on imx platforms, and reuse the writel/readl as the general
APIs for imx SOCs.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci-esdhc-imx.c | 43 ++--
drivers/mmc/host/sdhci-pltfm.h |2 +-
2
Add the abort CMDTYPE bits definition of command register (offset 0xE)
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 6e0969e..25e8bde 100644
--- a/drivers
sdhci-esdhc-imx does not need SDHCI_QUIRK_NO_CARD_NO_RESET. Make it OF-specific.
Signed-off-by: Richard Zhu
Tested-by: Wolfram Sang
---
drivers/mmc/host/sdhci-esdhc.h|3 +--
drivers/mmc/host/sdhci-of-esdhc.c |3 ++-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a
fix it.
Signed-off-by: Richard Zhu
Signed-off-by: Richard Zhao
---
drivers/mmc/host/sdhci-esdhc-imx.c | 42
1 files changed, 42 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc/host/sdhci-esdhc-imx.c
index 576
Add one flag to indicate the GPIO CD/WP is enabled or not
on imx platforms, and reuse the writel/readl as the general
APIs for imx SOCs.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci-esdhc-imx.c | 43 ++--
drivers/mmc/host/sdhci-pltfm.h |2 +-
2
Add the abort CMDTYPE bits definition of command register (offset 0xE)
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 6e0969e..25e8bde 100644
--- a/drivers
sdhci-esdhc-imx does not need SDHCI_QUIRK_NO_CARD_NO_RESET. Make it OF-specific.
Signed-off-by: Richard Zhu
Tested-by: Wolfram Sang
---
drivers/mmc/host/sdhci-esdhc.h|3 +--
drivers/mmc/host/sdhci-of-esdhc.c |3 ++-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a
Some cards have the CRC errors in read on mx51 BBG board.
Configure the eSDHC pad configurations to level up the
compatibility to fix this issue.
Signed-off-by: Richard Zhu
Tested-by: Shawn Guo
---
arch/arm/plat-mxc/include/mach/iomux-mx51.h | 40 +-
1 files changed
Some cards have the CRC errors in read on mx51 BBG board.
Configure the eSDHC pad configurations to level up the
compatibility to fix this issue.
Signed-off-by: Richard Zhu
Tested-by: Shawn Guo
---
arch/arm/plat-mxc/include/mach/iomux-mx51.h | 40 +-
1 files changed
Add one flag to indicate the GPIO CD/WP is enabled or not
on imx platforms, and reuse the writel/readl as the general
APIs for imx SOCs.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci-esdhc-imx.c | 43 ++--
drivers/mmc/host/sdhci-pltfm.h |2 +-
2
Add the abort CMDTYPE bits definition of command register (offset 0xE)
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 6e0969e..25e8bde 100644
--- a/drivers
fix it.
Signed-off-by: Richard Zhu
Signed-off-by: Richard Zhao
---
drivers/mmc/host/sdhci-esdhc-imx.c | 42
1 files changed, 42 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc/host/sdhci-esdhc-imx.c
index 576
sdhci-esdhc-imx does not need SDHCI_QUIRK_NO_CARD_NO_RESET. Make it OF-specific.
Signed-off-by: Richard Zhu
Tested-by: Wolfram Sang
---
drivers/mmc/host/sdhci-esdhc.h|3 +--
drivers/mmc/host/sdhci-of-esdhc.c |3 ++-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a
Add the abort CMDTYPE bits definition of command register (offset 0xE)
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 6e0969e..25e8bde 100644
--- a/drivers
Add one flag to indicate the GPIO CD/WP is enabled or not
on imx platforms, and reuse the writel/readl as the general
APIs for imx SOCs.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci-esdhc-imx.c | 40 ++-
1 files changed, 34 insertions(+), 6 deletions
Signed-off-by: Richard Zhao
---
arch/arm/mach-mx5/clock-mx51-mx53.c | 140 ++-
arch/arm/mach-mx5/crm_regs.h|7 ++
2 files changed, 146 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c
b/arch/arm/mach-mx5/clock-mx51-mx53.
fix it.
Signed-off-by: Richard Zhu
Signed-off-by: Richard Zhao
---
drivers/mmc/host/sdhci-esdhc-imx.c | 44 +++-
1 files changed, 43 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc/host/sdhci-esdhc-imx.c
index 42f
Signed-off-by: Richard Zhao
Acked-by: Wolfram Sang
---
arch/arm/mach-mx5/Kconfig |1 +
arch/arm/mach-mx5/board-mx53_loco.c |2 ++
2 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index f065a0d..a72c833 100644
-
sdhci-esdhc-imx does not need SDHCI_QUIRK_NO_CARD_NO_RESET. Make it OF-specific.
Signed-off-by: Richard Zhu
Tested-by: Wolfram Sang
---
drivers/mmc/host/sdhci-esdhc.h|3 +--
drivers/mmc/host/sdhci-of-esdhc.c |3 ++-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a
Signed-off-by: Richard Zhao
---
arch/arm/mach-mx5/clock-mx51-mx53.c | 140 ++-
arch/arm/mach-mx5/crm_regs.h|7 ++
2 files changed, 146 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c
b/arch/arm/mach-mx5/clock-mx51-mx53.
k transfer, the controller doesn't complete the
operations automatically as required at the end of the
transfer and remains on hold if the abort command is not sent.
As a result, the TC flag is not asserted and SW received timeout
exeception. set bit1 of Vendor Spec registor to fix it
Signed
sdhci-esdhc-imx does not need SDHCI_QUIRK_NO_CARD_NO_RESET. Make it OF-specific.
Signed-off-by: Richard Zhu
Tested-by: Wolfram Sang
---
drivers/mmc/host/sdhci-esdhc.h|3 +--
drivers/mmc/host/sdhci-of-esdhc.c |2 +-
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a
Signed-off-by: Richard Zhao
Acked-by: Wolfram Sang
---
arch/arm/mach-mx5/Kconfig |1 +
arch/arm/mach-mx5/board-mx53_loco.c |2 ++
2 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index f065a0d..a72c833 100644
-
sdhci-esdhc-imx does not need SDHCI_QUIRK_NO_CARD_NO_RESET. Make it OF-specific.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci-esdhc.h|3 +--
drivers/mmc/host/sdhci-of-esdhc.c |2 +-
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/sdhci
Signed-off-by: Richard Zhao
---
arch/arm/mach-mx5/Kconfig |1 +
arch/arm/mach-mx5/board-mx53_loco.c |2 ++
2 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index f065a0d..a72c833 100644
--- a/arch/arm/mach-mx5/K
k transfer, the controller doesn't complete the
operations automatically as required at the end of the
transfer and remains on hold if the abort command is not sent.
As a result, the TC flag is not asserted and SW received timeout
exeception. set bit1 of Vendor Spec registor to fix it
Signed
Signed-off-by: Richard Zhao
---
arch/arm/mach-mx5/clock-mx51-mx53.c | 140 ++-
arch/arm/mach-mx5/crm_regs.h|7 ++
2 files changed, 146 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c
b/arch/arm/mach-mx5/clock-mx51-mx53.
sdhci-esdhc-imx does not need SDHCI_QUIRK_NO_CARD_NO_RESET. Make it OF-specific.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci-esdhc.h|3 +--
drivers/mmc/host/sdhci-of-esdhc.c |2 +-
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/sdhci
k transfer, the controller doesn't complete the
operations automatically as required at the end of the
transfer and remains on hold if the abort command is not sent.
As a result, the TC flag is not asserted and SW received timeout
exeception. set bit1 of Vendor Spec registor to fix it
Signed
Signed-off-by: Richard Zhao
---
arch/arm/mach-mx5/Kconfig |1 +
arch/arm/mach-mx5/board-mx53_loco.c |2 ++
2 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index f065a0d..a72c833 100644
--- a/arch/arm/mach-mx5/K
Signed-off-by: Richard Zhao
---
arch/arm/mach-mx5/clock-mx51-mx53.c | 140 ++-
arch/arm/mach-mx5/crm_regs.h|7 ++
2 files changed, 146 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c
b/arch/arm/mach-mx5/clock-mx51-mx53.
Signed-off-by: Richard Zhao
---
arch/arm/plat-mxc/include/mach/iomux-mx53.h | 83 ++-
1 files changed, 43 insertions(+), 40 deletions(-)
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx53.h
b/arch/arm/plat-mxc/include/mach/iomux-mx53.h
index bae7fd0..e95d9cb 100644
Signed-off-by: Richard Zhao
---
arch/arm/mach-mx5/Kconfig |1 +
arch/arm/mach-mx5/board-mx53_loco.c |2 ++
2 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index f065a0d..a72c833 100644
--- a/arch/arm/mach-mx5/K
sdhci-esdhc-imx does not need SDHCI_QUIRK_NO_CARD_NO_RESET. Make it OF-specific.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci-esdhc.h|3 +--
drivers/mmc/host/sdhci-of-esdhc.c |2 +-
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/sdhci
Fix the NO INT in the Multi-BLK IO in SD/MMC, and
Multi-BLK read in SDIO
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci-esdhc-imx.c | 41 +++-
drivers/mmc/host/sdhci-esdhc.h |5
2 files changed, 45 insertions(+), 1 deletions(-)
diff --git a
Signed-off-by: Richard Zhao
---
arch/arm/mach-mx5/clock-mx51-mx53.c | 100 ++-
arch/arm/mach-mx5/crm_regs.h|7 +++
2 files changed, 106 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c
b/arch/arm/mach-mx5/clock-mx51-mx53
sed. According to the MMC specification, cards
with a densitygreater than 2GiB are sector addressed.
Acked-by: Linus Walleij
Signed-off-by: Hanumath Prasad
Signed-off-by: Rabin Vincent
Cc:
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
Signed-off-by: Richard Zhu
drivers/mmc/core/mm
Signed-off-by: Richard Zhu
---
arch/arm/mach-mx5/board-mx51_babbage.c | 16 ++--
arch/arm/plat-mxc/include/mach/iomux-mx51.h |8 +---
2 files changed, 19 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c
b/arch/arm/mach-mx5/board
This serial patches are based on Wolfram and Eric's eSDHC driver patchs, and
add the GPIO Write Protection, and HW bus-width cpas supports on i.MX51
BBG boards.
[PATCH 1/2] Add the GPIO Write Protection Solution on i.MX51 BBG board
arch/arm/mach-mx5/board-mx51_babbage.c | 16 ++-
---
arch/arm/mach-mx5/board-mx51_babbage.c | 16 ++--
arch/arm/plat-mxc/include/mach/iomux-mx51.h |8 +---
2 files changed, 19 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c
b/arch/arm/mach-mx5/board-mx51_babbage.c
index 476bfe4..5a69
Some HW boards may have the bus-width caps limitation in HW design refer
to the caps of the IC module.
For example, the MAX BUS width the eSDHC module on i.MX51 is up to
8bits.
But only the 1/4bits bus are supported on i.MX51 BBG boards.
Signed-off-by: Richard Zhu
---
arch/arm/mach-mx5/board
Hi All:
Sorry, for wrong --compose usage.
Hi Wolfram:
Here are the patches that enable the sdhci of i.MX51.
The IO and WP funcs are verified on i.MX51 BBG board.
The misssing bits of the HOST_CONTROL and so on had been made up in the 4-3
patch.
Hi Uwe:
I would change MSL part to the "dynamicall
Modify the machine specific codes and add the eSDHC1 and eSDHC2 support
on MX51 BBG platform.
IOMUX, CLOCK, register the device.
Signed-off-by: Richard Zhu
---
arch/arm/mach-mx5/board-mx51_babbage.c | 38 ++
arch/arm/mach-mx5/clock-mx51.c | 193
Enable the fsl esdhc driver on mx51 platforms
Signed-off-by: Richard Zhu
---
arch/arm/configs/mx51_defconfig |9 +++--
1 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm/configs/mx51_defconfig b/arch/arm/configs/mx51_defconfig
index a665ecb..4f3067b 100644
--- a
Based on SDHCI API, esdhc driver supports PIO and simple internal
DMA modes.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/Kconfig | 13 ++
drivers/mmc/host/Makefile|1 +
drivers/mmc/host/sdhci-imx.c | 395 ++
3 files changed, 409
Add host's own get_ro func to support the controller that used it's own WP
mechanism
Some controllers maybe have their exceptional WP mechanism in the different HW
design
when implement the get_ro, add one get_ro api to supported them.
Signed-off-by: Richard Zhu
---
drivers/mmc/
Based on SDHCI API, esdhc driver supports PIO and simple internal
DMA modes.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/Kconfig | 13 ++
drivers/mmc/host/Makefile|1 +
drivers/mmc/host/sdhci-imx.c | 395 ++
3 files changed, 409
Modify the machine specific codes and add the eSDHC1 and eSDHC2 support
on MX51 BBG platform.
IOMUX, CLOCK, register the device.
Signed-off-by: Richard Zhu
---
arch/arm/mach-mx5/board-mx51_babbage.c | 38 ++
arch/arm/mach-mx5/clock-mx51.c | 193
Add host's own get_ro func to support the controller that used it's own WP
mechanism
Some controllers maybe have their exceptional WP mechanism in the different HW
design
when implement the get_ro, add one get_ro api to supported them.
Signed-off-by: Richard Zhu
---
drivers/mmc/
Enable the fsl esdhc driver on mx51 platforms
Signed-off-by: Richard Zhu
---
arch/arm/configs/mx51_defconfig |9 +++--
1 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm/configs/mx51_defconfig b/arch/arm/configs/mx51_defconfig
index a665ecb..4f3067b 100644
--- a
Hi Wolfram:
Here are the patches that I changed the codes refer to your previous comments.
The data IO and WP func are verified on the i.MX51 BBG board.
The missing bits of the HOST_CONTROL and so on had been complemented in 4-3
patch.
Hi Uwe:
The MSL specifed part code is still on-going.
I woul
Enable the fsl esdhc driver on mx51 platforms
Signed-off-by: Richard Zhu
---
arch/arm/configs/mx51_defconfig |9 +++--
1 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/arch/arm/configs/mx51_defconfig b/arch/arm/configs/mx51_defconfig
index a665ecb..30a0d59 100644
--- a
Based on SDHCI platform API, PIO and simple internal DMA
are enabled.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/Kconfig | 12 +
drivers/mmc/host/Makefile|1 +
drivers/mmc/host/sdhci-fsl.c | 481 ++
3 files changed, 494 insertions
Modify the MSL codes and add the eSDHC1 and eSDHC2 support
on MX51 BBG platform.
IOMUX, CLOCK, register the device.
Signed-off-by: Richard Zhu
---
arch/arm/mach-mx5/board-mx51_babbage.c | 70 +++
arch/arm/mach-mx5/clock-mx51.c | 197
arch/arm
Modify the plat-mxc related MSL codes.
Signed-off-by: Richard Zhu
---
arch/arm/plat-mxc/include/mach/iomux-mx51.h | 31 ++
arch/arm/plat-mxc/include/mach/mmc.h|9 +++
2 files changed, 26 insertions(+), 14 deletions(-)
diff --git a/arch/arm/plat-mxc
The FSL's eSDHC have one 32bit register that combine the two
16bit Transfer Mode and Command registers.
Add this quirk to let SW driver to support FSL's eSDHC.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci.c | 25 +++--
drivers/mmc/host/sdhci.h |2 +
Add make_blksz api to support FSL eSDHC, because that FSL's eSDHC
don't have the standard BLOCK ATTR register, add this api to
configure the blksz properly.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci.c |9 -
drivers/mmc/host/sdhci.h |1 +
2 files changed, 9
Add NONSTANDARD_HOST_CTL quirk flags, because that FSL's eSDHC
don't have the standard HOST CTL register, add this quirk to
configure the bus_width and DMA properly.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci.c | 45 ++---
driver
Some controllers have their own WP mechanism when implement the get_ro, add one
get_ro api to supported them.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci.c |3 +++
drivers/mmc/host/sdhci.h |1 +
2 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host
FSL's eSDHC controllers don't have the STANDARD POWER register in
the IC design, add the set_power api to support the FSL's eSDHC.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci.c |5 +
drivers/mmc/host/sdhci.h |1 +
2 files changed, 6 insertions(+), 0 del
Hi All:
Can you help me to review the following serial patchs, that enable the sdhci
driver to support FSL's eSDHC on i.MX family.
Thanks in advanced.
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