RE: [PATCH RESEND v3 0/7] mmc: distinguish DDR timing mode for eMMC/UHS

2014-04-03 Thread Seungwon Jeon
On Wed, April 02, 2014, Ulf Hansson wrote: > On 14 March 2014 13:11, Seungwon Jeon wrote: > > These changes intend to distinguish two DDR timing modes related to eMMC & > > UHS. > > Even though two modes are different actually, UHS_DDR50 is used as eMMC DDR > > mode. > > MMC_TIMING_MMC_DDR52 mod

Re: [PATCH RESEND v3 0/7] mmc: distinguish DDR timing mode for eMMC/UHS

2014-04-02 Thread Ulf Hansson
On 14 March 2014 13:11, Seungwon Jeon wrote: > These changes intend to distinguish two DDR timing modes related to eMMC & > UHS. > Even though two modes are different actually, UHS_DDR50 is used as eMMC DDR > mode. > MMC_TIMING_MMC_DDR52 mode is added. This will likely be one of first patchset

[PATCH RESEND v3 0/7] mmc: distinguish DDR timing mode for eMMC/UHS

2014-03-14 Thread Seungwon Jeon
These changes intend to distinguish two DDR timing modes related to eMMC & UHS. Even though two modes are different actually, UHS_DDR50 is used as eMMC DDR mode. MMC_TIMING_MMC_DDR52 mode is added. Changes in V3: (6/7) Added MMC-DDR52 mode instead of replacing UHS-DDR50 in dw_mmc-exynos