From: Jarkko Sakkinen
Updated Documentation/ABI/testing/sysfs-driver-ppi in order to explain
where PPI attributes are located and how backwards compatibility is
addressed.
Signed-off-by: Jarkko Sakkinen
Signed-off-by: Peter Huewe
(cherry picked from commit b8e98dcdc5ad24bbecc763cd0ac87bbde602e
This should be tied into the recent TPM patches in standard/base.
There is no code change for this patch.
Jarkko Sakkinen (1):
tpm: update PPI documentation to address the location change.
Documentation/ABI/testing/sysfs-driver-ppi | 19 ---
1 file changed, 12 insertions(+), 7
From: Len Brown
Skylake CPU base-frequency and TSC frequency may differ
by up to 2%.
Enumerate CPU and TSC frequencies separately, allowing
cpu_khz and tsc_khz to differ.
The existing CPU frequency calibration mechanism is unchanged.
However, CPUID extensions are preferred, when available.
CPU
From: Bin Gao
Hard code the BXT crystal clock (aka ART - Always Running Timer)
to 19.200 MHz, and use CPUID leaf 0x15 to determine the BXT TSC frequency.
Use tsc_khz to sanity check BXT cpu_khz,
which can be erroneous in some configurations.
Signed-off-by: Bin Gao
[lenb: simplified]
Signed-off
This patch allows clock frequencies to be calibrated if TSC and CPU
frequencies differ. This is not in the latest kernel tree yet, so this
should go into standard/intel/base.
Tested with Apollo Lake.
Bin Gao (1):
x86 tsc: enumerate BXT tsc_khz via CPUID
Len Brown (1):
x86 tsc: enumerate SKL
On 2016-06-22 05:28 AM, rebecca.swee.fun.ch...@intel.com wrote:
From: Rebecca Chang Swee Fun
Hi,
This series of patches are cherry-picked from yocto-4.4 branch
and intend to merge into yocto-4.1. The fragments involved are
generally used by Atom based BSP. This backport also enabled
linux kern
On 2016-06-21 06:55 PM, California Sullivan wrote:
Hi Bruce,
Seems that the original ALSA backport missed this patch. See bug 9804.
Please apply to linux-yocto-4.4 standard/intel/bxt-rebase branch.
thanks for sending this along, merged.
Bruce
Thanks,
Cal Sullivan
Libin Yang (1):
ALSA:
From: California Sullivan
This feature enables the Intel Telemerty driver for Apollo Lake and
newer platforms. The feature adds an interface to the debugfs for SoC
state monitoring.
Signed-off-by: California Sullivan
Signed-off-by: Bruce Ashfield
(cherry picked from commit da24a9810dfc03dcc0b9
From: California Sullivan
Adds support to features found on Broxton SoCs.
Signed-off-by: California Sullivan
Signed-off-by: Bruce Ashfield
(cherry picked from commit 38418ce0e5ef5eb4f6ba05175394c8db9f7dfc1c)
Signed-off-by: Rebecca Chang Swee Fun
---
bsp/intel-common/intel-core2-32.scc | 1 +
From: California Sullivan
intel-telemetry is a 64 bit feature available on the Apollo Lake
platform and beyond.
Signed-off-by: Bruce Ashfield
(cherry picked from commit 9ab4787fe2aea2ae0fcc31a5e067eaba19ef64c8)
Signed-off-by: Rebecca Chang Swee Fun
---
bsp/intel-common/intel-corei7-64.scc | 3
From: California Sullivan
A common configuration is shared across many platforms. Use a feature
instead of additional configuration options in each file.
Signed-off-by: California Sullivan
Signed-off-by: Bruce Ashfield
(cherry picked from commit 60430c970998c6d7d89a37f03cf8400862960224)
Signed
From: California Sullivan
This feature fragment should support most functions provided by the
Broxton SoC.
Signed-off-by: California Sullivan
Signed-off-by: Bruce Ashfield
(cherry picked from commit 583db5be52dc93045c0b5da8ccd46b7f4692bff0)
Signed-off-by: Rebecca Chang Swee Fun
---
features/
From: California Sullivan
These features support DesignWare USB2 and USB3 controllers and are
used by many SoCs.
Signed-off-by: California Sullivan
Signed-off-by: Bruce Ashfield
(cherry picked from commit 40f6f61d46dd740b300f116123af11057396)
Signed-off-by: Rebecca Chang Swee Fun
---
fea
From: California Sullivan
Sound over USB is very common and should be part of general sound
configuration.
Signed-off-by: California Sullivan
Signed-off-by: Bruce Ashfield
(cherry picked from commit 3892d72d041c02bd88b7a3d4fca2cbec8f07b24c)
Signed-off-by: Rebecca Chang Swee Fun
---
cfg/sound
From: California Sullivan
We already get this option through a select. Add it to the configuration
for clarity.
Signed-off-by: California Sullivan
Signed-off-by: Bruce Ashfield
(cherry picked from commit 4a253747f91a06300abe24a8b0ad047f501a745e)
Signed-off-by: Rebecca Chang Swee Fun
---
feat
From: California Sullivan
Configure PWMs on Intel platforms as modules and add it to intel-common-drivers.
Remove PWM configurations from baytrail.cfg since its enabled elsewhere.
Signed-off-by: California Sullivan
Signed-off-by: Bruce Ashfield
(cherry picked from commit eeabc133bf6bada67099b6
From: Rebecca Chang Swee Fun
Hi,
This series of patches are cherry-picked from yocto-4.4 branch
and intend to merge into yocto-4.1. The fragments involved are
generally used by Atom based BSP. This backport also enabled
linux kernel v4.1.x support for Broxton soc in common bsp.
Please review an
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