nges up to dee4fa366c2466f4f1ed8f7c7924a744c90306b0:
netdev: octeon-bgx-port: Destroy workqueue only if it had been created.
(2015-04-29 12:07:01 +0530)
----
Abhishek Paliwal (48):
netdev: octeon3-ethernet: Allow cpus to bind to the maxi
for you to fetch changes up to dee4fa366c2466f4f1ed8f7c7924a744c90306b0:
netdev: octeon-bgx-port: Destroy workqueue only if it had been created.
(2015-04-29 12:07:01 +0530)
--------
Abhishek Paliwal (48):
netdev: octeon3-ethernet: Allow cpus to bind to
to fetch changes up to c6dbf6731f79c72d91f5052896540b3dc073ae9c:
netdev: octeon-ethernet: Streamline logic to determine if hardware should
calculate L3/L4 checksum. (2015-04-13 15:54:23 +0530)
--------
Abhishek Paliwal (54):
MIPS: OCTEON: Define cpu_has_local
another new branch?
If not then, please suggest us how to submit these changes to you to push them
to yocto kernel mainline.
Regards,
Abhishek
-Original Message-
From: Bruce Ashfield [mailto:bruce.ashfi...@windriver.com]
Sent: 02 March 2015 10:30
To: Abhishek Paliwal
Cc: linux-yocto
4:38 +0530)
----
Abhishek Paliwal (147):
Replace OCTEON_IS_OCTEON2() and OCTEON_IS_OCTEON3() with appropriate
current_cpu_type().
MIPS: OCTEON: Fix L1 dacache parity for OCTEON3
MIPS/EDAC: Cavium: Updated L2C error ch
y to respond.
- Armin
On 01/12/2015 02:41 AM, Abhishek Paliwal wrote:
> These patches cover basic OCTEONIII support.
>
> Abhishek Paliwal (9):
>MIPS OCTEON Add OCTEON3 to get cpu type
>MIPS OCTEON Enable use of FPU
>MIPS Add function get ebase cpunum
>MIPS A
ensuring that the support for previous simulators (like CN56xx, CN68xx) are not
broken while submitting.
Regards,
Abhishek
-Original Message-
From: Bruce Ashfield [mailto:bruce.ashfi...@windriver.com]
Sent: 15 January 2015 10:40
To: Abhishek Paliwal; linux-yocto@yoctoproject.org
Subject: Re
lf Baechle
Signed-off-by: Abhishek Paliwal
---
.../asm/mach-cavium-octeon/cpu-feature-overrides.h | 1 -
arch/mips/kernel/Makefile | 2 +-
arch/mips/kernel/branch.c | 6 +-
arch/mips/kernel/octeon_switch.S | 85 --
From: David Daney
Some versions of the assembler will not assemble CFC1 for OCTEON, so
override the ISA for these.
Signed-off-by: David Daney
Signed-off-by: Abhishek Paliwal
---
arch/mips/kernel/ptrace.c | 24
arch/mips/kernel/ptrace32.c | 12 ++--
2 files
-mips.org/patch/7010/
Signed-off-by: Ralf Baechle
Signed-off-by: Abhishek Paliwal
---
arch/mips/mm/tlbex.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index aa24119..c05f2fd 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips
From: Chandrakala Chavva
Read clock rate from the correct CSR. Don't clear COP0_DCACHE for OCTEONIII.
Signed-off-by: Chandrakala Chavva
Signed-off-by: Abhishek Paliwal
---
arch/mips/Makefile | 7 +
arch/mips/cavium-octeon/csrc-octeon.c
From: David Daney
Disable ICache prefetch for certian Octeon II processors.
Signed-off-by: David Daney
Signed-off-by: Abhishek Paliwal
---
.../asm/mach-cavium-octeon/kernel-entry-init.h | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/mips/include/asm/mach
/patch/7014/
Signed-off-by: Ralf Baechle
Signed-off-by: Abhishek Paliwal
---
arch/mips/include/asm/cpu-type.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/mips/include/asm/cpu-type.h b/arch/mips/include/asm/cpu-type.h
index 02f591b..19557ca 100644
--- a/arch/mips/include/asm/cpu-type.h
://patchwork.linux-mips.org/patch/7003/
Signed-off-by: Ralf Baechle
Signed-off-by: Abhishek Paliwal
---
arch/mips/include/asm/r4kcache.h | 2 ++
arch/mips/mm/c-r4k.c | 47
2 files changed, 45 insertions(+), 4 deletions(-)
diff --git a/arch/mips
From: David Daney
Signed-off-by: David Daney
Signed-off-by: Abhishek Paliwal
---
arch/mips/cavium-octeon/setup.c| 4 +---
.../include/asm/mach-cavium-octeon/kernel-entry-init.h | 18 --
2 files changed, 17 insertions(+), 5 deletions(-)
diff --git a
://patchwork.linux-mips.org/patch/7012/
Signed-off-by: Ralf Baechle
Signed-off-by: Abhishek Paliwal
---
arch/mips/include/asm/mipsregs.h | 8
arch/mips/kernel/cpu-probe.c | 2 +-
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm
These patches cover basic OCTEONIII support.
Abhishek Paliwal (9):
MIPS OCTEON Add OCTEON3 to get cpu type
MIPS OCTEON Enable use of FPU
MIPS Add function get ebase cpunum
MIPS Add minimal support for OCTEON3 to c-r4k.c
MIPS donot build fast TLB refill handler with 32-bit kernels
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