Anton wrote:
> P.S. Flash chip is *infamous* SST25LF080A :-)
Ah, flashrom of course does not support SPI chips.
>>> Yep. Solutions / ideas?
>> olpcflash should work.
>
> He-he. SST and Winbond are there :)
olpcflash will not work. olpcflash does very specific things that are
On Sat, Mar 31, 2007 at 05:33:10PM -0500, Bari Ari wrote:
> That's why I'm doing the low cost In-Circuit FLASH Programmer and
> Logic Analyzer. Programming SPI Flash in circuit will be no
> problem. Just attach an adapter and program away.
Regarding this, how do you feel about powering the flash c
One possible bug:
/* 3. Perform 8 refresh cycles. Wait tRC each time. */
PRINT_DEBUG("RAM Enable 3: CBR\r\n");
for (i = 0; i < 8; i++) {
do_ram_command(ctrl, RAM_COMMAND_CBR, 0);
mdelay(10);
}
Don't do_ram_command() in the loop, all
On Sun, Apr 01, 2007 at 10:53:36PM +0400, Anton wrote:
> flashrom seems to work on ICH6 (and obviously on ICH7 in my
> previous post), despite the fact that BIOS_CNTL register isn't
> correctly set
Sorry, no.
> "Enabling flash write on ICH6-M...tried to set 0xdc to 0x3 on
> ICH6-M failed (WARNIN
On 4/1/07, koko <[EMAIL PROTECTED]> wrote:
[EMAIL PROTECTED]:~$ sudo isadump -f 0xe440 16
0 1 2 3 4 5 6 7 8 9 a b c d e f
e440: 10 00 00 00 71 00 00 00 fd 02 c0 00 ff f6 ff 0f
[EMAIL PROTECTED]:~$ sudo i2cdetect -y 0 |grep 50
50: XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX
bit 0 0xe44d
[EMAIL
On Mon, Apr 02, 2007 at 12:36:28AM +0200, Uwe Hermann wrote:
> Here's a quick review:
>
> On Mon, Mar 26, 2007 at 04:59:18PM +0200, Luc Verhaegen wrote:
> > been relegated to flash_rom.c. Then there's only some extraneous
> > whitespace removal and replacing // with /* */. I'm not sure how svn
>
Here's a quick review:
On Mon, Mar 26, 2007 at 04:59:18PM +0200, Luc Verhaegen wrote:
> been relegated to flash_rom.c. Then there's only some extraneous
> whitespace removal and replacing // with /* */. I'm not sure how svn
> handles moving of files, but that's usually a good point to do such
>
On Sun, Apr 01, 2007 at 11:24:41PM +0200, Luc Verhaegen wrote:
> On Sun, Apr 01, 2007 at 10:00:32PM +0200, [EMAIL PROTECTED] wrote:
> > Author: uwe
> > Date: 2007-04-01 22:00:32 +0200 (Sun, 01 Apr 2007)
> > New Revision: 2578
> >
> > Modified:
> >trunk/LinuxBIOSv2/util/flashrom/flash.h
> > Log
On Sun, Apr 01, 2007 at 10:00:32PM +0200, [EMAIL PROTECTED] wrote:
> Author: uwe
> Date: 2007-04-01 22:00:32 +0200 (Sun, 01 Apr 2007)
> New Revision: 2578
>
> Modified:
>trunk/LinuxBIOSv2/util/flashrom/flash.h
> Log:
> Drop useless and partly even incorrect comments (trivial).
Was this really
Dear LinuxBIOS readers!
This is the automated build check service of LinuxBIOS.
The developer "uwe" checked in revision 2578 to
the LinuxBIOS source repository and caused the following
changes:
Change Log:
Drop useless and partly even incorrect comments (trivial).
Signed-off-by: Uwe Hermann <[
I started a thread (well, its me talking to myself) "read the spd on
A7V133" on lm-sensors list. My conclusions:
E:\dane\Testery !\sandra>SPDINFO.EXE 1 a7v
Ctrl 0, SMBus, Sys, IO e800h, Mem h, Drv Intel PIIX4 SMBus
/ compatible, Brd A7V
Mux 0 Asus IO mux, IO e44dh, Ext 4267320
[EM
Dear LinuxBIOS readers!
This is the automated build check service of LinuxBIOS.
The developer "uwe" checked in revision 2577 to
the LinuxBIOS source repository and caused the following
changes:
Change Log:
Coding style fixes (trivial).
Signed-off-by: Uwe Hermann <[EMAIL PROTECTED]>
Acked-by: U
Author: uwe
Date: 2007-04-01 22:00:32 +0200 (Sun, 01 Apr 2007)
New Revision: 2578
Modified:
trunk/LinuxBIOSv2/util/flashrom/flash.h
Log:
Drop useless and partly even incorrect comments (trivial).
Signed-off-by: Uwe Hermann <[EMAIL PROTECTED]>
Acked-by: Uwe Hermann <[EMAIL PROTECTED]>
Modifi
Author: uwe
Date: 2007-04-01 21:44:21 +0200 (Sun, 01 Apr 2007)
New Revision: 2577
Modified:
trunk/LinuxBIOSv2/util/flashrom/82802ab.h
trunk/LinuxBIOSv2/util/flashrom/am29f040b.c
trunk/LinuxBIOSv2/util/flashrom/flash.h
trunk/LinuxBIOSv2/util/flashrom/jedec.h
trunk/LinuxBIOSv2/util/fl
I messed up the ITE Super I/Os, time to fix them...
More patches will follow.
Uwe.
--
http://www.hermann-uwe.de | http://www.holsham-traders.de
http://www.crazy-hacks.org | http://www.unmaintained-free-software.org
The *_early_serial.c pre-RAM code should do just that -- enable the serial
port(s
flashrom seems to work on ICH6 (and obviously on ICH7 in my previous post),
despite the fact that BIOS_CNTL register isn't correctly set
"Enabling flash write on ICH6-M...tried to set 0xdc to 0x3 on ICH6-M failed
(WARNING ONLY)"
Unfortunately, I can't say for sure which flashchip is hidden inside
Dear LinuxBIOS readers!
This is the automated build check service of LinuxBIOS.
The developer "uwe" checked in revision 2576 to
the LinuxBIOS source repository and caused the following
changes:
Change Log:
Initial Intel 440BX RAM initialization framework.
This does _not_ fully work, yet. You w
On Sun, Apr 01, 2007 at 06:59:20PM +0200, Stefan Reinauer wrote:
> * Uwe Hermann <[EMAIL PROTECTED]> [070401 18:50]:
> > This is a first version of my RAM init code for the 440BX.
> >
> > It does _not_ work, yet. Don't try to use it unless you know what you're
> > doing.
>
> Acked-by: Stefan Rei
Author: uwe
Date: 2007-04-01 19:24:03 +0200 (Sun, 01 Apr 2007)
New Revision: 2576
Modified:
trunk/LinuxBIOSv2/src/northbridge/intel/i440bx/Config.lb
trunk/LinuxBIOSv2/src/northbridge/intel/i440bx/chip.h
trunk/LinuxBIOSv2/src/northbridge/intel/i440bx/northbridge.c
trunk/LinuxBIOSv2/src/
* Uwe Hermann <[EMAIL PROTECTED]> [070401 18:50]:
> This is a first version of my RAM init code for the 440BX.
>
> It does _not_ work, yet. Don't try to use it unless you know what you're
> doing.
Acked-by: Stefan Reinauer <[EMAIL PROTECTED]>
>
> Uwe.
> --
> http://www.hermann-uwe.de | http:
This is a first version of my RAM init code for the 440BX.
It does _not_ work, yet. Don't try to use it unless you know what you're
doing.
Uwe.
--
http://www.hermann-uwe.de | http://www.holsham-traders.de
http://www.crazy-hacks.org | http://www.unmaintained-free-software.org
Initial Intel 440B
so far there is do explicit support, but it would make some sense. PCI
expansion ROM is not a full-scale replacement for main BIOS though. PCI
ROM is called rather later during initialization from legacy BIOS. There
is public linux code for flashing via RTL Nic cards around however, and
it migh
Hi can LinuxBios Take advantage of additional ROM space on addon cards?,
i.e i have a addon RTL1839B card with space of a rom, i also have a rom pulled
from a broken motherboard that fits,
would it be possible to either flash with a backup emergancy rom or put
LinuxBios on it and it can be part
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