On Tue, 8 May 2007 11:15:25 -0700
"Kenji Noguchi" <[EMAIL PROTECTED]> wrote:
>
> ps. anyone interested to port LB to MIPS? gxemul is my target so far.
Which CPU?
Thanks.
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On Sat, 28 Apr 2007 18:20:45 +0200
Quux <[EMAIL PROTECTED]> wrote:
> yo dudes !
>
> I wonder: if someone wanted to avoid soldering, could he use the below
> clip (solderless) and flash the M57sli v.2.0 SPI onboard, while the mobo
> is powered of ? A "willem.org" programmer is cheaper than a ne
On Thu, 26 Apr 2007 07:39:21 +0100
"Joe Pub" <[EMAIL PROTECTED]> wrote:
Peter, Joe. Could it be VMware's misconfiguration?
I would done the following: use etherboot payload, then try to mount
/dev/hda1 partition. Or rather test - dd if=/dev/hda bs=1k count=1 of=/dev/null
If there's an error in t
On Sun, 22 Apr 2007 12:46:26 -0700
"Nicholas Veeser" <[EMAIL PROTECTED]> wrote:
> So I have what I thought was an 8MB flash device on my motherboard. (Tyan
> s2895)
> with this I am using the RD1-LPC8 as a backup.
>
> Well for my first test I read the flash from the original ROM.
> Flipped the s
On Wed, 11 Apr 2007 15:37:37 -0500
Bari Ari <[EMAIL PROTECTED]> wrote:
> Anton wrote:
> > I would like to change flash-chip, which is soldered on my board onto
> > another one.
> > Keeping in mind the size of IC and it's format (DIP/PLCC32/SO8), what
> > s
On Wed, 11 Apr 2007 21:20:52 +0200
Luc Verhaegen <[EMAIL PROTECTED]> wrote:
> On Wed, Apr 11, 2007 at 11:06:23PM +0400, Anton wrote:
> > Could someone verify that dumping flash contents on following ASUS boards
> > is possible?
> >
> > 1) ASUS A7V8X-X, VT823
Could someone verify that dumping flash contents on following ASUS boards is
possible?
1) ASUS A7V8X-X, VT8235, PMC_49FL002
2) ASUS A7V600, obviously the same, PMC_49FL002
flashrom should be 2581 or later revision.
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I would like to change flash-chip, which is soldered on my board onto another
one.
Keeping in mind the size of IC and it's format (DIP/PLCC32/SO8), what should I
be
aware of?
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On Thu, 5 Apr 2007 11:27:11 -0700
"Beneo" <[EMAIL PROTECTED]> wrote:
> Hi all,
>
> I was using LinuxBIOS to boot Linux from IDE from a Broadcom HT,1000 south
> bridge based platform , I encounter an issue which is hard to understand. I
> hope somebody can give me some insight.
>
> During bo
flashrom seems to work on ICH6 (and obviously on ICH7 in my previous post),
despite the fact that BIOS_CNTL register isn't correctly set
"Enabling flash write on ICH6-M...tried to set 0xdc to 0x3 on ICH6-M failed
(WARNING ONLY)"
Unfortunately, I can't say for sure which flashchip is hidden inside
>
> Do you have equipment to analyze the signals to the flash chip?
> Ideally a logic analyzer, but a 20MHz scope can work too.
That's ideally. In reality, several things are absent.
>
> There's no other way to debug this code. :\
Except to rev-eng the code, original flasher use
On Sat, 31 Mar 2007 04:03:25 +0200
Peter Stuge <[EMAIL PROTECTED]> wrote:
> I estimate adding this SPI support is a day or two's worth of
> hacking. A board is needed to test. (Mostly to learn if and how the
> SPI master has been locked down by the factory BIOS.)
Feel free to address hw t
On Sat, 31 Mar 2007 01:56:32 +0200
Carl-Daniel Hailfinger <[EMAIL PROTECTED]> wrote:
> On 31.03.2007 01:49, Anton wrote:
> > On Sat, 31 Mar 2007 01:19:33 +0200
> > Stefan Reinauer <[EMAIL PROTECTED]> wrote:
> >
> >> * Uwe Hermann <[EMAIL PROTE
On Sat, 31 Mar 2007 01:19:33 +0200
Stefan Reinauer <[EMAIL PROTECTED]> wrote:
> * Uwe Hermann <[EMAIL PROTECTED]> [070330 18:32]:
> > But it doesn't.
> >
> > P.S. Flash chip is *infamous* SST25LF080A :-)
>
> Ah, flashrom of course does not support SPI chips.
Yep. Solutions / ideas?
flashrom's output below. what I've missed so far?
Calibrating delay loop... Setting up microsecond timing loop
798M loops per second
ok
No LinuxBIOS table found.
Enabling flash write on ICH7DH...tried to set 0xdc to 0x3 on ICH7DH failed
(WARNING ONLY)
Trying Am29F040B, 512 KB
probe_29f040b: id1 0
# dmidecode:
# dmidecode 2.9
SMBIOS 2.3 present.
40 structures occupying 1276 bytes.
Table at 0x000F0100.
Handle 0x, DMI type 0, 20 bytes
BIOS Information
Vendor: Award Software International, Inc.
Version: F2
Release Date: 07/27/2005
Address: 0xE
Runtime Size: 128 kB
R
On Thu, 22 Mar 2007 15:16:42 +0100
Stefan Reinauer <[EMAIL PROTECTED]> wrote:
> * Stefan Reinauer <[EMAIL PROTECTED]> [070322 15:08]:
> > This is a structure found in every award bios image
>
> A similar structure is found in ASUS branden bioses. Look at
> ASUSBIOS.PAS in uniflash
Feat
Can someone give me a pointer on flashrom programming?
I look into sst28sf040.h, there are 3 functions available: probe(),
erase(), write(). How the read() from chip is implemented?
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On Wed, 14 Mar 2007 06:31:16 +0100
Peter Stuge <[EMAIL PROTECTED]> wrote:
> On Tue, Mar 13, 2007 at 07:06:54PM +0100, Stefan Reinauer wrote:
> > That's an SPI flash, so I would guess using "olpcflash" as a basis
> > might be a good idea.
>
> Not neccessarily (without looking further at olpcflash)
On Tue, 13 Mar 2007 19:06:54 +0100
Stefan Reinauer <[EMAIL PROTECTED]> wrote:
> * Uwe Hermann <[EMAIL PROTECTED]> [070313 17:41]:
> > On Tue, Mar 13, 2007 at 11:37:10PM +0800, Anton wrote:
> > > How to physically route signals is clear. Programming chip - my g
On Mon, 12 Mar 2007 13:30:23 -0400
Richard Smith <[EMAIL PROTECTED]> wrote:
> Carl-Daniel Hailfinger wrote:
>
> >>> Yeah, sorry, my bad :( I was referring to LPC (PLCC32). I don't know
> >>> anything
> >>> about SPI.
> >> O'k. Does anyone common w/ SPI flashing / BIOS Saviour tools out there?
>
On Mon, 12 Mar 2007 13:30:23 -0400
Richard Smith <[EMAIL PROTECTED]> wrote:
> Where is the LPC <-> SPI being done? Can the northbridge do both? If
> there is a additional chip (say like an EC) that does the LPC to SPI
> conversion then there might be a way to put that device into recovery
> m
On Mon, 12 Mar 2007 11:53:43 -0400
Ward Vandewege <[EMAIL PROTECTED]> wrote:
> On Mon, Mar 12, 2007 at 04:50:18PM +0100, Carl-Daniel Hailfinger wrote:
> > On 12.03.2007 16:29, Ward Vandewege wrote:
> > > On Mon, Mar 12, 2007 at 11:22:12PM +0800, Anton wrote:
>
On Mon, 12 Mar 2007 16:33:26 +0100
Quux <[EMAIL PROTECTED]> wrote:
> Anton schrieb:
> >> According to this picture, some of the boards obviously have a bios
> >> socket. How can we find out where to get those instead of the
> >> soldered-only boards?
> >&
On Mon, 12 Mar 2007 14:57:56 +0100
Stefan Reinauer <[EMAIL PROTECTED]> wrote:
> * Uwe Hermann <[EMAIL PROTECTED]> [070312 14:46]:
> > On Mon, Mar 12, 2007 at 01:12:37PM +0100, ST wrote:
> > > Am Montag, 12. März 2007 12:23 schrieb Stefan Reinauer:
> > > > * ST <[EMAIL PROTECTED]> [070312 11:58]:
>
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On Mon, 5 Mar 2007 20:18:51 +0300
"Mikhail Savchenko" <[EMAIL PROTECTED]> wrote:
> Are there any ways boot to dos from LinuxBios?
ADLO.
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On Thu, 9 Nov 2006 18:37:08 +0100
Peter Stuge <[EMAIL PROTECTED]> wrote:
> On Thu, Nov 09, 2006 at 03:42:20PM +0100, Kurt André Selbach wrote:
> > Hi!
> >
> > I'm trying to get a working linuxbios on my Via epia m2 12000,
> > with 1200mhz processor and 512mb ram.
> >
> > The goal is to boot linu
On Sun, 3 Dec 2006 04:01:15 +0100
Peter Stuge <[EMAIL PROTECTED]> wrote:
> On Sat, Dec 02, 2006 at 03:10:02PM -0500, Corey Osgood wrote:
> > I'm thinking something like this: connect two plcc sockets
> > together, back to back, sodiering together all the connectors
> > except chip enable and/or po
It would be nice to have TMS (Test Monitor System) onboard. Some big vendors
have it on their systems for ages.
Pros:
a) Test for DRAM
b) Test for Media (HDD, CF, SD, ..) connected to the host
c) Test for Peripherals
Cons:
a) size. may not fit into 1/2/4 Mbit.
TMS is a regular payload, access is
Hi.
IIRC, LinuxBIOS is available for Alpha, x86 and .. it's all? No MIPS?
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On Mon, 20 Nov 2006 07:56:28 -0700
Myles Watson <[EMAIL PROTECTED]> wrote:
> I am using the IOSS BIOS Savior - RD1-PMC4.
>
> Myles
>
Are there BIOS Saviors w/ SPI chips somewhere in universe? :)
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>
> Anyone into clusters? ;-)
openMosix is O'k? ;-)
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its very doubtful
> you can get the docs for the chipsets.
Richard, this looks like a spam.
-Anton
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7;ve asked sale price, if
you're interested - drop an email to my box.
-Anton
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d be nice.
There were discussions about EPIA-M, -MII, -MS quite recently (for a
period of 6 months). In 99% of all cases these boards ought to work.
-Anton
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is why i am asking. Thank You
Desired CPU power?
-Anton
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> that I couldn't read the original BIOS didn't on the other hand keep me from
> flashing
> the part on the RD1.
>
> The big problem now is that I'm not able to erase the flash anymore, making
> it quite
> hard to continue developing my LinuxBIOS.
uot;right" way compiles the first time around, that'd be
> something.
What is your snapshot version? VGA ROM revision?
-Anton
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ed chip. SST49LF004B.
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On Sun, 26 Feb 2006 16:55:54 +0100
Peter Stuge <[EMAIL PROTECTED]> wrote:
> On Sun, Feb 26, 2006 at 06:00:07PM +0300, Anton Borisov wrote:
> > Hello.
> > There is a tricky case - I can't see which exactly flash chip
> > installed in system. flashrom from
Sincerely, Anton Borisov
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I see no problems with that.
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