d.
Only on the newer boards i suppose?
ST
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27;s like taking an umbrella with you to prevent
it from raining :-).
ST
PS: Please post to linuxbios list so others can find answers to your question
also.
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Hi
> > Mh, i don't know anything about SPI, but i think if they also have
> > #init pins it should work.
> They don't.
Not good.
If i remember correctly on my v1.0 M57SLI-S4 there have been SPI pins within
the PLCC connectors. These pins where not connected to any of the open
presumably SPI pins
Hi
> > Is the modification now wrong?
> ST, can you chime in here?
Mh, i don't know anything about SPI, but i think if they also have #init pins
it should work.
Just my 2ct
ST
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g is not supported. Please look at the thread:
"Fix processor name string for Rev. F CPUs" on this mailing list.
ST
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Hi Carl-Daniel
> Did that work out?
No :-(. I just tried right now, but it didn't work. Unfortunatly i didn't save
the output of lspci but it appeared the same to me as before. If you guys
have some other suggestions to get PCI cards working on this board, let me
know :-).
Regard
esides the source which documents the inner workings of LB? I
didn't find anything on linuxbios.org.
Btw. http://linuxbios.org/FAQ seems to be borken.
Regards
ST
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ime to look into it myself :-(.
ST
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f lspci -vvvnx under the
original bios version f8 and under linuxbios updated from today (2007-05-08).
Best regards
ST
00:00.0 0500: 10de:0369 (rev a1)
Subsystem: 1458:5001
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr-
Stepping- SERR- FastB2B-
Status: C
n maintain it on the wiki
but i need an account?
Good night
ST
chipaddress: 290
0 13
1 10
2 0
3 0
4 ff
5 ff
6 0
7 37
8 ff
9 87
a 2c
b 9
c 7
d 7
e 78
f 9d
10 fe
11 ff
12 ff
13 74
14 d7
15 7f
16 7f
17 82
18 2
19 1
1a 1
1b ff
1c ff
1d ff
1e ff
1f ff
20 4c
21 78
22 cb
23 b6
2
hangs off the isa bus.
I think thats inb for byte access and inw for word access (16 bit). You need
to be root to do this though. The addresses can be taken right from the
datasheet.
Best regards
ST
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ch to a fallback option. Don't know about the rest.
ST
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dmesg output (see below).
Fortunately i can report that my little soldering work is working fine. I can
switch between original Bios and Linuxbios. When running linuxbios i can't do
a reboot but have to powercycle the system, but that is a minor setback.
Best Regards
ST
suspicious dmesg ou
to fit into the flash. Is it possible to fit a 2.6.2x
kernel into 4MBit flash-rom?
Thanks
ST
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t;> Current kernels only need "acpi_use_timer_override" as cmdline
> > >> option for successfull booting.
> > >Do we know why?
> > Well actually i filed a bugreport:
> > http://bugzilla.kernel.org/show_bug.cgi?id=8219
> Nice! Still status NEEDINFO t
Hi Peter
Am Donnerstag, 19. April 2007 05:44 schrieb Peter Stuge:
> On Wed, Apr 18, 2007 at 10:26:55PM +0200, ST wrote:
> > http://private.vlsi.informatik.tu-darmstadt.de/st/instructions.html
> Shows up blank in my mozilla, but read it in lynx.
Huh?! Thats really plain HTML and i c
t; as cmdline option for
successfull booting.
ST
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Hi
As promised you will find the instructions at:
http://private.vlsi.informatik.tu-darmstadt.de/st/instructions.html
If you have any suggestions/corrections whatever please let me know.
I haven't had the time testing flashing the flash-roms, but i can switch
between the two chips which
e a non finished
DualBios. But of course i'd like to hear if s.o. knows better...
ST
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by a
pull-up resistor (which i didn't found). But i will post s.t. detailled with
images and stuff so anyone with little solder experience can do it herself.
ST
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Hi Beth
> One question, how did you disabled the soldered bios?, ( I think that
> something related with the #init pin, but how? )
I didn't, i just pulled it to ground. But i will post s.t. detailed hopefully
tomorrow.
> Well again congratulations, regardsss.
:-)
ST
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Hi Stefan
>> I will post the details as time permits.
> Could you write a small Howto describing what and how you did this?
As i wrote, yes but not now.
ST
PS: I'm subscribed to the list.
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Next stop will be actually flashing linuxbios.
Thanks for all who helped me out!
ST
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27;s the PC interface to the eval board?
I think it's USB (with a horrible blob driver from xilinx).
ST
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pulldown of #init on the soldered flash
is realized.
I am currently waiting for Beth/Jose to double check and for the delivery of
two spare flash chips and a PLCC32 socket.
ST
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gets the #init to
low, the other one will stay in reset mode and will keep its I/O pins in Z
state?
Thanks
ST
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Hi Beth
Am Donnerstag, 12. April 2007 14:17 schrieben Sie:
> Hi all again (hi ST, yes I am Jose, Beth is a long story :D, some day ...).
Nice hearing from you :-)
> Well I am a bit "disconnected", but, ST are you still interested on
> that I check the pins of the second socke
> please see my other mail
Mh "the other mail" seems to be cought in a spam filter or s.t. like that?
ST
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is one of the T1X or T2X pins. (X is a
wildcard for 1 2 3 all according to the image:
http://private.vlsi.informatik.tu-darmstadt.de/st/dual_bios_GA-m57SLI-S4.jpg
ST
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erman buyers?
Thanks
ST
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t parameters to: init=/bin/sh and get an shell?
If you get an shell can you issue an: "mount -o remount,rw /"?
This helps with normal systems but no experience with linuxbios systems yet.
ST
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blem with
the bios saviour.
If it is an problem with the bios saviour it would be nice if you keep us
informed if you have more information on that issue. Probably there is also
an hint for us how to use the free pads.
Thanks by the way for your nice build tutorial for the M57-SLI-S4.
ST
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k the only thing it
shows is that this patent system is a job security program for lawyers but
not helpful in the advance of the mankind.
The only interesting thing i found is that they seem to use a checksum or s.t.
to test if the bios image is valid.
ST
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...
> which supports your
> theory! :)
Jup.
> Also, what are T22 and T12?
Please see:
http://private.vlsi.informatik.tu-darmstadt.de/st/dual_bios_GA-m57SLI-S4.jpg
These are open pins which might be transistors but are only Three open pins
each. Between the PCIex1 sockets and the flash ch
Am Mittwoch, 28. März 2007 01:15 schrieb Stefan Reinauer:
> * ST <[EMAIL PROTECTED]> [070328 00:36]:
> > Well the result in pretty raw format right now.
> > Bios Chip is a:
> > PMC
> > 0621
> > Pm49FLOO4T-33JCE
> > If someone can enlighten me or has po
d.
> > Then there has to be some logic which decides to boot from which chip.
If the bios failure should be detected this only works reliably with an
watchdog which switches the bios on failure.
ST
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your mainboard just try to dig up the above information?
And probably we will find a way to enable an dual boot between the original
bios and the linuxbios, which would be quite neat.
ST
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there was nothing underneath.
I would prefer not to remove the first part but solder something on the free
space. I think i have to search my multimeter.
Thanks
ST
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57sli-s4.
There is an inner and outer ring of contacts for the second free bios chip.
Does anybody know if these are for different chips or are these for one chip.
The latter would make soldering with my tools impossible.
Thanks
ST
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http://w
Am Montag, 12. März 2007 12:23 schrieb Stefan Reinauer:
> * ST <[EMAIL PROTECTED]> [070312 11:58]:
> > Since i don't have an modern flash programmer (and this version of the
> > gigabyte doesn't have a dual bios) i am afraid to "brick" this mainboard.
>
tried linuxbios yet.
Since i don't have an modern flash programmer (and this version of the
gigabyte doesn't have a dual bios) i am afraid to "brick" this mainboard.
Since i can't use the gigabyte tools anymore once i have flashed linuxbios to
this board. Is there a way b
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