> Are you configuring the system for AGP 2.0 or 3.0, ie are you
> configuring dev 0.0 or 1.0? The way I had it set up, I thought, was 32MB
> for video, 32MB for agp, and the rest for the system, using AGP 3.0. I
> could very well have messed something up somewhere, though.
>
> -Corey
>
I'm configu
aaron lwe wrote:
> On Dec 21, 2007 1:40 PM, Corey Osgood <[EMAIL PROTECTED]> wrote:
>
>> And now you're where I am. For some reason there's a reserved memory
>> range _somewhere_ at the tolm, of some unknown size. I've found that
>> reserving an extra 1MB doesn't work, but 32MB does. I've found
On Dec 21, 2007 1:40 PM, Corey Osgood <[EMAIL PROTECTED]> wrote:
>
> And now you're where I am. For some reason there's a reserved memory
> range _somewhere_ at the tolm, of some unknown size. I've found that
> reserving an extra 1MB doesn't work, but 32MB does. I've found nothing
> in the document
On Dec 27, 2007 10:44 PM, aaron lwe <[EMAIL PROTECTED]> wrote:
> ron, you're right, it's a dram configuration problem.
> after I set the dram clocking control and signal timing
> control registers, it worked well after enabling memory
> cache. Hmm...these registers have nothing to do when
> cache
On Dec 27, 2007 1:22 PM, ron minnich <[EMAIL PROTECTED]> wrote:
> yes I think you are probably right but how are the fixed mtrr's set?
>
> I don't know, This still seems like memory timing issues to me but who
> knows.
>
> ron
>
ron, you're right, it's a dram configuration problem.
after I set th
>
> this can be still be caused by bad dram timing. Once you start
> caching, cache flush to ram will be a burst. If the dram timing is not
> right, you will get data corruption that will not occur with caching
> off. I used to have this happen very frequently.
>
> So, I still think you have a memo
On Dec 26, 2007 1:58 AM, aaron lwe <[EMAIL PROTECTED]> wrote:
>
> I'm now having trouble with mtrr, after setting variable mtrr, data gets
> corrupted.
this can be still be caused by bad dram timing. Once you start
caching, cache flush to ram will be a burst. If the dram timing is not
right, you
>
> Hmm. I think this also is true with some Intel chipsets. Even without
> graphics enabled there has to be some kind of reserved memory space
> just below tolm (the smallest I was sucessfull with was 1MB) or filo
> chokes. Doesn't LB allocate a bounce buffer just before the payload
> starts? Is t
On Dec 21, 2007 1:40 PM, Corey Osgood <[EMAIL PROTECTED]> wrote:
> aaron lwe wrote:
> > Dear All,
> >
> > I'm terribly sorry that I just found I've mistakenly configured the
> > dram MA Map Type, and now memtest
> > showed no errors. But I still have to reduce the mem size when
> > reporting to
On Dec 21, 2007 1:40 PM, Corey Osgood <[EMAIL PROTECTED]> wrote:
> aaron lwe wrote:
> > Dear All,
> >
> > I'm terribly sorry that I just found I've mistakenly configured the
> > dram MA Map Type, and now memtest
> > showed no errors. But I still have to reduce the mem size when
> > reporting to s
Quoting Corey Osgood <[EMAIL PROTECTED]>:
> aaron lwe wrote:
>> Dear All,
>>
>> I'm terribly sorry that I just found I've mistakenly configured the
>> dram MA Map Type, and now memtest
>> showed no errors. But I still have to reduce the mem size when
>> reporting to system through ram_resource
>>
aaron lwe wrote:
> Dear All,
>
> I'm terribly sorry that I just found I've mistakenly configured the
> dram MA Map Type, and now memtest
> showed no errors. But I still have to reduce the mem size when
> reporting to system through ram_resource
> or filo couldn't be started. I have disabled the in
Dear All,
I'm terribly sorry that I just found I've mistakenly configured the dram MA
Map Type, and now memtest
showed no errors. But I still have to reduce the mem size when reporting to
system through ram_resource
or filo couldn't be started. I have disabled the integrated graphics card
and the
On Thu, Dec 20, 2007 at 10:34:15PM +0800, aaron lwe wrote:
>* //Until you can successfully run memtest86 as a payload and it reports
*>* //zero errors, RAM has not yet been configured correctly.
*>*
*>* OK, I get it. Thanks.
*>* Memtest86 reports errors at memory address
*>* 1MB, 5MB, 9MB, 13MB, 17
On Dec 20, 2007 11:42 PM, Corey Osgood <[EMAIL PROTECTED]> wrote:
> aaron lwe wrote:
> > On Thu, Dec 20, 2007 at 04:49:32PM +0800, aaron lwe wrote:
> > >/ I've configured the via cn700 dram controller
> > /..
> > >/ Unexpected Exception: 6 @ 10:1bfee821 - Halting
> > /..
> > >/ can I say ram is in
On Thu, Dec 20, 2007 at 10:42:33AM -0500, Corey Osgood wrote:
> Weird, I've never seen that problem. Do you have any other dram modules
> you can try? Can you send me the specs (or a link to the datasheet would
> be best) on the module you're currently using? I have some comments I
> need to put in
On Dec 20, 2007 6:34 AM, aaron lwe <[EMAIL PROTECTED]> wrote:
> OK, I get it. Thanks.
> Memtest86 reports errors at memory address
> 1MB, 5MB, 9MB, 13MB, 17MB, ... not sure what's wrong.
>
we need to know a lot more about that module first!
what parts? double sided? how many banks? etc. etc.
Th
aaron lwe wrote:
> On Thu, Dec 20, 2007 at 04:49:32PM +0800, aaron lwe wrote:
> >/ I've configured the via cn700 dram controller
> /..
> >/ Unexpected Exception: 6 @ 10:1bfee821 - Halting
> /..
> >/ can I say ram is initialized right?
> /
> //No. ram_check() is a useless metric.
> //Until you can s
On Thu, Dec 20, 2007 at 10:34:15PM +0800, aaron lwe wrote:
> //Until you can successfully run memtest86 as a payload and it reports
> //zero errors, RAM has not yet been configured correctly.
>
> OK, I get it. Thanks.
> Memtest86 reports errors at memory address
> 1MB, 5MB, 9MB, 13MB, 17MB, ... no
On Thu, Dec 20, 2007 at 04:49:32PM +0800, aaron lwe wrote:
>* I've configured the via cn700 dram controller
*..
>* Unexpected Exception: 6 @ 10:1bfee821 - Halting
*..
>* can I say ram is initialized right?
*
//No. ram_check() is a useless metric.
//Until you can successfully run memtest86 as a payl
On Thu, Dec 20, 2007 at 04:49:32PM +0800, aaron lwe wrote:
> I've configured the via cn700 dram controller
..
> Unexpected Exception: 6 @ 10:1bfee821 - Halting
..
> can I say ram is initialized right?
No. ram_check() is a useless metric.
Until you can successfully run memtest86 as a payload and i
Dear All,
I've configured the via cn700 dram controller, and when I did ram_check to
many regions(not all, 'cause it wastes time)
everything was ok. but after the second stage code finished running, filo
failed to be started, with the following errors:
... ...
Jumping to boot code at 0x10e5ec
entr
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