These defconfigs contain the CONFIG_M25P80 symbol, which is now
dependent on the MTD_SPI_NOR symbol. Add CONFIG_MTD_SPI_NOR to satisfy
the new dependency.
At the same time, drop the now-nonexistent CONFIG_MTD_CHAR symbol.
Signed-off-by: Brian Norris
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
v1 --> v2: split ARM defconfig changes into their sub-architectures. No change
in the overall diff.
Hi all,
We are introducing a new SPI-NOR subsystem/framework for MTD, to support
various types of SPI-NOR flash controllers which require (or benefit from)
intimate knowledge of the flas
Aneesh Kumar K.V wrote:
> Runtime disable transactional memory feature looking at pa-features
> device tree entry. This provides a mechanism to disable TM on P8
> systems.
What are we actually achieving with this?
> Signed-off-by: Aneesh Kumar K.V
> ---
> arch/powerpc/kernel/prom.c | 5 +
Read guest last instruction from kvmppc_get_last_inst() allowing the function
to fail in order to emulate again. On bookehv architecture search for
the physical address and kmap it, instead of using Load External PID (lwepx)
instruction. This fixes an infinite loop caused by lwepx's data TLB miss
e
On book3e, guest last instruction was read on the exist path using load
external pid (lwepx) dedicated instruction. lwepx failures have to be
handled by KVM and this would require additional checks in DO_KVM hooks
(beside MSR[GS] = 1). However extra checks on host fast path are commonly
considered
The commit 1d628af7 "add load inst fixup" made an attempt to handle
failures generated by reading the guest current instruction. The fixup
code that was added works by chance hiding the real issue.
Load external pid (lwepx) instruction, used by KVM to read guest
instructions, is executed in a subs
On bookehv vcpu's last instruction is read using load external pid
(lwepx) instruction. lwepx exceptions (DTLB_MISS, DSI and LRAT) need
to be handled by KVM. These exceptions originate from host state
(MSR[GS] = 0) which implies additional checks in DO_KVM macro (beside
the current MSR[GS] = 1) by
Add defines MAS0_GET_TLBSEL() and MAS1_GET_TSIZE() to Book3E.
Signed-off-by: Mihai Caraman
---
v2:
- no change
arch/powerpc/include/asm/mmu-book3e.h | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/mmu-book3e.h
b/arch/powerpc/include/asm/mmu-b
Read guest last instruction from kvmppc_get_last_inst() allowing the function
to fail in order to emulate again. On bookehv architecture search for
the physical address and kmap it, instead of using Load External PID (lwepx)
instruction. This fixes an infinite loop caused by lwepx's data TLB miss
e
On Mon, Apr 14, 2014 at 03:28:35PM +0200, Alexander Gordeev wrote:
> There are no users of pci_enable_msi_block() function have
> left. Obsolete it in favor of pci_enable_msi_range() and
> pci_enable_msi_exact() functions.
I mistakenly assumed this would have to wait because I thought there were
o
From: Stuart Yoder
some restructuring of epapr paravirt init resulted in
ppc_md.power_save being set, and then overwritten to
NULL during machine_init. This patch splits the
initialization of ppc_md.power_save out into a postcore
init call.
Signed-off-by: Stuart Yoder
---
-v3
-changed appro
On Wed, 2014-04-30 at 18:23 -0500, Stuart Yoder wrote:
> From: Stuart Yoder
>
> some restructuring of epapr paravirt init resulted in
> ppc_md.power_save being set, and then overwritten to
> NULL during machine_init. This patch splits the
> initialization of ppc_md.power_save out into a postcore
From: Stuart Yoder
some restructuring of epapr paravirt init resulted in
ppc_md.power_save being set, and then overwritten to
NULL during machine_init. This patch splits the
initialization of ppc_md.power_save out into a postcore
init call.
Signed-off-by: Stuart Yoder
---
-v3
-changed appro
> -Original Message-
> From: Wood Scott-B07421
> Sent: Wednesday, April 30, 2014 5:49 PM
> To: Yoder Stuart-B08248
> Cc: b...@kernel.crashing.org; linuxppc-dev@lists.ozlabs.org;
> ag...@suse.de
> Subject: Re: [PATCH][v2] powerpc: move epapr paravirt init of power_save
> to an initcall
>
On Wed, 2014-04-30 at 15:20 -0500, Stuart Yoder wrote:
> From: Stuart Yoder
>
> some restructuring of epapr paravirt init resulted in
> ppc_md.power_save being set, and then overwritten to
> NULL during machine_init. This patch splits the
> initialization of ppc_md.power_save out into a postcore
We've already dropped the default pseries timeout to 10s, do
the same for powernv.
Signed-off-by: Anton Blanchard
---
arch/powerpc/platforms/powernv/setup.c | 2 ++
1 file changed, 2 insertions(+)
v2: fix the commit message as Paul pointed out
diff --git a/arch/powerpc/platforms/powernv/setup.
On Thu, May 01, 2014 at 07:20:04AM +1000, Anton Blanchard wrote:
> We've already dropped the default pseries timeout to 10s, do
> the same for powernv.
Why is there "pseries" in the patch subject rather than "powernv"?
Paul.
___
Linuxppc-dev mailing lis
We've already dropped the default pseries timeout to 10s, do
the same for powernv.
Signed-off-by: Anton Blanchard
---
arch/powerpc/platforms/powernv/setup.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/platforms/powernv/setup.c
b/arch/powerpc/platforms/powernv/setup.c
inde
On Mon, Apr 14, 2014 at 03:28:34PM +0200, Alexander Gordeev wrote:
> There are no users of pci_enable_msi_block() function have
> left. Obsolete it in favor of pci_enable_msi_range() and
> pci_enable_msi_exact() functions.
Hi Bjorn,
How about this one?
Thanks!
--
Regards,
Alexander Gordeev
ago
On 30.04.14 22:20, Stuart Yoder wrote:
From: Stuart Yoder
some restructuring of epapr paravirt init resulted in
ppc_md.power_save being set, and then overwritten to
NULL during machine_init. This patch splits the
initialization of ppc_md.power_save out into a postcore
init call.
Signed-off-b
From: Stuart Yoder
some restructuring of epapr paravirt init resulted in
ppc_md.power_save being set, and then overwritten to
NULL during machine_init. This patch splits the
initialization of ppc_md.power_save out into a postcore
init call.
Signed-off-by: Stuart Yoder
---
-v2: don't iterate o
From: Stuart Yoder
some restructuring of epapr paravirt init resulted in
ppc_md.power_save being set, and then overwritten to
NULL during machine_init. This patch splits the
initialization of ppc_md.power_save out into a postcore
init call.
Signed-off-by: Stuart Yoder
---
arch/powerpc/kernel/
On 30.04.14 22:03, Stuart Yoder wrote:
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Wednesday, April 30, 2014 2:56 PM
To: Yoder Stuart-B08248; b...@kernel.crashing.org; Wood Scott-B07421
Cc: linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH] powerpc: move epapr
On 30.04.14 22:03, Stuart Yoder wrote:
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Wednesday, April 30, 2014 2:56 PM
To: Yoder Stuart-B08248; b...@kernel.crashing.org; Wood Scott-B07421
Cc: linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH] powerpc: move epapr
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
> Sent: Wednesday, April 30, 2014 2:56 PM
> To: Yoder Stuart-B08248; b...@kernel.crashing.org; Wood Scott-B07421
> Cc: linuxppc-dev@lists.ozlabs.org
> Subject: Re: [PATCH] powerpc: move epapr paravirt init of power_save to
On 30.04.14 21:54, Stuart Yoder wrote:
From: Stuart Yoder
some restructuring of epapr paravirt init resulted in
ppc_md.power_save being set, and then overwritten to
NULL during machine_init. This patch splits the
initialization of ppc_md.power_save out into a postcore
init call.
Signed-off-b
On Wed, Apr 30, 2014 at 03:14:54PM +1000, Benjamin Herrenschmidt wrote:
> On Tue, 2014-04-29 at 10:38 -0500, Brian W Hart wrote:
>
> > > CHECKFLAGS += -m$(CONFIG_WORD_SIZE) -D__powerpc__
> > > -D__powerpc$(CONFIG_WORD_SIZE)__
> > >
> > > +ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE
> > > KBUILD_L
On Wednesday 30 April 2014 16:45:08 Michael Ellerman wrote:
> > > + v v
> > > + +--+ +---+ ++
> > > + | POWER4+| ---> | 970 | | 7447 |
> > > + +
On Wed, 2014-04-30 at 16:45 +1000, Michael Ellerman wrote:
> On Tue, 2014-02-04 at 16:43 -0600, Scott Wood wrote:
> > Missing e300 (603 derivative) and e600 (7448 derivative).
>
> Happy to add them, where do they hang off?
e300 hangs off 603 and e600 hangs off 7448. :-)
> > > +Motorola/Freescal
On Wed, 2014-04-30 at 13:14 -0500, Tom Musta wrote:
> On 4/30/2014 1:45 AM, Michael Ellerman wrote:
> >> > Are 40x considered booke?
> > You tell me.
> >
>
> The original 401, 403 and 405 cores predate the actual existence of what we
> now call Book E.
> But they most certainly contained featur
On Wed, 2014-04-30 at 14:56 +1000, Benjamin Herrenschmidt wrote:
> On Wed, 2014-03-19 at 17:05 -0500, Scott Wood wrote:
> > On Wed, 2014-03-19 at 22:52 +0100, Christophe Leroy wrote:
> > > This patch provides VIRT_CPU_ACCOUTING to PPC32 architecture.
> > > Unlike PPC64, PPC32 doesn't provide the PA
On 4/30/2014 1:45 AM, Michael Ellerman wrote:
>> > Are 40x considered booke?
> You tell me.
>
The original 401, 403 and 405 cores predate the actual existence of what we now
call Book E.
But they most certainly contained features that would eventually become Book E
(different timers,
software
On Fri, Apr 25, 2014 at 3:18 AM, Yijing Wang wrote:
> This patchset rename the current pci_is_bridge() to pci_has_subordinate(),
> and introduce a new pci_is_bridge() which determine pci bridge by check
> dev->hdr_type. The new one is more accurate. PCIe Spec define the pci
> device is a bridge by
Hello,
I know this topic does not exactly fit this mailing list, but I
think it's better to ask here than on binutils.
I need to assemble and disassemble some PowerPC VLE (variable length
encoding) e200 code. Binutils as of 2.23.2 support VLE. But when I
try to use objdump -D with -m powerp
On 30.04.14 07:09, Michael Neuling wrote:
This patch series implements split core mode on POWER8. This enables up to 4
subcores per core which can each independently run guests (per guest SPRs like
SDR1, LPIDR etc are replicated per subcore). Lots more documentation on this
feature in the code
On 04/30/2014 05:59 AM, Michael Neuling wrote:
> Anshuman Khandual wrote:
>
>> On 04/29/2014 01:52 PM, Michael Neuling wrote:
>>> That's not what that patch does. It shouldn't make any user visible changes
>>> to DSCR or PPR.
>>
>> It may not when it runs uninterrupted but after the tracee proces
On Wednesday 30 April 2014 12:34 PM, Rusty Russell wrote:
> Ingo Molnar writes:
>> * Madhavan Srinivasan wrote:
>>
>>> Performance data for different FAULT_AROUND_ORDER values from 4 socket
>>> Power7 system (128 Threads and 128GB memory). perf stat with repeat of 5
>>> is used to get the stddev
Runtime disable transactional memory feature looking at pa-features
device tree entry. This provides a mechanism to disable TM on P8
systems.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/kernel/prom.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/powerpc/kernel/prom.c b/arch/
Ingo Molnar writes:
> * Madhavan Srinivasan wrote:
>
>> Performance data for different FAULT_AROUND_ORDER values from 4 socket
>> Power7 system (128 Threads and 128GB memory). perf stat with repeat of 5
>> is used to get the stddev values. Test ran in v3.14 kernel (Baseline) and
>> v3.15-rc1 for
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