Re: [PATCH 1/2] powerpc/pseries/svm: Don't access some SPRs

Sukadev Bhattiprolu writes: > Michael Ellerman [m...@ellerman.id.au] wrote: >> >> eg. here. >> >> This is the fast path of context switch. >> >> That expands to: >> >> if (!(mfmsr() & MSR_S)) >> asm volatile("mfspr %0, SPRN_BESCR" : "=r" (rval)); >> if (!(mfmsr() & MSR_S

Re: [PATCH 1/2] powerpc/pseries/svm: Don't access some SPRs

Michael Ellerman [m...@ellerman.id.au] wrote: > > eg. here. > > This is the fast path of context switch. > > That expands to: > > if (!(mfmsr() & MSR_S)) > asm volatile("mfspr %0, SPRN_BESCR" : "=r" (rval)); > if (!(mfmsr() & MSR_S)) > asm volatile("mfspr

Re: [PATCH 1/2] powerpc/pseries/svm: Don't access some SPRs

Sukadev Bhattiprolu writes: > Ultravisor disables some CPU features like EBB and BHRB in the HFSCR > for secure virtual machines (SVMs). If the SVMs attempt to access > related registers, they will get a Program Interrupt. > > Use macros/wrappers to skip accessing EBB and BHRB registers in secure

[PATCH 1/2] powerpc/pseries/svm: Don't access some SPRs

Ultravisor disables some CPU features like EBB and BHRB in the HFSCR for secure virtual machines (SVMs). If the SVMs attempt to access related registers, they will get a Program Interrupt. Use macros/wrappers to skip accessing EBB and BHRB registers in secure VMs. Signed-off-by: Sukadev Bhattipro