[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-07-12 Thread via llvm-branch-commits 

https://github.com/koachan updated 
https://github.com/llvm/llvm-project/pull/139451


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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-07-12 Thread via llvm-branch-commits 

https://github.com/koachan updated 
https://github.com/llvm/llvm-project/pull/139451


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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-07-12 Thread via llvm-branch-commits 

https://github.com/koachan updated 
https://github.com/llvm/llvm-project/pull/139451


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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-07-12 Thread via llvm-branch-commits 

https://github.com/koachan updated 
https://github.com/llvm/llvm-project/pull/139451


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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-07-02 Thread Sergei Barannikov via llvm-branch-commits 


@@ -0,0 +1,98 @@
+//===--- SparcInstrCrypto.td - cryptographic extensions 
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file contains instruction formats, definitions and patterns needed for
+// cryptographic instructions on SPARC.
+//===--===//
+
+
+// Convenience template for 4-operand instructions
+class FourOpImm op3val, bits<4> op5val,
+RegisterClass RC>
+  : F3_4;
+
+let Predicates = [HasCrypto] in {
+def AES_EROUND01 : FourOp<"aes_eround01", 0b011001, 0b, DFPRegs>;
+def AES_EROUND23 : FourOp<"aes_eround23", 0b011001, 0b0001, DFPRegs>;
+def AES_DROUND01 : FourOp<"aes_dround01", 0b011001, 0b0010, DFPRegs>;
+def AES_DROUND23 : FourOp<"aes_dround23", 0b011001, 0b0011, DFPRegs>;
+def AES_EROUND01_LAST : FourOp<"aes_eround01_l", 0b011001, 0b0100, DFPRegs>;
+def AES_EROUND23_LAST : FourOp<"aes_eround23_l", 0b011001, 0b0101, DFPRegs>;
+def AES_DROUND01_LAST : FourOp<"aes_dround01_l", 0b011001, 0b0110, DFPRegs>;
+def AES_DROUND23_LAST : FourOp<"aes_dround23_l", 0b011001, 0b0111, DFPRegs>;
+def AES_KEXPAND0  : F3_3<2, 0b110110, 0b10011,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"aes_kexpand0 $rs1, $rs2, $rd", []>;
+def AES_KEXPAND1 : FourOpImm<"aes_kexpand1", 0b011001, 0b1000, DFPRegs>;
+def AES_KEXPAND2  : F3_3<2, 0b110110, 0b100110001,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"aes_kexpand2 $rs1, $rs2, $rd", []>;
+
+def CAMELLIA_F : FourOp<"camellia_f", 0b011001, 0b1100, DFPRegs>;
+def CAMELLIA_FL  : F3_3<2, 0b110110, 0b10000,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"camellia_fl $rs1, $rs2, $rd", []>;
+def CAMELLIA_FLI : F3_3<2, 0b110110, 0b10001,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"camellia_fli $rs1, $rs2, $rd", []>;
+
+def CRC32C : F3_3<2, 0b110110, 0b101000111,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"crc32c $rs1, $rs2, $rd", []>;
+
+def DES_ROUND : FourOp<"des_round", 0b011001, 0b1001, DFPRegs>;
+let rs2 = 0 in {
+def DES_IP  : F3_3<2, 0b110110, 0b100110100,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1),

s-barannikov wrote:

Ditto

https://github.com/llvm/llvm-project/pull/139451
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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-07-02 Thread Sergei Barannikov via llvm-branch-commits 


@@ -0,0 +1,98 @@
+//===--- SparcInstrCrypto.td - cryptographic extensions 
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file contains instruction formats, definitions and patterns needed for
+// cryptographic instructions on SPARC.
+//===--===//
+
+
+// Convenience template for 4-operand instructions
+class FourOpImm op3val, bits<4> op5val,
+RegisterClass RC>
+  : F3_4;
+
+let Predicates = [HasCrypto] in {
+def AES_EROUND01 : FourOp<"aes_eround01", 0b011001, 0b, DFPRegs>;
+def AES_EROUND23 : FourOp<"aes_eround23", 0b011001, 0b0001, DFPRegs>;
+def AES_DROUND01 : FourOp<"aes_dround01", 0b011001, 0b0010, DFPRegs>;
+def AES_DROUND23 : FourOp<"aes_dround23", 0b011001, 0b0011, DFPRegs>;
+def AES_EROUND01_LAST : FourOp<"aes_eround01_l", 0b011001, 0b0100, DFPRegs>;
+def AES_EROUND23_LAST : FourOp<"aes_eround23_l", 0b011001, 0b0101, DFPRegs>;
+def AES_DROUND01_LAST : FourOp<"aes_dround01_l", 0b011001, 0b0110, DFPRegs>;
+def AES_DROUND23_LAST : FourOp<"aes_dround23_l", 0b011001, 0b0111, DFPRegs>;
+def AES_KEXPAND0  : F3_3<2, 0b110110, 0b10011,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"aes_kexpand0 $rs1, $rs2, $rd", []>;
+def AES_KEXPAND1 : FourOpImm<"aes_kexpand1", 0b011001, 0b1000, DFPRegs>;
+def AES_KEXPAND2  : F3_3<2, 0b110110, 0b100110001,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),

s-barannikov wrote:

Align after '<'

https://github.com/llvm/llvm-project/pull/139451
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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-07-02 Thread Sergei Barannikov via llvm-branch-commits 

https://github.com/s-barannikov edited 
https://github.com/llvm/llvm-project/pull/139451
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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-07-02 Thread Sergei Barannikov via llvm-branch-commits 


@@ -0,0 +1,98 @@
+//===--- SparcInstrCrypto.td - cryptographic extensions 
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file contains instruction formats, definitions and patterns needed for
+// cryptographic instructions on SPARC.
+//===--===//
+
+
+// Convenience template for 4-operand instructions
+class FourOpImm op3val, bits<4> op5val,
+RegisterClass RC>
+  : F3_4;
+
+let Predicates = [HasCrypto] in {
+def AES_EROUND01 : FourOp<"aes_eround01", 0b011001, 0b, DFPRegs>;
+def AES_EROUND23 : FourOp<"aes_eround23", 0b011001, 0b0001, DFPRegs>;
+def AES_DROUND01 : FourOp<"aes_dround01", 0b011001, 0b0010, DFPRegs>;
+def AES_DROUND23 : FourOp<"aes_dround23", 0b011001, 0b0011, DFPRegs>;
+def AES_EROUND01_LAST : FourOp<"aes_eround01_l", 0b011001, 0b0100, DFPRegs>;
+def AES_EROUND23_LAST : FourOp<"aes_eround23_l", 0b011001, 0b0101, DFPRegs>;
+def AES_DROUND01_LAST : FourOp<"aes_dround01_l", 0b011001, 0b0110, DFPRegs>;
+def AES_DROUND23_LAST : FourOp<"aes_dround23_l", 0b011001, 0b0111, DFPRegs>;
+def AES_KEXPAND0  : F3_3<2, 0b110110, 0b10011,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"aes_kexpand0 $rs1, $rs2, $rd", []>;
+def AES_KEXPAND1 : FourOpImm<"aes_kexpand1", 0b011001, 0b1000, DFPRegs>;
+def AES_KEXPAND2  : F3_3<2, 0b110110, 0b100110001,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"aes_kexpand2 $rs1, $rs2, $rd", []>;
+
+def CAMELLIA_F : FourOp<"camellia_f", 0b011001, 0b1100, DFPRegs>;
+def CAMELLIA_FL  : F3_3<2, 0b110110, 0b10000,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"camellia_fl $rs1, $rs2, $rd", []>;
+def CAMELLIA_FLI : F3_3<2, 0b110110, 0b10001,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"camellia_fli $rs1, $rs2, $rd", []>;
+
+def CRC32C : F3_3<2, 0b110110, 0b101000111,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"crc32c $rs1, $rs2, $rd", []>;
+
+def DES_ROUND : FourOp<"des_round", 0b011001, 0b1001, DFPRegs>;
+let rs2 = 0 in {
+def DES_IP  : F3_3<2, 0b110110, 0b100110100,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1),
+"des_ip $rs1, $rd", []>;
+def DES_IIP  : F3_3<2, 0b110110, 0b100110101,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1),
+"des_iip $rs1, $rd", []>;
+}
+def DES_KEXPAND : F3_3<2, 0b110110, 0b100110110,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, simm5Op:$rs2),

s-barannikov wrote:

Ditto

https://github.com/llvm/llvm-project/pull/139451
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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-07-02 Thread Sergei Barannikov via llvm-branch-commits 

https://github.com/s-barannikov approved this pull request.

LGTM with formatting nits

https://github.com/llvm/llvm-project/pull/139451
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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-07-02 Thread Sergei Barannikov via llvm-branch-commits 


@@ -0,0 +1,98 @@
+//===--- SparcInstrCrypto.td - cryptographic extensions 
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file contains instruction formats, definitions and patterns needed for
+// cryptographic instructions on SPARC.
+//===--===//
+
+
+// Convenience template for 4-operand instructions
+class FourOpImm op3val, bits<4> op5val,
+RegisterClass RC>
+  : F3_4;
+
+let Predicates = [HasCrypto] in {
+def AES_EROUND01 : FourOp<"aes_eround01", 0b011001, 0b, DFPRegs>;
+def AES_EROUND23 : FourOp<"aes_eround23", 0b011001, 0b0001, DFPRegs>;
+def AES_DROUND01 : FourOp<"aes_dround01", 0b011001, 0b0010, DFPRegs>;
+def AES_DROUND23 : FourOp<"aes_dround23", 0b011001, 0b0011, DFPRegs>;
+def AES_EROUND01_LAST : FourOp<"aes_eround01_l", 0b011001, 0b0100, DFPRegs>;
+def AES_EROUND23_LAST : FourOp<"aes_eround23_l", 0b011001, 0b0101, DFPRegs>;
+def AES_DROUND01_LAST : FourOp<"aes_dround01_l", 0b011001, 0b0110, DFPRegs>;
+def AES_DROUND23_LAST : FourOp<"aes_dround23_l", 0b011001, 0b0111, DFPRegs>;
+def AES_KEXPAND0  : F3_3<2, 0b110110, 0b10011,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),

s-barannikov wrote:

Align after '<'

https://github.com/llvm/llvm-project/pull/139451
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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-07-02 Thread Sergei Barannikov via llvm-branch-commits 


@@ -0,0 +1,98 @@
+//===--- SparcInstrCrypto.td - cryptographic extensions 
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file contains instruction formats, definitions and patterns needed for
+// cryptographic instructions on SPARC.
+//===--===//
+
+
+// Convenience template for 4-operand instructions
+class FourOpImm op3val, bits<4> op5val,
+RegisterClass RC>
+  : F3_4;
+
+let Predicates = [HasCrypto] in {
+def AES_EROUND01 : FourOp<"aes_eround01", 0b011001, 0b, DFPRegs>;
+def AES_EROUND23 : FourOp<"aes_eround23", 0b011001, 0b0001, DFPRegs>;
+def AES_DROUND01 : FourOp<"aes_dround01", 0b011001, 0b0010, DFPRegs>;
+def AES_DROUND23 : FourOp<"aes_dround23", 0b011001, 0b0011, DFPRegs>;
+def AES_EROUND01_LAST : FourOp<"aes_eround01_l", 0b011001, 0b0100, DFPRegs>;
+def AES_EROUND23_LAST : FourOp<"aes_eround23_l", 0b011001, 0b0101, DFPRegs>;
+def AES_DROUND01_LAST : FourOp<"aes_dround01_l", 0b011001, 0b0110, DFPRegs>;
+def AES_DROUND23_LAST : FourOp<"aes_dround23_l", 0b011001, 0b0111, DFPRegs>;
+def AES_KEXPAND0  : F3_3<2, 0b110110, 0b10011,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"aes_kexpand0 $rs1, $rs2, $rd", []>;
+def AES_KEXPAND1 : FourOpImm<"aes_kexpand1", 0b011001, 0b1000, DFPRegs>;
+def AES_KEXPAND2  : F3_3<2, 0b110110, 0b100110001,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"aes_kexpand2 $rs1, $rs2, $rd", []>;
+
+def CAMELLIA_F : FourOp<"camellia_f", 0b011001, 0b1100, DFPRegs>;
+def CAMELLIA_FL  : F3_3<2, 0b110110, 0b10000,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"camellia_fl $rs1, $rs2, $rd", []>;
+def CAMELLIA_FLI : F3_3<2, 0b110110, 0b10001,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),

s-barannikov wrote:

Ditto

https://github.com/llvm/llvm-project/pull/139451
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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-07-02 Thread Sergei Barannikov via llvm-branch-commits 


@@ -0,0 +1,98 @@
+//===--- SparcInstrCrypto.td - cryptographic extensions 
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file contains instruction formats, definitions and patterns needed for
+// cryptographic instructions on SPARC.
+//===--===//
+
+
+// Convenience template for 4-operand instructions
+class FourOpImm op3val, bits<4> op5val,
+RegisterClass RC>
+  : F3_4;
+
+let Predicates = [HasCrypto] in {
+def AES_EROUND01 : FourOp<"aes_eround01", 0b011001, 0b, DFPRegs>;
+def AES_EROUND23 : FourOp<"aes_eround23", 0b011001, 0b0001, DFPRegs>;
+def AES_DROUND01 : FourOp<"aes_dround01", 0b011001, 0b0010, DFPRegs>;
+def AES_DROUND23 : FourOp<"aes_dround23", 0b011001, 0b0011, DFPRegs>;
+def AES_EROUND01_LAST : FourOp<"aes_eround01_l", 0b011001, 0b0100, DFPRegs>;
+def AES_EROUND23_LAST : FourOp<"aes_eround23_l", 0b011001, 0b0101, DFPRegs>;
+def AES_DROUND01_LAST : FourOp<"aes_dround01_l", 0b011001, 0b0110, DFPRegs>;
+def AES_DROUND23_LAST : FourOp<"aes_dround23_l", 0b011001, 0b0111, DFPRegs>;
+def AES_KEXPAND0  : F3_3<2, 0b110110, 0b10011,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"aes_kexpand0 $rs1, $rs2, $rd", []>;
+def AES_KEXPAND1 : FourOpImm<"aes_kexpand1", 0b011001, 0b1000, DFPRegs>;
+def AES_KEXPAND2  : F3_3<2, 0b110110, 0b100110001,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"aes_kexpand2 $rs1, $rs2, $rd", []>;
+
+def CAMELLIA_F : FourOp<"camellia_f", 0b011001, 0b1100, DFPRegs>;
+def CAMELLIA_FL  : F3_3<2, 0b110110, 0b10000,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"camellia_fl $rs1, $rs2, $rd", []>;
+def CAMELLIA_FLI : F3_3<2, 0b110110, 0b10001,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"camellia_fli $rs1, $rs2, $rd", []>;
+
+def CRC32C : F3_3<2, 0b110110, 0b101000111,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),

s-barannikov wrote:

Ditto

https://github.com/llvm/llvm-project/pull/139451
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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-07-02 Thread Sergei Barannikov via llvm-branch-commits 


@@ -0,0 +1,98 @@
+//===--- SparcInstrCrypto.td - cryptographic extensions 
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file contains instruction formats, definitions and patterns needed for
+// cryptographic instructions on SPARC.
+//===--===//
+
+
+// Convenience template for 4-operand instructions
+class FourOpImm op3val, bits<4> op5val,
+RegisterClass RC>
+  : F3_4;
+
+let Predicates = [HasCrypto] in {
+def AES_EROUND01 : FourOp<"aes_eround01", 0b011001, 0b, DFPRegs>;
+def AES_EROUND23 : FourOp<"aes_eround23", 0b011001, 0b0001, DFPRegs>;
+def AES_DROUND01 : FourOp<"aes_dround01", 0b011001, 0b0010, DFPRegs>;
+def AES_DROUND23 : FourOp<"aes_dround23", 0b011001, 0b0011, DFPRegs>;
+def AES_EROUND01_LAST : FourOp<"aes_eround01_l", 0b011001, 0b0100, DFPRegs>;
+def AES_EROUND23_LAST : FourOp<"aes_eround23_l", 0b011001, 0b0101, DFPRegs>;
+def AES_DROUND01_LAST : FourOp<"aes_dround01_l", 0b011001, 0b0110, DFPRegs>;
+def AES_DROUND23_LAST : FourOp<"aes_dround23_l", 0b011001, 0b0111, DFPRegs>;
+def AES_KEXPAND0  : F3_3<2, 0b110110, 0b10011,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"aes_kexpand0 $rs1, $rs2, $rd", []>;
+def AES_KEXPAND1 : FourOpImm<"aes_kexpand1", 0b011001, 0b1000, DFPRegs>;
+def AES_KEXPAND2  : F3_3<2, 0b110110, 0b100110001,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"aes_kexpand2 $rs1, $rs2, $rd", []>;
+
+def CAMELLIA_F : FourOp<"camellia_f", 0b011001, 0b1100, DFPRegs>;
+def CAMELLIA_FL  : F3_3<2, 0b110110, 0b10000,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),

s-barannikov wrote:

Align after '<'

https://github.com/llvm/llvm-project/pull/139451
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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-07-02 Thread Sergei Barannikov via llvm-branch-commits 


@@ -0,0 +1,98 @@
+//===--- SparcInstrCrypto.td - cryptographic extensions 
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file contains instruction formats, definitions and patterns needed for
+// cryptographic instructions on SPARC.
+//===--===//
+
+
+// Convenience template for 4-operand instructions
+class FourOpImm op3val, bits<4> op5val,
+RegisterClass RC>
+  : F3_4;

s-barannikov wrote:

```suggestion
class FourOpImm op3val, bits<4> op5val,
RegisterClass RC>
: F3_4;
```

https://github.com/llvm/llvm-project/pull/139451
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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-06-27 Thread via llvm-branch-commits 

koachan wrote:

Ping?

https://github.com/llvm/llvm-project/pull/139451
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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-06-17 Thread Brad Smith via llvm-branch-commits 

brad0 wrote:

@s-barannikov 

https://github.com/llvm/llvm-project/pull/139451
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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-06-06 Thread via llvm-branch-commits 

koachan wrote:

Ping?

https://github.com/llvm/llvm-project/pull/139451
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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-05-29 Thread via llvm-branch-commits 

koachan wrote:

Ping?

https://github.com/llvm/llvm-project/pull/139451
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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-05-24 Thread via llvm-branch-commits 

https://github.com/koachan updated 
https://github.com/llvm/llvm-project/pull/139451


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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-05-24 Thread via llvm-branch-commits 

https://github.com/koachan updated 
https://github.com/llvm/llvm-project/pull/139451


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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-05-23 Thread Brad Smith via llvm-branch-commits 

brad0 wrote:

cc @s-barannikov 

https://github.com/llvm/llvm-project/pull/139451
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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-05-11 Thread via llvm-branch-commits 

https://github.com/koachan updated 
https://github.com/llvm/llvm-project/pull/139451


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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-05-11 Thread via llvm-branch-commits 

https://github.com/koachan updated 
https://github.com/llvm/llvm-project/pull/139451


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[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-05-11 Thread via llvm-branch-commits 

llvmbot wrote:




@llvm/pr-subscribers-backend-sparc

Author: Koakuma (koachan)


Changes



---
Full diff: https://github.com/llvm/llvm-project/pull/139451.diff


5 Files Affected:

- (modified) llvm/lib/Target/Sparc/Sparc.td (+5-1) 
- (added) llvm/lib/Target/Sparc/SparcInstrCrypto.td (+98) 
- (modified) llvm/lib/Target/Sparc/SparcInstrInfo.td (+5) 
- (added) llvm/test/MC/Disassembler/Sparc/sparc-crypto.txt (+56) 
- (added) llvm/test/MC/Sparc/sparc-crypto.s (+88) 


``diff
diff --git a/llvm/lib/Target/Sparc/Sparc.td b/llvm/lib/Target/Sparc/Sparc.td
index 6e6c887e60e12..7c26bf9061cb6 100644
--- a/llvm/lib/Target/Sparc/Sparc.td
+++ b/llvm/lib/Target/Sparc/Sparc.td
@@ -58,6 +58,9 @@ def FeatureUA2007
 def FeatureOSA2011
   : SubtargetFeature<"osa2011", "IsOSA2011", "true",
  "Enable Oracle SPARC Architecture 2011 extensions">;
+def FeatureCrypto
+  : SubtargetFeature<"crypto", "IsCrypto", "true",
+ "Enable cryptographic extensions">;
 def FeatureLeon
   : SubtargetFeature<"leon", "IsLeon", "true",
  "Enable LEON extensions">;
@@ -169,7 +172,8 @@ def : Proc<"niagara3",[FeatureV9, 
FeatureV8Deprecated, UsePopc,
FeatureUA2005, FeatureUA2007]>;
 def : Proc<"niagara4",[FeatureV9, FeatureV8Deprecated, UsePopc,
FeatureVIS, FeatureVIS2, FeatureVIS3,
-   FeatureUA2005, FeatureUA2007, FeatureOSA2011]>;
+   FeatureUA2005, FeatureUA2007, FeatureOSA2011,
+   FeatureCrypto]>;
 
 // LEON 2 FT generic
 def : Processor<"leon2", LEON2Itineraries,
diff --git a/llvm/lib/Target/Sparc/SparcInstrCrypto.td 
b/llvm/lib/Target/Sparc/SparcInstrCrypto.td
new file mode 100644
index 0..0e7063f99eb06
--- /dev/null
+++ b/llvm/lib/Target/Sparc/SparcInstrCrypto.td
@@ -0,0 +1,98 @@
+//===--- SparcInstrCrypto.td - cryptographic extensions 
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file contains instruction formats, definitions and patterns needed for
+// cryptographic instructions on SPARC.
+//===--===//
+
+
+// Convenience template for 4-operand instructions
+class FourOpImm op3val, bits<4> op5val,
+RegisterClass RC>
+  : F3_4;
+
+let Predicates = [HasCrypto] in {
+def AES_EROUND01 : FourOp<"aes_eround01", 0b011001, 0b, DFPRegs>;
+def AES_EROUND23 : FourOp<"aes_eround23", 0b011001, 0b0001, DFPRegs>;
+def AES_DROUND01 : FourOp<"aes_dround01", 0b011001, 0b0010, DFPRegs>;
+def AES_DROUND23 : FourOp<"aes_dround23", 0b011001, 0b0011, DFPRegs>;
+def AES_EROUND01_LAST : FourOp<"aes_eround01_l", 0b011001, 0b0100, DFPRegs>;
+def AES_EROUND23_LAST : FourOp<"aes_eround23_l", 0b011001, 0b0101, DFPRegs>;
+def AES_DROUND01_LAST : FourOp<"aes_dround01_l", 0b011001, 0b0110, DFPRegs>;
+def AES_DROUND23_LAST : FourOp<"aes_dround23_l", 0b011001, 0b0111, DFPRegs>;
+def AES_KEXPAND0  : F3_3<2, 0b110110, 0b10011,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"aes_kexpand0 $rs1, $rs2, $rd", []>;
+def AES_KEXPAND1 : FourOpImm<"aes_kexpand1", 0b011001, 0b1000, DFPRegs>;
+def AES_KEXPAND2  : F3_3<2, 0b110110, 0b100110001,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"aes_kexpand2 $rs1, $rs2, $rd", []>;
+
+def CAMELLIA_F : FourOp<"camellia_f", 0b011001, 0b1100, DFPRegs>;
+def CAMELLIA_FL  : F3_3<2, 0b110110, 0b10000,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"camellia_fl $rs1, $rs2, $rd", []>;
+def CAMELLIA_FLI : F3_3<2, 0b110110, 0b10001,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"camellia_fli $rs1, $rs2, $rd", []>;
+
+def CRC32C : F3_3<2, 0b110110, 0b101000111,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"crc32c $rs1, $rs2, $rd", []>;
+
+def DES_ROUND : FourOp<"des_round", 0b011001, 0b1001, DFPRegs>;
+let rs2 = 0 in {
+def DES_IP  : F3_3<2, 0b110110, 0b100110100,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1),
+"des_ip $rs1, $rd", []>;
+def DES_IIP  : F3_3<2, 0b110110, 0b100110101,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1),
+"des_iip $rs1, $rd", []>;
+}
+def DES_KEXPAND : F3_3<2, 0b110110, 0b100110110,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, simm5Op:$rs2),
+"des_kexpand $rs1, $rs2, $rd", []>;
+
+let rs1 = 0, rs2 = 0, rd = 0 in {
+let Uses = [D0, D1, D2, D5, D6, D7, D8, D9, D10, D11

[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-05-11 Thread via llvm-branch-commits 

llvmbot wrote:




@llvm/pr-subscribers-mc

Author: Koakuma (koachan)


Changes



---
Full diff: https://github.com/llvm/llvm-project/pull/139451.diff


5 Files Affected:

- (modified) llvm/lib/Target/Sparc/Sparc.td (+5-1) 
- (added) llvm/lib/Target/Sparc/SparcInstrCrypto.td (+98) 
- (modified) llvm/lib/Target/Sparc/SparcInstrInfo.td (+5) 
- (added) llvm/test/MC/Disassembler/Sparc/sparc-crypto.txt (+56) 
- (added) llvm/test/MC/Sparc/sparc-crypto.s (+88) 


``diff
diff --git a/llvm/lib/Target/Sparc/Sparc.td b/llvm/lib/Target/Sparc/Sparc.td
index 6e6c887e60e12..7c26bf9061cb6 100644
--- a/llvm/lib/Target/Sparc/Sparc.td
+++ b/llvm/lib/Target/Sparc/Sparc.td
@@ -58,6 +58,9 @@ def FeatureUA2007
 def FeatureOSA2011
   : SubtargetFeature<"osa2011", "IsOSA2011", "true",
  "Enable Oracle SPARC Architecture 2011 extensions">;
+def FeatureCrypto
+  : SubtargetFeature<"crypto", "IsCrypto", "true",
+ "Enable cryptographic extensions">;
 def FeatureLeon
   : SubtargetFeature<"leon", "IsLeon", "true",
  "Enable LEON extensions">;
@@ -169,7 +172,8 @@ def : Proc<"niagara3",[FeatureV9, 
FeatureV8Deprecated, UsePopc,
FeatureUA2005, FeatureUA2007]>;
 def : Proc<"niagara4",[FeatureV9, FeatureV8Deprecated, UsePopc,
FeatureVIS, FeatureVIS2, FeatureVIS3,
-   FeatureUA2005, FeatureUA2007, FeatureOSA2011]>;
+   FeatureUA2005, FeatureUA2007, FeatureOSA2011,
+   FeatureCrypto]>;
 
 // LEON 2 FT generic
 def : Processor<"leon2", LEON2Itineraries,
diff --git a/llvm/lib/Target/Sparc/SparcInstrCrypto.td 
b/llvm/lib/Target/Sparc/SparcInstrCrypto.td
new file mode 100644
index 0..0e7063f99eb06
--- /dev/null
+++ b/llvm/lib/Target/Sparc/SparcInstrCrypto.td
@@ -0,0 +1,98 @@
+//===--- SparcInstrCrypto.td - cryptographic extensions 
---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM 
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===--===//
+//
+// This file contains instruction formats, definitions and patterns needed for
+// cryptographic instructions on SPARC.
+//===--===//
+
+
+// Convenience template for 4-operand instructions
+class FourOpImm op3val, bits<4> op5val,
+RegisterClass RC>
+  : F3_4;
+
+let Predicates = [HasCrypto] in {
+def AES_EROUND01 : FourOp<"aes_eround01", 0b011001, 0b, DFPRegs>;
+def AES_EROUND23 : FourOp<"aes_eround23", 0b011001, 0b0001, DFPRegs>;
+def AES_DROUND01 : FourOp<"aes_dround01", 0b011001, 0b0010, DFPRegs>;
+def AES_DROUND23 : FourOp<"aes_dround23", 0b011001, 0b0011, DFPRegs>;
+def AES_EROUND01_LAST : FourOp<"aes_eround01_l", 0b011001, 0b0100, DFPRegs>;
+def AES_EROUND23_LAST : FourOp<"aes_eround23_l", 0b011001, 0b0101, DFPRegs>;
+def AES_DROUND01_LAST : FourOp<"aes_dround01_l", 0b011001, 0b0110, DFPRegs>;
+def AES_DROUND23_LAST : FourOp<"aes_dround23_l", 0b011001, 0b0111, DFPRegs>;
+def AES_KEXPAND0  : F3_3<2, 0b110110, 0b10011,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"aes_kexpand0 $rs1, $rs2, $rd", []>;
+def AES_KEXPAND1 : FourOpImm<"aes_kexpand1", 0b011001, 0b1000, DFPRegs>;
+def AES_KEXPAND2  : F3_3<2, 0b110110, 0b100110001,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"aes_kexpand2 $rs1, $rs2, $rd", []>;
+
+def CAMELLIA_F : FourOp<"camellia_f", 0b011001, 0b1100, DFPRegs>;
+def CAMELLIA_FL  : F3_3<2, 0b110110, 0b10000,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"camellia_fl $rs1, $rs2, $rd", []>;
+def CAMELLIA_FLI : F3_3<2, 0b110110, 0b10001,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"camellia_fli $rs1, $rs2, $rd", []>;
+
+def CRC32C : F3_3<2, 0b110110, 0b101000111,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, DFPRegs:$rs2),
+"crc32c $rs1, $rs2, $rd", []>;
+
+def DES_ROUND : FourOp<"des_round", 0b011001, 0b1001, DFPRegs>;
+let rs2 = 0 in {
+def DES_IP  : F3_3<2, 0b110110, 0b100110100,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1),
+"des_ip $rs1, $rd", []>;
+def DES_IIP  : F3_3<2, 0b110110, 0b100110101,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1),
+"des_iip $rs1, $rd", []>;
+}
+def DES_KEXPAND : F3_3<2, 0b110110, 0b100110110,
+(outs DFPRegs:$rd), (ins DFPRegs:$rs1, simm5Op:$rs2),
+"des_kexpand $rs1, $rs2, $rd", []>;
+
+let rs1 = 0, rs2 = 0, rd = 0 in {
+let Uses = [D0, D1, D2, D5, D6, D7, D8, D9, D10, D11],
+Def

[llvm-branch-commits] [SPARC][IAS] Add definitions for cryptographic instructions (PR #139451)

2025-05-11 Thread via llvm-branch-commits 

https://github.com/koachan created 
https://github.com/llvm/llvm-project/pull/139451

None


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