[llvm-branch-commits] [llvm] AMDGPU: Move fpenvIEEEMode into TTI (PR #141945)
arsenm wrote: ### Merge activity * **Jun 17, 10:54 PM UTC**: A user started a stack merge that includes this pull request via [Graphite](https://app.graphite.dev/github/pr/llvm/llvm-project/141945). https://github.com/llvm/llvm-project/pull/141945 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] AMDGPU: Move fpenvIEEEMode into TTI (PR #141945)
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/141945
>From 99162375bef4a757fc95bfba805c559b7b13fbfe Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Thu, 29 May 2025 11:16:22 +0200
Subject: [PATCH] AMDGPU: Move fpenvIEEEMode into TTI
---
.../AMDGPU/AMDGPUInstCombineIntrinsic.cpp | 28 ++-
.../AMDGPU/AMDGPUTargetTransformInfo.cpp | 17 +++
.../Target/AMDGPU/AMDGPUTargetTransformInfo.h | 7 +
3 files changed, 27 insertions(+), 25 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
index 9be8821d5bf96..d12170a60905b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
@@ -60,28 +60,6 @@ static APFloat fmed3AMDGCN(const APFloat &Src0, const
APFloat &Src1,
return maxnum(Src0, Src1);
}
-enum class KnownIEEEMode { Unknown, On, Off };
-
-/// Return KnownIEEEMode::On if we know if the use context can assume
-/// "amdgpu-ieee"="true" and KnownIEEEMode::Off if we can assume
-/// "amdgpu-ieee"="false".
-static KnownIEEEMode fpenvIEEEMode(const Instruction &I,
- const GCNSubtarget &ST) {
- if (!ST.hasIEEEMode()) // Only mode on gfx12
-return KnownIEEEMode::On;
-
- const Function *F = I.getFunction();
- if (!F)
-return KnownIEEEMode::Unknown;
-
- Attribute IEEEAttr = F->getFnAttribute("amdgpu-ieee");
- if (IEEEAttr.isValid())
-return IEEEAttr.getValueAsBool() ? KnownIEEEMode::On : KnownIEEEMode::Off;
-
- return AMDGPU::isShader(F->getCallingConv()) ? KnownIEEEMode::Off
- : KnownIEEEMode::On;
-}
-
// Check if a value can be converted to a 16-bit value without losing
// precision.
// The value is expected to be either a float (IsFloat = true) or an unsigned
@@ -1004,7 +982,7 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
// TODO: Also can fold to 2 operands with infinities.
if ((match(Src0, m_APFloat(ConstSrc0)) && ConstSrc0->isNaN()) ||
isa(Src0)) {
- switch (fpenvIEEEMode(II, *ST)) {
+ switch (fpenvIEEEMode(II)) {
case KnownIEEEMode::On:
// TODO: If Src2 is snan, does it need quieting?
if (ConstSrc0 && ConstSrc0->isSignaling())
@@ -1019,7 +997,7 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
}
} else if ((match(Src1, m_APFloat(ConstSrc1)) && ConstSrc1->isNaN()) ||
isa(Src1)) {
- switch (fpenvIEEEMode(II, *ST)) {
+ switch (fpenvIEEEMode(II)) {
case KnownIEEEMode::On:
// TODO: If Src2 is snan, does it need quieting?
if (ConstSrc1 && ConstSrc1->isSignaling())
@@ -1035,7 +1013,7 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
}
} else if ((match(Src2, m_APFloat(ConstSrc2)) && ConstSrc2->isNaN()) ||
isa(Src2)) {
- switch (fpenvIEEEMode(II, *ST)) {
+ switch (fpenvIEEEMode(II)) {
case KnownIEEEMode::On:
if (ConstSrc2 && ConstSrc2->isSignaling()) {
auto *Quieted = ConstantFP::get(II.getType(),
ConstSrc2->makeQuiet());
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
index b79c9be3eac93..ce2098a3a19bb 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
@@ -1445,3 +1445,20 @@ void GCNTTIImpl::collectKernelLaunchBounds(
LB.push_back({"amdgpu-waves-per-eu[0]", WavesPerEU.first});
LB.push_back({"amdgpu-waves-per-eu[1]", WavesPerEU.second});
}
+
+GCNTTIImpl::KnownIEEEMode
+GCNTTIImpl::fpenvIEEEMode(const Instruction &I) const {
+ if (!ST->hasIEEEMode()) // Only mode on gfx12
+return KnownIEEEMode::On;
+
+ const Function *F = I.getFunction();
+ if (!F)
+return KnownIEEEMode::Unknown;
+
+ Attribute IEEEAttr = F->getFnAttribute("amdgpu-ieee");
+ if (IEEEAttr.isValid())
+return IEEEAttr.getValueAsBool() ? KnownIEEEMode::On : KnownIEEEMode::Off;
+
+ return AMDGPU::isShader(F->getCallingConv()) ? KnownIEEEMode::Off
+ : KnownIEEEMode::On;
+}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
index ec298c7e9631a..0fae301abf532 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
@@ -281,6 +281,13 @@ class GCNTTIImpl final : public
BasicTTIImplBase {
void collectKernelLaunchBounds(
const Function &F,
SmallVectorImpl> &LB) const override;
+
+ enum class KnownIEEEMode { Unknown, On, Off };
+
+ /// Return KnownIEEEMode::On if we know if the use context can assume
+ /// "amdgpu-ieee"="true" and KnownIEEEMode::Off if we can assume
+ /// "amdgpu-ieee"="false".
+
[llvm-branch-commits] [llvm] AMDGPU: Move fpenvIEEEMode into TTI (PR #141945)
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/141945
>From 99162375bef4a757fc95bfba805c559b7b13fbfe Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Thu, 29 May 2025 11:16:22 +0200
Subject: [PATCH] AMDGPU: Move fpenvIEEEMode into TTI
---
.../AMDGPU/AMDGPUInstCombineIntrinsic.cpp | 28 ++-
.../AMDGPU/AMDGPUTargetTransformInfo.cpp | 17 +++
.../Target/AMDGPU/AMDGPUTargetTransformInfo.h | 7 +
3 files changed, 27 insertions(+), 25 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
index 9be8821d5bf96..d12170a60905b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
@@ -60,28 +60,6 @@ static APFloat fmed3AMDGCN(const APFloat &Src0, const
APFloat &Src1,
return maxnum(Src0, Src1);
}
-enum class KnownIEEEMode { Unknown, On, Off };
-
-/// Return KnownIEEEMode::On if we know if the use context can assume
-/// "amdgpu-ieee"="true" and KnownIEEEMode::Off if we can assume
-/// "amdgpu-ieee"="false".
-static KnownIEEEMode fpenvIEEEMode(const Instruction &I,
- const GCNSubtarget &ST) {
- if (!ST.hasIEEEMode()) // Only mode on gfx12
-return KnownIEEEMode::On;
-
- const Function *F = I.getFunction();
- if (!F)
-return KnownIEEEMode::Unknown;
-
- Attribute IEEEAttr = F->getFnAttribute("amdgpu-ieee");
- if (IEEEAttr.isValid())
-return IEEEAttr.getValueAsBool() ? KnownIEEEMode::On : KnownIEEEMode::Off;
-
- return AMDGPU::isShader(F->getCallingConv()) ? KnownIEEEMode::Off
- : KnownIEEEMode::On;
-}
-
// Check if a value can be converted to a 16-bit value without losing
// precision.
// The value is expected to be either a float (IsFloat = true) or an unsigned
@@ -1004,7 +982,7 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
// TODO: Also can fold to 2 operands with infinities.
if ((match(Src0, m_APFloat(ConstSrc0)) && ConstSrc0->isNaN()) ||
isa(Src0)) {
- switch (fpenvIEEEMode(II, *ST)) {
+ switch (fpenvIEEEMode(II)) {
case KnownIEEEMode::On:
// TODO: If Src2 is snan, does it need quieting?
if (ConstSrc0 && ConstSrc0->isSignaling())
@@ -1019,7 +997,7 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
}
} else if ((match(Src1, m_APFloat(ConstSrc1)) && ConstSrc1->isNaN()) ||
isa(Src1)) {
- switch (fpenvIEEEMode(II, *ST)) {
+ switch (fpenvIEEEMode(II)) {
case KnownIEEEMode::On:
// TODO: If Src2 is snan, does it need quieting?
if (ConstSrc1 && ConstSrc1->isSignaling())
@@ -1035,7 +1013,7 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
}
} else if ((match(Src2, m_APFloat(ConstSrc2)) && ConstSrc2->isNaN()) ||
isa(Src2)) {
- switch (fpenvIEEEMode(II, *ST)) {
+ switch (fpenvIEEEMode(II)) {
case KnownIEEEMode::On:
if (ConstSrc2 && ConstSrc2->isSignaling()) {
auto *Quieted = ConstantFP::get(II.getType(),
ConstSrc2->makeQuiet());
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
index b79c9be3eac93..ce2098a3a19bb 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
@@ -1445,3 +1445,20 @@ void GCNTTIImpl::collectKernelLaunchBounds(
LB.push_back({"amdgpu-waves-per-eu[0]", WavesPerEU.first});
LB.push_back({"amdgpu-waves-per-eu[1]", WavesPerEU.second});
}
+
+GCNTTIImpl::KnownIEEEMode
+GCNTTIImpl::fpenvIEEEMode(const Instruction &I) const {
+ if (!ST->hasIEEEMode()) // Only mode on gfx12
+return KnownIEEEMode::On;
+
+ const Function *F = I.getFunction();
+ if (!F)
+return KnownIEEEMode::Unknown;
+
+ Attribute IEEEAttr = F->getFnAttribute("amdgpu-ieee");
+ if (IEEEAttr.isValid())
+return IEEEAttr.getValueAsBool() ? KnownIEEEMode::On : KnownIEEEMode::Off;
+
+ return AMDGPU::isShader(F->getCallingConv()) ? KnownIEEEMode::Off
+ : KnownIEEEMode::On;
+}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
index ec298c7e9631a..0fae301abf532 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
@@ -281,6 +281,13 @@ class GCNTTIImpl final : public
BasicTTIImplBase {
void collectKernelLaunchBounds(
const Function &F,
SmallVectorImpl> &LB) const override;
+
+ enum class KnownIEEEMode { Unknown, On, Off };
+
+ /// Return KnownIEEEMode::On if we know if the use context can assume
+ /// "amdgpu-ieee"="true" and KnownIEEEMode::Off if we can assume
+ /// "amdgpu-ieee"="false".
+
[llvm-branch-commits] [llvm] AMDGPU: Move fpenvIEEEMode into TTI (PR #141945)
https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/141945
>From 63d221ae57f3fb5f2e41bc29ff93338c209ab0fe Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Thu, 29 May 2025 11:16:22 +0200
Subject: [PATCH] AMDGPU: Move fpenvIEEEMode into TTI
---
.../AMDGPU/AMDGPUInstCombineIntrinsic.cpp | 28 ++-
.../AMDGPU/AMDGPUTargetTransformInfo.cpp | 17 +++
.../Target/AMDGPU/AMDGPUTargetTransformInfo.h | 7 +
3 files changed, 27 insertions(+), 25 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
index 9be8821d5bf96..d12170a60905b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
@@ -60,28 +60,6 @@ static APFloat fmed3AMDGCN(const APFloat &Src0, const
APFloat &Src1,
return maxnum(Src0, Src1);
}
-enum class KnownIEEEMode { Unknown, On, Off };
-
-/// Return KnownIEEEMode::On if we know if the use context can assume
-/// "amdgpu-ieee"="true" and KnownIEEEMode::Off if we can assume
-/// "amdgpu-ieee"="false".
-static KnownIEEEMode fpenvIEEEMode(const Instruction &I,
- const GCNSubtarget &ST) {
- if (!ST.hasIEEEMode()) // Only mode on gfx12
-return KnownIEEEMode::On;
-
- const Function *F = I.getFunction();
- if (!F)
-return KnownIEEEMode::Unknown;
-
- Attribute IEEEAttr = F->getFnAttribute("amdgpu-ieee");
- if (IEEEAttr.isValid())
-return IEEEAttr.getValueAsBool() ? KnownIEEEMode::On : KnownIEEEMode::Off;
-
- return AMDGPU::isShader(F->getCallingConv()) ? KnownIEEEMode::Off
- : KnownIEEEMode::On;
-}
-
// Check if a value can be converted to a 16-bit value without losing
// precision.
// The value is expected to be either a float (IsFloat = true) or an unsigned
@@ -1004,7 +982,7 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
// TODO: Also can fold to 2 operands with infinities.
if ((match(Src0, m_APFloat(ConstSrc0)) && ConstSrc0->isNaN()) ||
isa(Src0)) {
- switch (fpenvIEEEMode(II, *ST)) {
+ switch (fpenvIEEEMode(II)) {
case KnownIEEEMode::On:
// TODO: If Src2 is snan, does it need quieting?
if (ConstSrc0 && ConstSrc0->isSignaling())
@@ -1019,7 +997,7 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
}
} else if ((match(Src1, m_APFloat(ConstSrc1)) && ConstSrc1->isNaN()) ||
isa(Src1)) {
- switch (fpenvIEEEMode(II, *ST)) {
+ switch (fpenvIEEEMode(II)) {
case KnownIEEEMode::On:
// TODO: If Src2 is snan, does it need quieting?
if (ConstSrc1 && ConstSrc1->isSignaling())
@@ -1035,7 +1013,7 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
}
} else if ((match(Src2, m_APFloat(ConstSrc2)) && ConstSrc2->isNaN()) ||
isa(Src2)) {
- switch (fpenvIEEEMode(II, *ST)) {
+ switch (fpenvIEEEMode(II)) {
case KnownIEEEMode::On:
if (ConstSrc2 && ConstSrc2->isSignaling()) {
auto *Quieted = ConstantFP::get(II.getType(),
ConstSrc2->makeQuiet());
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
index b79c9be3eac93..ce2098a3a19bb 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
@@ -1445,3 +1445,20 @@ void GCNTTIImpl::collectKernelLaunchBounds(
LB.push_back({"amdgpu-waves-per-eu[0]", WavesPerEU.first});
LB.push_back({"amdgpu-waves-per-eu[1]", WavesPerEU.second});
}
+
+GCNTTIImpl::KnownIEEEMode
+GCNTTIImpl::fpenvIEEEMode(const Instruction &I) const {
+ if (!ST->hasIEEEMode()) // Only mode on gfx12
+return KnownIEEEMode::On;
+
+ const Function *F = I.getFunction();
+ if (!F)
+return KnownIEEEMode::Unknown;
+
+ Attribute IEEEAttr = F->getFnAttribute("amdgpu-ieee");
+ if (IEEEAttr.isValid())
+return IEEEAttr.getValueAsBool() ? KnownIEEEMode::On : KnownIEEEMode::Off;
+
+ return AMDGPU::isShader(F->getCallingConv()) ? KnownIEEEMode::Off
+ : KnownIEEEMode::On;
+}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
index ec298c7e9631a..0fae301abf532 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
@@ -281,6 +281,13 @@ class GCNTTIImpl final : public
BasicTTIImplBase {
void collectKernelLaunchBounds(
const Function &F,
SmallVectorImpl> &LB) const override;
+
+ enum class KnownIEEEMode { Unknown, On, Off };
+
+ /// Return KnownIEEEMode::On if we know if the use context can assume
+ /// "amdgpu-ieee"="true" and KnownIEEEMode::Off if we can assume
+ /// "amdgpu-ieee"="false".
+
[llvm-branch-commits] [llvm] AMDGPU: Move fpenvIEEEMode into TTI (PR #141945)
https://github.com/Pierre-vh edited https://github.com/llvm/llvm-project/pull/141945 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] AMDGPU: Move fpenvIEEEMode into TTI (PR #141945)
@@ -281,6 +281,13 @@ class GCNTTIImpl final : public
BasicTTIImplBase {
void collectKernelLaunchBounds(
const Function &F,
SmallVectorImpl> &LB) const override;
+
+ enum class KnownIEEEMode { Unknown, On, Off };
+
+ /// Return KnownIEEEMode::On if we know if the use context can assume
Pierre-vh wrote:
```suggestion
/// \returns KnownIEEEMode::On if we know if the use context can assume
```
https://github.com/llvm/llvm-project/pull/141945
___
llvm-branch-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] AMDGPU: Move fpenvIEEEMode into TTI (PR #141945)
https://github.com/Pierre-vh approved this pull request. unrelated to this patch but `KnownIEEEMode::Unknown` looks weird, maybe it should just be named `IEEEMode`? https://github.com/llvm/llvm-project/pull/141945 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] AMDGPU: Move fpenvIEEEMode into TTI (PR #141945)
llvmbot wrote:
@llvm/pr-subscribers-llvm-analysis
Author: Matt Arsenault (arsenm)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/141945.diff
3 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp (+3-25)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp (+17)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h (+7)
``diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
index 5f6ab24182d5e..b0774385547c6 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
@@ -60,28 +60,6 @@ static APFloat fmed3AMDGCN(const APFloat &Src0, const
APFloat &Src1,
return maxnum(Src0, Src1);
}
-enum class KnownIEEEMode { Unknown, On, Off };
-
-/// Return KnownIEEEMode::On if we know if the use context can assume
-/// "amdgpu-ieee"="true" and KnownIEEEMode::Off if we can assume
-/// "amdgpu-ieee"="false".
-static KnownIEEEMode fpenvIEEEMode(const Instruction &I,
- const GCNSubtarget &ST) {
- if (!ST.hasIEEEMode()) // Only mode on gfx12
-return KnownIEEEMode::On;
-
- const Function *F = I.getFunction();
- if (!F)
-return KnownIEEEMode::Unknown;
-
- Attribute IEEEAttr = F->getFnAttribute("amdgpu-ieee");
- if (IEEEAttr.isValid())
-return IEEEAttr.getValueAsBool() ? KnownIEEEMode::On : KnownIEEEMode::Off;
-
- return AMDGPU::isShader(F->getCallingConv()) ? KnownIEEEMode::Off
- : KnownIEEEMode::On;
-}
-
// Check if a value can be converted to a 16-bit value without losing
// precision.
// The value is expected to be either a float (IsFloat = true) or an unsigned
@@ -1003,7 +981,7 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
// TODO: Also can fold to 2 operands with infinities.
if ((match(Src0, m_APFloat(ConstSrc0)) && ConstSrc0->isNaN()) ||
isa(Src0)) {
- switch (fpenvIEEEMode(II, *ST)) {
+ switch (fpenvIEEEMode(II)) {
case KnownIEEEMode::On:
// TODO: If Src2 is snan, does it need quieting?
if (ConstSrc0 && ConstSrc0->isSignaling())
@@ -1018,7 +996,7 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
}
} else if ((match(Src1, m_APFloat(ConstSrc1)) && ConstSrc1->isNaN()) ||
isa(Src1)) {
- switch (fpenvIEEEMode(II, *ST)) {
+ switch (fpenvIEEEMode(II)) {
case KnownIEEEMode::On:
// TODO: If Src2 is snan, does it need quieting?
if (ConstSrc1 && ConstSrc1->isSignaling())
@@ -1034,7 +1012,7 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
}
} else if ((match(Src2, m_APFloat(ConstSrc2)) && ConstSrc2->isNaN()) ||
isa(Src2)) {
- switch (fpenvIEEEMode(II, *ST)) {
+ switch (fpenvIEEEMode(II)) {
case KnownIEEEMode::On:
if (ConstSrc2 && ConstSrc2->isSignaling()) {
auto *Quieted = ConstantFP::get(II.getType(),
ConstSrc2->makeQuiet());
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
index c1ccc8f6798a6..563c46f57dfa5 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
@@ -1445,3 +1445,20 @@ void GCNTTIImpl::collectKernelLaunchBounds(
LB.push_back({"amdgpu-waves-per-eu[0]", WavesPerEU.first});
LB.push_back({"amdgpu-waves-per-eu[1]", WavesPerEU.second});
}
+
+GCNTTIImpl::KnownIEEEMode
+GCNTTIImpl::fpenvIEEEMode(const Instruction &I) const {
+ if (!ST->hasIEEEMode()) // Only mode on gfx12
+return KnownIEEEMode::On;
+
+ const Function *F = I.getFunction();
+ if (!F)
+return KnownIEEEMode::Unknown;
+
+ Attribute IEEEAttr = F->getFnAttribute("amdgpu-ieee");
+ if (IEEEAttr.isValid())
+return IEEEAttr.getValueAsBool() ? KnownIEEEMode::On : KnownIEEEMode::Off;
+
+ return AMDGPU::isShader(F->getCallingConv()) ? KnownIEEEMode::Off
+ : KnownIEEEMode::On;
+}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
index ec298c7e9631a..0fae301abf532 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
@@ -281,6 +281,13 @@ class GCNTTIImpl final : public
BasicTTIImplBase {
void collectKernelLaunchBounds(
const Function &F,
SmallVectorImpl> &LB) const override;
+
+ enum class KnownIEEEMode { Unknown, On, Off };
+
+ /// Return KnownIEEEMode::On if we know if the use context can assume
+ /// "amdgpu-ieee"="true" and KnownIEEEMode::Off if we can assume
+ /// "amdgpu-ieee"="false".
+ KnownIEEEMode fpenvIEEEMode(const Instruction &I) const;
};
} // end namespace llvm
`
[llvm-branch-commits] [llvm] AMDGPU: Move fpenvIEEEMode into TTI (PR #141945)
llvmbot wrote:
@llvm/pr-subscribers-backend-amdgpu
Author: Matt Arsenault (arsenm)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/141945.diff
3 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp (+3-25)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp (+17)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h (+7)
``diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
index 5f6ab24182d5e..b0774385547c6 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
@@ -60,28 +60,6 @@ static APFloat fmed3AMDGCN(const APFloat &Src0, const
APFloat &Src1,
return maxnum(Src0, Src1);
}
-enum class KnownIEEEMode { Unknown, On, Off };
-
-/// Return KnownIEEEMode::On if we know if the use context can assume
-/// "amdgpu-ieee"="true" and KnownIEEEMode::Off if we can assume
-/// "amdgpu-ieee"="false".
-static KnownIEEEMode fpenvIEEEMode(const Instruction &I,
- const GCNSubtarget &ST) {
- if (!ST.hasIEEEMode()) // Only mode on gfx12
-return KnownIEEEMode::On;
-
- const Function *F = I.getFunction();
- if (!F)
-return KnownIEEEMode::Unknown;
-
- Attribute IEEEAttr = F->getFnAttribute("amdgpu-ieee");
- if (IEEEAttr.isValid())
-return IEEEAttr.getValueAsBool() ? KnownIEEEMode::On : KnownIEEEMode::Off;
-
- return AMDGPU::isShader(F->getCallingConv()) ? KnownIEEEMode::Off
- : KnownIEEEMode::On;
-}
-
// Check if a value can be converted to a 16-bit value without losing
// precision.
// The value is expected to be either a float (IsFloat = true) or an unsigned
@@ -1003,7 +981,7 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
// TODO: Also can fold to 2 operands with infinities.
if ((match(Src0, m_APFloat(ConstSrc0)) && ConstSrc0->isNaN()) ||
isa(Src0)) {
- switch (fpenvIEEEMode(II, *ST)) {
+ switch (fpenvIEEEMode(II)) {
case KnownIEEEMode::On:
// TODO: If Src2 is snan, does it need quieting?
if (ConstSrc0 && ConstSrc0->isSignaling())
@@ -1018,7 +996,7 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
}
} else if ((match(Src1, m_APFloat(ConstSrc1)) && ConstSrc1->isNaN()) ||
isa(Src1)) {
- switch (fpenvIEEEMode(II, *ST)) {
+ switch (fpenvIEEEMode(II)) {
case KnownIEEEMode::On:
// TODO: If Src2 is snan, does it need quieting?
if (ConstSrc1 && ConstSrc1->isSignaling())
@@ -1034,7 +1012,7 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
}
} else if ((match(Src2, m_APFloat(ConstSrc2)) && ConstSrc2->isNaN()) ||
isa(Src2)) {
- switch (fpenvIEEEMode(II, *ST)) {
+ switch (fpenvIEEEMode(II)) {
case KnownIEEEMode::On:
if (ConstSrc2 && ConstSrc2->isSignaling()) {
auto *Quieted = ConstantFP::get(II.getType(),
ConstSrc2->makeQuiet());
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
index c1ccc8f6798a6..563c46f57dfa5 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
@@ -1445,3 +1445,20 @@ void GCNTTIImpl::collectKernelLaunchBounds(
LB.push_back({"amdgpu-waves-per-eu[0]", WavesPerEU.first});
LB.push_back({"amdgpu-waves-per-eu[1]", WavesPerEU.second});
}
+
+GCNTTIImpl::KnownIEEEMode
+GCNTTIImpl::fpenvIEEEMode(const Instruction &I) const {
+ if (!ST->hasIEEEMode()) // Only mode on gfx12
+return KnownIEEEMode::On;
+
+ const Function *F = I.getFunction();
+ if (!F)
+return KnownIEEEMode::Unknown;
+
+ Attribute IEEEAttr = F->getFnAttribute("amdgpu-ieee");
+ if (IEEEAttr.isValid())
+return IEEEAttr.getValueAsBool() ? KnownIEEEMode::On : KnownIEEEMode::Off;
+
+ return AMDGPU::isShader(F->getCallingConv()) ? KnownIEEEMode::Off
+ : KnownIEEEMode::On;
+}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
index ec298c7e9631a..0fae301abf532 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
@@ -281,6 +281,13 @@ class GCNTTIImpl final : public
BasicTTIImplBase {
void collectKernelLaunchBounds(
const Function &F,
SmallVectorImpl> &LB) const override;
+
+ enum class KnownIEEEMode { Unknown, On, Off };
+
+ /// Return KnownIEEEMode::On if we know if the use context can assume
+ /// "amdgpu-ieee"="true" and KnownIEEEMode::Off if we can assume
+ /// "amdgpu-ieee"="false".
+ KnownIEEEMode fpenvIEEEMode(const Instruction &I) const;
};
} // end namespace llvm
[llvm-branch-commits] [llvm] AMDGPU: Move fpenvIEEEMode into TTI (PR #141945)
https://github.com/arsenm ready_for_review https://github.com/llvm/llvm-project/pull/141945 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] AMDGPU: Move fpenvIEEEMode into TTI (PR #141945)
arsenm wrote: > [!WARNING] > This pull request is not mergeable via GitHub because a downstack PR is > open. Once all requirements are satisfied, merge this PR as a stack href="https://app.graphite.dev/github/pr/llvm/llvm-project/141945?utm_source=stack-comment-downstack-mergeability-warning"; > >on Graphite. > https://graphite.dev/docs/merge-pull-requests";>Learn more * **#141948** https://app.graphite.dev/github/pr/llvm/llvm-project/141948?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#141947** https://app.graphite.dev/github/pr/llvm/llvm-project/141947?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#141946** https://app.graphite.dev/github/pr/llvm/llvm-project/141946?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#141945** https://app.graphite.dev/github/pr/llvm/llvm-project/141945?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> 👈 https://app.graphite.dev/github/pr/llvm/llvm-project/141945?utm_source=stack-comment-view-in-graphite"; target="_blank">(View in Graphite) * **#141944** https://app.graphite.dev/github/pr/llvm/llvm-project/141944?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#141943** https://app.graphite.dev/github/pr/llvm/llvm-project/141943?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#141904** https://app.graphite.dev/github/pr/llvm/llvm-project/141904?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * **#141903** https://app.graphite.dev/github/pr/llvm/llvm-project/141903?utm_source=stack-comment-icon"; target="_blank">https://static.graphite.dev/graphite-32x32-black.png"; alt="Graphite" width="10px" height="10px"/> * `main` This stack of pull requests is managed by https://graphite.dev?utm-source=stack-comment";>Graphite. Learn more about https://stacking.dev/?utm_source=stack-comment";>stacking. https://github.com/llvm/llvm-project/pull/141945 ___ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
[llvm-branch-commits] [llvm] AMDGPU: Move fpenvIEEEMode into TTI (PR #141945)
https://github.com/arsenm created
https://github.com/llvm/llvm-project/pull/141945
None
>From dc0d24948146621e6ba5e39c21ea7f4494a14ed1 Mon Sep 17 00:00:00 2001
From: Matt Arsenault
Date: Thu, 29 May 2025 11:16:22 +0200
Subject: [PATCH] AMDGPU: Move fpenvIEEEMode into TTI
---
.../AMDGPU/AMDGPUInstCombineIntrinsic.cpp | 28 ++-
.../AMDGPU/AMDGPUTargetTransformInfo.cpp | 17 +++
.../Target/AMDGPU/AMDGPUTargetTransformInfo.h | 7 +
3 files changed, 27 insertions(+), 25 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
index 5f6ab24182d5e..b0774385547c6 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
@@ -60,28 +60,6 @@ static APFloat fmed3AMDGCN(const APFloat &Src0, const
APFloat &Src1,
return maxnum(Src0, Src1);
}
-enum class KnownIEEEMode { Unknown, On, Off };
-
-/// Return KnownIEEEMode::On if we know if the use context can assume
-/// "amdgpu-ieee"="true" and KnownIEEEMode::Off if we can assume
-/// "amdgpu-ieee"="false".
-static KnownIEEEMode fpenvIEEEMode(const Instruction &I,
- const GCNSubtarget &ST) {
- if (!ST.hasIEEEMode()) // Only mode on gfx12
-return KnownIEEEMode::On;
-
- const Function *F = I.getFunction();
- if (!F)
-return KnownIEEEMode::Unknown;
-
- Attribute IEEEAttr = F->getFnAttribute("amdgpu-ieee");
- if (IEEEAttr.isValid())
-return IEEEAttr.getValueAsBool() ? KnownIEEEMode::On : KnownIEEEMode::Off;
-
- return AMDGPU::isShader(F->getCallingConv()) ? KnownIEEEMode::Off
- : KnownIEEEMode::On;
-}
-
// Check if a value can be converted to a 16-bit value without losing
// precision.
// The value is expected to be either a float (IsFloat = true) or an unsigned
@@ -1003,7 +981,7 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
// TODO: Also can fold to 2 operands with infinities.
if ((match(Src0, m_APFloat(ConstSrc0)) && ConstSrc0->isNaN()) ||
isa(Src0)) {
- switch (fpenvIEEEMode(II, *ST)) {
+ switch (fpenvIEEEMode(II)) {
case KnownIEEEMode::On:
// TODO: If Src2 is snan, does it need quieting?
if (ConstSrc0 && ConstSrc0->isSignaling())
@@ -1018,7 +996,7 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
}
} else if ((match(Src1, m_APFloat(ConstSrc1)) && ConstSrc1->isNaN()) ||
isa(Src1)) {
- switch (fpenvIEEEMode(II, *ST)) {
+ switch (fpenvIEEEMode(II)) {
case KnownIEEEMode::On:
// TODO: If Src2 is snan, does it need quieting?
if (ConstSrc1 && ConstSrc1->isSignaling())
@@ -1034,7 +1012,7 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC,
IntrinsicInst &II) const {
}
} else if ((match(Src2, m_APFloat(ConstSrc2)) && ConstSrc2->isNaN()) ||
isa(Src2)) {
- switch (fpenvIEEEMode(II, *ST)) {
+ switch (fpenvIEEEMode(II)) {
case KnownIEEEMode::On:
if (ConstSrc2 && ConstSrc2->isSignaling()) {
auto *Quieted = ConstantFP::get(II.getType(),
ConstSrc2->makeQuiet());
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
index c1ccc8f6798a6..563c46f57dfa5 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
@@ -1445,3 +1445,20 @@ void GCNTTIImpl::collectKernelLaunchBounds(
LB.push_back({"amdgpu-waves-per-eu[0]", WavesPerEU.first});
LB.push_back({"amdgpu-waves-per-eu[1]", WavesPerEU.second});
}
+
+GCNTTIImpl::KnownIEEEMode
+GCNTTIImpl::fpenvIEEEMode(const Instruction &I) const {
+ if (!ST->hasIEEEMode()) // Only mode on gfx12
+return KnownIEEEMode::On;
+
+ const Function *F = I.getFunction();
+ if (!F)
+return KnownIEEEMode::Unknown;
+
+ Attribute IEEEAttr = F->getFnAttribute("amdgpu-ieee");
+ if (IEEEAttr.isValid())
+return IEEEAttr.getValueAsBool() ? KnownIEEEMode::On : KnownIEEEMode::Off;
+
+ return AMDGPU::isShader(F->getCallingConv()) ? KnownIEEEMode::Off
+ : KnownIEEEMode::On;
+}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
index ec298c7e9631a..0fae301abf532 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
@@ -281,6 +281,13 @@ class GCNTTIImpl final : public
BasicTTIImplBase {
void collectKernelLaunchBounds(
const Function &F,
SmallVectorImpl> &LB) const override;
+
+ enum class KnownIEEEMode { Unknown, On, Off };
+
+ /// Return KnownIEEEMode::On if we know if the use context can assume
+ /// "amdgpu-ieee"="true" and KnownIEEEMode::Off if we can assume
+ /// "amdgpu-ieee"="fal
