[llvm-branch-commits] [mlir] [MLIR][SPIRV] Enable strict property assembly format (PR #196282)

2026-05-28 Thread via llvm-branch-commits 

https://github.com/zackc6 approved this pull request.


https://github.com/llvm/llvm-project/pull/196282
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[llvm-branch-commits] [mlir] [MLIR][SPIRV] Enable strict property assembly format (PR #196282)

2026-05-09 Thread Davide Grohmann via llvm-branch-commits 

https://github.com/davidegrohmann approved this pull request.


https://github.com/llvm/llvm-project/pull/196282
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[llvm-branch-commits] [mlir] [MLIR][SPIRV] Enable strict property assembly format (PR #196282)

2026-05-08 Thread Igor Wodiany via llvm-branch-commits 

https://github.com/IgWod approved this pull request.


https://github.com/llvm/llvm-project/pull/196282
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[llvm-branch-commits] [mlir] [MLIR][SPIRV] Enable strict property assembly format (PR #196282)

2026-05-07 Thread Mehdi Amini via llvm-branch-commits 


@@ -151,7 +151,7 @@ def SPIRV_GraphConstantARMOp : 
SPIRV_GraphARMOp<"GraphConstant", [InGraphScope,
   let autogenSerialization = 0;
 
   let assemblyFormat = [{
-prop-dict attr-dict `:` type($output)
+`graph_constant_id` `=` $graph_constant_id attr-dict `:` type($output)

joker-eph wrote:

Sure, done!

https://github.com/llvm/llvm-project/pull/196282
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[llvm-branch-commits] [mlir] [MLIR][SPIRV] Enable strict property assembly format (PR #196282)

2026-05-07 Thread Mehdi Amini via llvm-branch-commits 

https://github.com/joker-eph updated 
https://github.com/llvm/llvm-project/pull/196282

>From 5d0a634e89856df49892cf235fe4c40d22f2331f Mon Sep 17 00:00:00 2001
From: Mehdi Amini 
Date: Wed, 6 May 2026 16:24:33 -0700
Subject: [PATCH 1/2] [MLIR][SPIRV] Enable strict property assembly format

Enable strict property assembly format mode for SPIR-V and add property
dictionaries to declarative formats that still carry inherent attributes outside
explicit operands or clauses.

Refresh ARM graph and TOSA tests so GraphConstant uses prop-dict spelling for
its inherent constant identifier.

Assisted-by: Codex
---
 mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td  |  1 +
 .../mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td |  2 +-
 mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td  |  2 +-
 mlir/test/Dialect/SPIRV/IR/graph-ops.mlir|  6 +++---
 .../test/Dialect/SPIRV/IR/tosa-ops-verification.mlir | 12 ++--
 mlir/test/Dialect/SPIRV/IR/tosa-ops.mlir |  2 +-
 mlir/test/Target/SPIRV/graph-ops.mlir|  4 ++--
 mlir/test/Target/SPIRV/tosa-ops.mlir |  2 +-
 8 files changed, 16 insertions(+), 15 deletions(-)

diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td 
b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
index b33a84d093fb9..7ba41873c36f9 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
@@ -52,6 +52,7 @@ def SPIRV_Dialect : Dialect {
   let hasOperationAttrVerify = 1;
   let hasRegionArgAttrVerify = 1;
   let hasRegionResultAttrVerify = 1;
+  let useStrictPropertiesInAssemblyFormat = 1;
 
   let extraClassDeclaration = [{
 void registerAttributes();
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td 
b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
index e7c314cb9acb9..d55fa93f4f4b0 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
@@ -237,7 +237,7 @@ def SPIRV_FunctionCallOp : SPIRV_Op<"FunctionCall", [
   let autogenSerialization = 0;
 
   let assemblyFormat = [{
-$callee `(` $arguments `)` attr-dict `:`
+$callee `(` $arguments `)` prop-dict attr-dict `:`
   functional-type($arguments, results)
   }];
 }
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td 
b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
index d8012749131d6..b63a7813c44bb 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
@@ -151,7 +151,7 @@ def SPIRV_GraphConstantARMOp : 
SPIRV_GraphARMOp<"GraphConstant", [InGraphScope,
   let autogenSerialization = 0;
 
   let assemblyFormat = [{
-attr-dict `:` type($output)
+prop-dict attr-dict `:` type($output)
   }];
 }
 
diff --git a/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir 
b/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
index 798147df45a34..b8b2146a7e91f 100644
--- a/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
+++ b/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
@@ -18,8 +18,8 @@ spirv.ARM.Graph @graphAndOutputs(%arg0: 
!spirv.arm.tensor<14x19xi16>) -> !spirv.
 
 // CHECK: spirv.ARM.Graph {{@.*}}() -> !spirv.arm.tensor<2x3xi16> {
 spirv.ARM.Graph @graphConstant() -> !spirv.arm.tensor<2x3xi16> {
-  // CHECK: [[CONST:%.*]] = spirv.ARM.GraphConstant {graph_constant_id = 42 : 
i32} : !spirv.arm.tensor<2x3xi16>
-  %0 = spirv.ARM.GraphConstant { graph_constant_id = 42 : i32 } : 
!spirv.arm.tensor<2x3xi16>
+  // CHECK: [[CONST:%.*]] = spirv.ARM.GraphConstant <{graph_constant_id = 42 : 
i32}> : !spirv.arm.tensor<2x3xi16>
+  %0 = spirv.ARM.GraphConstant <{graph_constant_id = 42 : i32}> : 
!spirv.arm.tensor<2x3xi16>
   // CHECK: spirv.ARM.GraphOutputs [[CONST:%.*]] : !spirv.arm.tensor<2x3xi16>
   spirv.ARM.GraphOutputs %0 : !spirv.arm.tensor<2x3xi16>
 }
@@ -63,7 +63,7 @@ spirv.ARM.Graph @graphNoOutputs(%arg0: 
!spirv.arm.tensor<14x19xi16>) -> () {
 
//===--===//
 
 // expected-error @+1 {{'spirv.ARM.GraphConstant' op failed to verify that op 
must appear in a spirv.ARM.Graph op's block}}
-%0 = spirv.ARM.GraphConstant { graph_constant_id = 42 : i32 } : 
!spirv.arm.tensor<2x3xi16>
+%0 = spirv.ARM.GraphConstant <{graph_constant_id = 42 : i32}> : 
!spirv.arm.tensor<2x3xi16>
 // -
 
 
//===--===//
diff --git a/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir 
b/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
index ca15b69303361..079829b376099 100644
--- a/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
+++ b/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
@@ -1604,42 +1604,42 @@ spirv.ARM.Graph 
@sub_output_shape_does_not_match_broadcast_shape(%arg0: !spirv.a
 
//===--===//
 
 spirv.ARM.Graph @table_input_and_table_must_have_same_element_typ

[llvm-branch-commits] [mlir] [MLIR][SPIRV] Enable strict property assembly format (PR #196282)

2026-05-07 Thread Davide Grohmann via llvm-branch-commits 


@@ -151,7 +151,7 @@ def SPIRV_GraphConstantARMOp : 
SPIRV_GraphARMOp<"GraphConstant", [InGraphScope,
   let autogenSerialization = 0;
 
   let assemblyFormat = [{
-prop-dict attr-dict `:` type($output)
+`graph_constant_id` `=` $graph_constant_id attr-dict `:` type($output)

davidegrohmann wrote:

if we do this can we shorten it to just `id`?

https://github.com/llvm/llvm-project/pull/196282
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[llvm-branch-commits] [mlir] [MLIR][SPIRV] Enable strict property assembly format (PR #196282)

2026-05-07 Thread Igor Wodiany via llvm-branch-commits 


@@ -1239,4 +1245,3 @@ func.func @switch_missing_operand_type(%selector: i32) -> 
() {
 ^merge:
   spirv.Return
 }
-

IgWod wrote:

Same here.

https://github.com/llvm/llvm-project/pull/196282
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[llvm-branch-commits] [mlir] [MLIR][SPIRV] Enable strict property assembly format (PR #196282)

2026-05-07 Thread Jakub Kuderski via llvm-branch-commits 

https://github.com/kuhar approved this pull request.


https://github.com/llvm/llvm-project/pull/196282
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[llvm-branch-commits] [mlir] [MLIR][SPIRV] Enable strict property assembly format (PR #196282)

2026-05-07 Thread Igor Wodiany via llvm-branch-commits 


@@ -1107,6 +1112,7 @@ func.func @switch(%selector: i32) -> () {
   spirv.Return
 }
 
+

IgWod wrote:

Unrelated formatting change?

https://github.com/llvm/llvm-project/pull/196282
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[llvm-branch-commits] [mlir] [MLIR][SPIRV] Enable strict property assembly format (PR #196282)

2026-05-07 Thread Mehdi Amini via llvm-branch-commits 

https://github.com/joker-eph updated 
https://github.com/llvm/llvm-project/pull/196282

>From 5d0a634e89856df49892cf235fe4c40d22f2331f Mon Sep 17 00:00:00 2001
From: Mehdi Amini 
Date: Wed, 6 May 2026 16:24:33 -0700
Subject: [PATCH 1/2] [MLIR][SPIRV] Enable strict property assembly format

Enable strict property assembly format mode for SPIR-V and add property
dictionaries to declarative formats that still carry inherent attributes outside
explicit operands or clauses.

Refresh ARM graph and TOSA tests so GraphConstant uses prop-dict spelling for
its inherent constant identifier.

Assisted-by: Codex
---
 mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td  |  1 +
 .../mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td |  2 +-
 mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td  |  2 +-
 mlir/test/Dialect/SPIRV/IR/graph-ops.mlir|  6 +++---
 .../test/Dialect/SPIRV/IR/tosa-ops-verification.mlir | 12 ++--
 mlir/test/Dialect/SPIRV/IR/tosa-ops.mlir |  2 +-
 mlir/test/Target/SPIRV/graph-ops.mlir|  4 ++--
 mlir/test/Target/SPIRV/tosa-ops.mlir |  2 +-
 8 files changed, 16 insertions(+), 15 deletions(-)

diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td 
b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
index b33a84d093fb9..7ba41873c36f9 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
@@ -52,6 +52,7 @@ def SPIRV_Dialect : Dialect {
   let hasOperationAttrVerify = 1;
   let hasRegionArgAttrVerify = 1;
   let hasRegionResultAttrVerify = 1;
+  let useStrictPropertiesInAssemblyFormat = 1;
 
   let extraClassDeclaration = [{
 void registerAttributes();
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td 
b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
index e7c314cb9acb9..d55fa93f4f4b0 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
@@ -237,7 +237,7 @@ def SPIRV_FunctionCallOp : SPIRV_Op<"FunctionCall", [
   let autogenSerialization = 0;
 
   let assemblyFormat = [{
-$callee `(` $arguments `)` attr-dict `:`
+$callee `(` $arguments `)` prop-dict attr-dict `:`
   functional-type($arguments, results)
   }];
 }
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td 
b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
index d8012749131d6..b63a7813c44bb 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
@@ -151,7 +151,7 @@ def SPIRV_GraphConstantARMOp : 
SPIRV_GraphARMOp<"GraphConstant", [InGraphScope,
   let autogenSerialization = 0;
 
   let assemblyFormat = [{
-attr-dict `:` type($output)
+prop-dict attr-dict `:` type($output)
   }];
 }
 
diff --git a/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir 
b/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
index 798147df45a34..b8b2146a7e91f 100644
--- a/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
+++ b/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
@@ -18,8 +18,8 @@ spirv.ARM.Graph @graphAndOutputs(%arg0: 
!spirv.arm.tensor<14x19xi16>) -> !spirv.
 
 // CHECK: spirv.ARM.Graph {{@.*}}() -> !spirv.arm.tensor<2x3xi16> {
 spirv.ARM.Graph @graphConstant() -> !spirv.arm.tensor<2x3xi16> {
-  // CHECK: [[CONST:%.*]] = spirv.ARM.GraphConstant {graph_constant_id = 42 : 
i32} : !spirv.arm.tensor<2x3xi16>
-  %0 = spirv.ARM.GraphConstant { graph_constant_id = 42 : i32 } : 
!spirv.arm.tensor<2x3xi16>
+  // CHECK: [[CONST:%.*]] = spirv.ARM.GraphConstant <{graph_constant_id = 42 : 
i32}> : !spirv.arm.tensor<2x3xi16>
+  %0 = spirv.ARM.GraphConstant <{graph_constant_id = 42 : i32}> : 
!spirv.arm.tensor<2x3xi16>
   // CHECK: spirv.ARM.GraphOutputs [[CONST:%.*]] : !spirv.arm.tensor<2x3xi16>
   spirv.ARM.GraphOutputs %0 : !spirv.arm.tensor<2x3xi16>
 }
@@ -63,7 +63,7 @@ spirv.ARM.Graph @graphNoOutputs(%arg0: 
!spirv.arm.tensor<14x19xi16>) -> () {
 
//===--===//
 
 // expected-error @+1 {{'spirv.ARM.GraphConstant' op failed to verify that op 
must appear in a spirv.ARM.Graph op's block}}
-%0 = spirv.ARM.GraphConstant { graph_constant_id = 42 : i32 } : 
!spirv.arm.tensor<2x3xi16>
+%0 = spirv.ARM.GraphConstant <{graph_constant_id = 42 : i32}> : 
!spirv.arm.tensor<2x3xi16>
 // -
 
 
//===--===//
diff --git a/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir 
b/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
index ca15b69303361..079829b376099 100644
--- a/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
+++ b/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
@@ -1604,42 +1604,42 @@ spirv.ARM.Graph 
@sub_output_shape_does_not_match_broadcast_shape(%arg0: !spirv.a
 
//===--===//
 
 spirv.ARM.Graph @table_input_and_table_must_have_same_element_typ

[llvm-branch-commits] [mlir] [MLIR][SPIRV] Enable strict property assembly format (PR #196282)

2026-05-07 Thread Davide Grohmann via llvm-branch-commits 

https://github.com/davidegrohmann approved this pull request.


https://github.com/llvm/llvm-project/pull/196282
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[llvm-branch-commits] [mlir] [MLIR][SPIRV] Enable strict property assembly format (PR #196282)

2026-05-07 Thread via llvm-branch-commits 

llvmorg-github-actions[bot] wrote:




@llvm/pr-subscribers-mlir

Author: Mehdi Amini (joker-eph)


Changes

Enable strict property assembly format mode for SPIR-V and add property 
dictionaries to declarative formats that still carry inherent attributes 
outside explicit operands or clauses.

Refresh ARM graph and TOSA tests so GraphConstant uses prop-dict spelling for 
its inherent constant identifier.

Assisted-by: Codex

---
Full diff: https://github.com/llvm/llvm-project/pull/196282.diff


8 Files Affected:

- (modified) mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td (+1) 
- (modified) mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td (+1-1) 
- (modified) mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td (+1-1) 
- (modified) mlir/test/Dialect/SPIRV/IR/graph-ops.mlir (+3-3) 
- (modified) mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir (+6-6) 
- (modified) mlir/test/Dialect/SPIRV/IR/tosa-ops.mlir (+1-1) 
- (modified) mlir/test/Target/SPIRV/graph-ops.mlir (+2-2) 
- (modified) mlir/test/Target/SPIRV/tosa-ops.mlir (+1-1) 


``diff
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td 
b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
index b33a84d093fb9..7ba41873c36f9 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
@@ -52,6 +52,7 @@ def SPIRV_Dialect : Dialect {
   let hasOperationAttrVerify = 1;
   let hasRegionArgAttrVerify = 1;
   let hasRegionResultAttrVerify = 1;
+  let useStrictPropertiesInAssemblyFormat = 1;
 
   let extraClassDeclaration = [{
 void registerAttributes();
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td 
b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
index e7c314cb9acb9..d55fa93f4f4b0 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
@@ -237,7 +237,7 @@ def SPIRV_FunctionCallOp : SPIRV_Op<"FunctionCall", [
   let autogenSerialization = 0;
 
   let assemblyFormat = [{
-$callee `(` $arguments `)` attr-dict `:`
+$callee `(` $arguments `)` prop-dict attr-dict `:`
   functional-type($arguments, results)
   }];
 }
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td 
b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
index d8012749131d6..b63a7813c44bb 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
@@ -151,7 +151,7 @@ def SPIRV_GraphConstantARMOp : 
SPIRV_GraphARMOp<"GraphConstant", [InGraphScope,
   let autogenSerialization = 0;
 
   let assemblyFormat = [{
-attr-dict `:` type($output)
+prop-dict attr-dict `:` type($output)
   }];
 }
 
diff --git a/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir 
b/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
index 798147df45a34..b8b2146a7e91f 100644
--- a/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
+++ b/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
@@ -18,8 +18,8 @@ spirv.ARM.Graph @graphAndOutputs(%arg0: 
!spirv.arm.tensor<14x19xi16>) -> !spirv.
 
 // CHECK: spirv.ARM.Graph {{@.*}}() -> !spirv.arm.tensor<2x3xi16> {
 spirv.ARM.Graph @graphConstant() -> !spirv.arm.tensor<2x3xi16> {
-  // CHECK: [[CONST:%.*]] = spirv.ARM.GraphConstant {graph_constant_id = 42 : 
i32} : !spirv.arm.tensor<2x3xi16>
-  %0 = spirv.ARM.GraphConstant { graph_constant_id = 42 : i32 } : 
!spirv.arm.tensor<2x3xi16>
+  // CHECK: [[CONST:%.*]] = spirv.ARM.GraphConstant <{graph_constant_id = 42 : 
i32}> : !spirv.arm.tensor<2x3xi16>
+  %0 = spirv.ARM.GraphConstant <{graph_constant_id = 42 : i32}> : 
!spirv.arm.tensor<2x3xi16>
   // CHECK: spirv.ARM.GraphOutputs [[CONST:%.*]] : !spirv.arm.tensor<2x3xi16>
   spirv.ARM.GraphOutputs %0 : !spirv.arm.tensor<2x3xi16>
 }
@@ -63,7 +63,7 @@ spirv.ARM.Graph @graphNoOutputs(%arg0: 
!spirv.arm.tensor<14x19xi16>) -> () {
 
//===--===//
 
 // expected-error @+1 {{'spirv.ARM.GraphConstant' op failed to verify that op 
must appear in a spirv.ARM.Graph op's block}}
-%0 = spirv.ARM.GraphConstant { graph_constant_id = 42 : i32 } : 
!spirv.arm.tensor<2x3xi16>
+%0 = spirv.ARM.GraphConstant <{graph_constant_id = 42 : i32}> : 
!spirv.arm.tensor<2x3xi16>
 // -
 
 
//===--===//
diff --git a/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir 
b/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
index ca15b69303361..079829b376099 100644
--- a/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
+++ b/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
@@ -1604,42 +1604,42 @@ spirv.ARM.Graph 
@sub_output_shape_does_not_match_broadcast_shape(%arg0: !spirv.a
 
//===--===//
 
 spirv.ARM.Graph @table_input_and_table_must_have_same_element_type(%arg0: 
!spirv.arm.tensor<3x2x15x7xi8>) -> (!spirv.arm.tensor<3x2x15x7xi8>) {
-  %0 = spirv.ARM.Graph

[llvm-branch-commits] [mlir] [MLIR][SPIRV] Enable strict property assembly format (PR #196282)

2026-05-07 Thread via llvm-branch-commits 

llvmorg-github-actions[bot] wrote:




@llvm/pr-subscribers-mlir-spirv

Author: Mehdi Amini (joker-eph)


Changes

Enable strict property assembly format mode for SPIR-V and add property 
dictionaries to declarative formats that still carry inherent attributes 
outside explicit operands or clauses.

Refresh ARM graph and TOSA tests so GraphConstant uses prop-dict spelling for 
its inherent constant identifier.

Assisted-by: Codex

---
Full diff: https://github.com/llvm/llvm-project/pull/196282.diff


8 Files Affected:

- (modified) mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td (+1) 
- (modified) mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td (+1-1) 
- (modified) mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td (+1-1) 
- (modified) mlir/test/Dialect/SPIRV/IR/graph-ops.mlir (+3-3) 
- (modified) mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir (+6-6) 
- (modified) mlir/test/Dialect/SPIRV/IR/tosa-ops.mlir (+1-1) 
- (modified) mlir/test/Target/SPIRV/graph-ops.mlir (+2-2) 
- (modified) mlir/test/Target/SPIRV/tosa-ops.mlir (+1-1) 


``diff
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td 
b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
index b33a84d093fb9..7ba41873c36f9 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
@@ -52,6 +52,7 @@ def SPIRV_Dialect : Dialect {
   let hasOperationAttrVerify = 1;
   let hasRegionArgAttrVerify = 1;
   let hasRegionResultAttrVerify = 1;
+  let useStrictPropertiesInAssemblyFormat = 1;
 
   let extraClassDeclaration = [{
 void registerAttributes();
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td 
b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
index e7c314cb9acb9..d55fa93f4f4b0 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
@@ -237,7 +237,7 @@ def SPIRV_FunctionCallOp : SPIRV_Op<"FunctionCall", [
   let autogenSerialization = 0;
 
   let assemblyFormat = [{
-$callee `(` $arguments `)` attr-dict `:`
+$callee `(` $arguments `)` prop-dict attr-dict `:`
   functional-type($arguments, results)
   }];
 }
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td 
b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
index d8012749131d6..b63a7813c44bb 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
@@ -151,7 +151,7 @@ def SPIRV_GraphConstantARMOp : 
SPIRV_GraphARMOp<"GraphConstant", [InGraphScope,
   let autogenSerialization = 0;
 
   let assemblyFormat = [{
-attr-dict `:` type($output)
+prop-dict attr-dict `:` type($output)
   }];
 }
 
diff --git a/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir 
b/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
index 798147df45a34..b8b2146a7e91f 100644
--- a/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
+++ b/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
@@ -18,8 +18,8 @@ spirv.ARM.Graph @graphAndOutputs(%arg0: 
!spirv.arm.tensor<14x19xi16>) -> !spirv.
 
 // CHECK: spirv.ARM.Graph {{@.*}}() -> !spirv.arm.tensor<2x3xi16> {
 spirv.ARM.Graph @graphConstant() -> !spirv.arm.tensor<2x3xi16> {
-  // CHECK: [[CONST:%.*]] = spirv.ARM.GraphConstant {graph_constant_id = 42 : 
i32} : !spirv.arm.tensor<2x3xi16>
-  %0 = spirv.ARM.GraphConstant { graph_constant_id = 42 : i32 } : 
!spirv.arm.tensor<2x3xi16>
+  // CHECK: [[CONST:%.*]] = spirv.ARM.GraphConstant <{graph_constant_id = 42 : 
i32}> : !spirv.arm.tensor<2x3xi16>
+  %0 = spirv.ARM.GraphConstant <{graph_constant_id = 42 : i32}> : 
!spirv.arm.tensor<2x3xi16>
   // CHECK: spirv.ARM.GraphOutputs [[CONST:%.*]] : !spirv.arm.tensor<2x3xi16>
   spirv.ARM.GraphOutputs %0 : !spirv.arm.tensor<2x3xi16>
 }
@@ -63,7 +63,7 @@ spirv.ARM.Graph @graphNoOutputs(%arg0: 
!spirv.arm.tensor<14x19xi16>) -> () {
 
//===--===//
 
 // expected-error @+1 {{'spirv.ARM.GraphConstant' op failed to verify that op 
must appear in a spirv.ARM.Graph op's block}}
-%0 = spirv.ARM.GraphConstant { graph_constant_id = 42 : i32 } : 
!spirv.arm.tensor<2x3xi16>
+%0 = spirv.ARM.GraphConstant <{graph_constant_id = 42 : i32}> : 
!spirv.arm.tensor<2x3xi16>
 // -
 
 
//===--===//
diff --git a/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir 
b/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
index ca15b69303361..079829b376099 100644
--- a/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
+++ b/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
@@ -1604,42 +1604,42 @@ spirv.ARM.Graph 
@sub_output_shape_does_not_match_broadcast_shape(%arg0: !spirv.a
 
//===--===//
 
 spirv.ARM.Graph @table_input_and_table_must_have_same_element_type(%arg0: 
!spirv.arm.tensor<3x2x15x7xi8>) -> (!spirv.arm.tensor<3x2x15x7xi8>) {
-  %0 = spirv.ARM

[llvm-branch-commits] [mlir] [MLIR][SPIRV] Enable strict property assembly format (PR #196282)

2026-05-07 Thread Mehdi Amini via llvm-branch-commits 

https://github.com/joker-eph created 
https://github.com/llvm/llvm-project/pull/196282

Enable strict property assembly format mode for SPIR-V and add property 
dictionaries to declarative formats that still carry inherent attributes 
outside explicit operands or clauses.

Refresh ARM graph and TOSA tests so GraphConstant uses prop-dict spelling for 
its inherent constant identifier.

Assisted-by: Codex

>From 5d0a634e89856df49892cf235fe4c40d22f2331f Mon Sep 17 00:00:00 2001
From: Mehdi Amini 
Date: Wed, 6 May 2026 16:24:33 -0700
Subject: [PATCH] [MLIR][SPIRV] Enable strict property assembly format

Enable strict property assembly format mode for SPIR-V and add property
dictionaries to declarative formats that still carry inherent attributes outside
explicit operands or clauses.

Refresh ARM graph and TOSA tests so GraphConstant uses prop-dict spelling for
its inherent constant identifier.

Assisted-by: Codex
---
 mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td  |  1 +
 .../mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td |  2 +-
 mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td  |  2 +-
 mlir/test/Dialect/SPIRV/IR/graph-ops.mlir|  6 +++---
 .../test/Dialect/SPIRV/IR/tosa-ops-verification.mlir | 12 ++--
 mlir/test/Dialect/SPIRV/IR/tosa-ops.mlir |  2 +-
 mlir/test/Target/SPIRV/graph-ops.mlir|  4 ++--
 mlir/test/Target/SPIRV/tosa-ops.mlir |  2 +-
 8 files changed, 16 insertions(+), 15 deletions(-)

diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td 
b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
index b33a84d093fb9..7ba41873c36f9 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
@@ -52,6 +52,7 @@ def SPIRV_Dialect : Dialect {
   let hasOperationAttrVerify = 1;
   let hasRegionArgAttrVerify = 1;
   let hasRegionResultAttrVerify = 1;
+  let useStrictPropertiesInAssemblyFormat = 1;
 
   let extraClassDeclaration = [{
 void registerAttributes();
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td 
b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
index e7c314cb9acb9..d55fa93f4f4b0 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
@@ -237,7 +237,7 @@ def SPIRV_FunctionCallOp : SPIRV_Op<"FunctionCall", [
   let autogenSerialization = 0;
 
   let assemblyFormat = [{
-$callee `(` $arguments `)` attr-dict `:`
+$callee `(` $arguments `)` prop-dict attr-dict `:`
   functional-type($arguments, results)
   }];
 }
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td 
b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
index d8012749131d6..b63a7813c44bb 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
@@ -151,7 +151,7 @@ def SPIRV_GraphConstantARMOp : 
SPIRV_GraphARMOp<"GraphConstant", [InGraphScope,
   let autogenSerialization = 0;
 
   let assemblyFormat = [{
-attr-dict `:` type($output)
+prop-dict attr-dict `:` type($output)
   }];
 }
 
diff --git a/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir 
b/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
index 798147df45a34..b8b2146a7e91f 100644
--- a/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
+++ b/mlir/test/Dialect/SPIRV/IR/graph-ops.mlir
@@ -18,8 +18,8 @@ spirv.ARM.Graph @graphAndOutputs(%arg0: 
!spirv.arm.tensor<14x19xi16>) -> !spirv.
 
 // CHECK: spirv.ARM.Graph {{@.*}}() -> !spirv.arm.tensor<2x3xi16> {
 spirv.ARM.Graph @graphConstant() -> !spirv.arm.tensor<2x3xi16> {
-  // CHECK: [[CONST:%.*]] = spirv.ARM.GraphConstant {graph_constant_id = 42 : 
i32} : !spirv.arm.tensor<2x3xi16>
-  %0 = spirv.ARM.GraphConstant { graph_constant_id = 42 : i32 } : 
!spirv.arm.tensor<2x3xi16>
+  // CHECK: [[CONST:%.*]] = spirv.ARM.GraphConstant <{graph_constant_id = 42 : 
i32}> : !spirv.arm.tensor<2x3xi16>
+  %0 = spirv.ARM.GraphConstant <{graph_constant_id = 42 : i32}> : 
!spirv.arm.tensor<2x3xi16>
   // CHECK: spirv.ARM.GraphOutputs [[CONST:%.*]] : !spirv.arm.tensor<2x3xi16>
   spirv.ARM.GraphOutputs %0 : !spirv.arm.tensor<2x3xi16>
 }
@@ -63,7 +63,7 @@ spirv.ARM.Graph @graphNoOutputs(%arg0: 
!spirv.arm.tensor<14x19xi16>) -> () {
 
//===--===//
 
 // expected-error @+1 {{'spirv.ARM.GraphConstant' op failed to verify that op 
must appear in a spirv.ARM.Graph op's block}}
-%0 = spirv.ARM.GraphConstant { graph_constant_id = 42 : i32 } : 
!spirv.arm.tensor<2x3xi16>
+%0 = spirv.ARM.GraphConstant <{graph_constant_id = 42 : i32}> : 
!spirv.arm.tensor<2x3xi16>
 // -
 
 
//===--===//
diff --git a/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir 
b/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
index ca15b69303361..079829b376099 100644
--- a/mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
+